src/gallium/drivers/freedreno/a4xx/fd4_zsa.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_state.h"
  31 #include "util/u_string.h"
  32 #include "util/u_memory.h"
  33
  34 #include "fd4_zsa.h"
  35 #include "fd4_context.h"
  36 #include "fd4_format.h"
  37
  38 void *
  39 fd4_zsa_state_create(struct pipe_context *pctx,
  40                 const struct pipe_depth_stencil_alpha_state *cso)
  41 {
  42         struct fd4_zsa_stateobj *so;
  43
  44         so = CALLOC_STRUCT(fd4_zsa_stateobj);
  45         if (!so)
  46                 return NULL;
  47
  48         so->base = *cso;
  49
  50         so->rb_depth_control |=
  51                         A4XX_RB_DEPTH_CONTROL_ZFUNC(cso->depth.func); /* maps 1:1 */
  52
  53         if (cso->depth.enabled)
  54                 so->rb_depth_control |=
  55                         A4XX_RB_DEPTH_CONTROL_Z_ENABLE |
  56                         A4XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE;
  57
  58         if (cso->depth.writemask)
  59                 so->rb_depth_control |= A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE;
  60
  61         if (cso->stencil[0].enabled) {
  62                 const struct pipe_stencil_state *s = &cso->stencil[0];
  63
  64                 so->rb_stencil_control |=
  65                         A4XX_RB_STENCIL_CONTROL_STENCIL_READ |
  66                         A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
  67                         A4XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */
  68                         A4XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) |
  69                         A4XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) |
  70                         A4XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op));
  71                 so->rb_stencil_control2 |=
  72                         A4XX_RB_STENCIL_CONTROL2_STENCIL_BUFFER;
  73                 so->rb_stencilrefmask |=
  74                         0xff000000 | /* ??? */
  75                         A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) |
  76                         A4XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask);
  77
  78                 if (cso->stencil[1].enabled) {
  79                         const struct pipe_stencil_state *bs = &cso->stencil[1];
  80
  81                         so->rb_stencil_control |=
  82                                 A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF |
  83                                 A4XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
  84                                 A4XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
  85                                 A4XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
  86                                 A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
  87                         so->rb_stencilrefmask_bf |=
  88                                 0xff000000 | /* ??? */
  89                                 A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
  90                                 A4XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
  91                 }
  92         }
  93
  94         if (cso->alpha.enabled) {
  95                 uint32_t ref = cso->alpha.ref_value * 255.0;
  96                 so->gras_alpha_control =
  97                         A4XX_GRAS_ALPHA_CONTROL_ALPHA_TEST_ENABLE;
  98                 so->rb_alpha_control =
  99                         A4XX_RB_ALPHA_CONTROL_ALPHA_TEST |
 100                         A4XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
 101                         A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
 102                 so->rb_depth_control |=
 103                         A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
 104         }
 105
 106         return so;
 107 }