f4d885b40f7fd0b9428877c31cd9025929275eba
[mesa.git] / src / gallium / drivers / freedreno / a5xx / fd5_context.h
1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD5_CONTEXT_H_
28 #define FD5_CONTEXT_H_
29
30 #include "util/u_upload_mgr.h"
31
32 #include "freedreno_drmif.h"
33
34 #include "freedreno_context.h"
35
36 #include "ir3_shader.h"
37
38 struct fd5_context {
39 struct fd_context base;
40
41 struct fd_bo *vs_pvt_mem, *fs_pvt_mem;
42
43 /* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes). We
44 * could combine it with another allocation.
45 */
46 struct fd_bo *vsc_size_mem;
47
48 /* TODO not sure what this is for.. probably similar to
49 * CACHE_FLUSH_TS on kernel side, where value gets written
50 * to this address synchronized w/ 3d (ie. a way to
51 * synchronize when the CP is running far ahead)
52 */
53 struct fd_bo *blit_mem;
54
55 struct u_upload_mgr *border_color_uploader;
56 struct pipe_resource *border_color_buf;
57
58 /* if *any* of bits are set in {v,f}saturate_{s,t,r} */
59 bool vsaturate, fsaturate;
60
61 /* bitmask of sampler which needs coords clamped for vertex
62 * shader:
63 */
64 uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
65
66 /* bitmask of sampler which needs coords clamped for frag
67 * shader:
68 */
69 uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
70
71 /* bitmask of samplers which need astc srgb workaround: */
72 uint16_t vastc_srgb, fastc_srgb;
73
74 /* some state changes require a different shader variant. Keep
75 * track of this so we know when we need to re-emit shader state
76 * due to variant change. See fixup_shader_state()
77 */
78 struct ir3_shader_key last_key;
79
80 /* number of active samples-passed queries: */
81 int samples_passed_queries;
82
83 /* cached state about current emitted shader program (3d): */
84 unsigned max_loc;
85 };
86
87 static inline struct fd5_context *
88 fd5_context(struct fd_context *ctx)
89 {
90 return (struct fd5_context *)ctx;
91 }
92
93 struct pipe_context *
94 fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
95
96 #endif /* FD5_CONTEXT_H_ */