src/gallium/drivers/freedreno/a5xx/fd5_draw.h

   1 /*
   2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #ifndef FD5_DRAW_H_
  28 #define FD5_DRAW_H_
  29
  30 #include "pipe/p_context.h"
  31
  32 #include "freedreno_draw.h"
  33
  34 /* some bits in common w/ a4xx: */
  35 #include "a4xx/fd4_draw.h"
  36
  37 void fd5_draw_init(struct pipe_context *pctx);
  38
  39 static inline void
  40 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
  41                 enum pc_di_primtype primtype,
  42                 enum pc_di_vis_cull_mode vismode,
  43                 enum pc_di_src_sel src_sel, uint32_t count,
  44                 uint32_t instances, enum a4xx_index_size idx_type,
  45                 uint32_t idx_size, uint32_t idx_offset,
  46                 struct pipe_resource *idx_buffer)
  47 {
  48         /* for debug after a lock up, write a unique counter value
  49          * to scratch7 for each draw, to make it easier to match up
  50          * register dumps to cmdstream.  The combination of IB
  51          * (scratch6) and DRAW is enough to "triangulate" the
  52          * particular draw that caused lockup.
  53          */
  54         emit_marker5(ring, 7);
  55
  56         OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
  57         if (vismode == USE_VISIBILITY) {
  58                 /* leave vis mode blank for now, it will be patched up when
  59                  * we know if we are binning or not
  60                  */
  61                 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
  62                                 &batch->draw_patches);
  63         } else {
  64                 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
  65         }
  66         OUT_RING(ring, instances);         /* NumInstances */
  67         OUT_RING(ring, count);             /* NumIndices */
  68         if (idx_buffer) {
  69                 OUT_RING(ring, 0x0);           /* XXX */
  70                 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
  71                 OUT_RING (ring, idx_size);
  72         }
  73
  74         emit_marker5(ring, 7);
  75
  76         fd_reset_wfi(batch);
  77 }
  78
  79 static inline void
  80 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
  81                 enum pc_di_primtype primtype,
  82                 enum pc_di_vis_cull_mode vismode,
  83                 const struct pipe_draw_info *info,
  84                 unsigned index_offset)
  85 {
  86         struct pipe_resource *idx_buffer = NULL;
  87         enum a4xx_index_size idx_type;
  88         enum pc_di_src_sel src_sel;
  89         uint32_t idx_size, idx_offset;
  90
  91         if (info->index_size) {
  92                 assert(!info->has_user_indices);
  93
  94                 idx_buffer = info->index.resource;
  95                 idx_type = fd4_size2indextype(info->index_size);
  96                 idx_size = info->index_size * info->count;
  97                 idx_offset = index_offset + info->start * info->index_size;
  98                 src_sel = DI_SRC_SEL_DMA;
  99         } else {
 100                 idx_buffer = NULL;
 101                 idx_type = INDEX4_SIZE_32_BIT;
 102                 idx_size = 0;
 103                 idx_offset = 0;
 104                 src_sel = DI_SRC_SEL_AUTO_INDEX;
 105         }
 106
 107         fd5_draw(batch, ring, primtype, vismode, src_sel,
 108                         info->count, info->instance_count,
 109                         idx_type, idx_size, idx_offset, idx_buffer);
 110 }
 111
 112 #endif /* FD5_DRAW_H_ */