freedreno/ir3: debug cleanup
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blend.c
1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "pipe/p_state.h"
29 #include "util/u_blend.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32
33 #include "fd6_blend.h"
34 #include "fd6_context.h"
35 #include "fd6_format.h"
36
37 // XXX move somewhere common.. same across a3xx/a4xx/a5xx..
38 static enum a3xx_rb_blend_opcode
39 blend_func(unsigned func)
40 {
41 switch (func) {
42 case PIPE_BLEND_ADD:
43 return BLEND_DST_PLUS_SRC;
44 case PIPE_BLEND_MIN:
45 return BLEND_MIN_DST_SRC;
46 case PIPE_BLEND_MAX:
47 return BLEND_MAX_DST_SRC;
48 case PIPE_BLEND_SUBTRACT:
49 return BLEND_SRC_MINUS_DST;
50 case PIPE_BLEND_REVERSE_SUBTRACT:
51 return BLEND_DST_MINUS_SRC;
52 default:
53 DBG("invalid blend func: %x", func);
54 return 0;
55 }
56 }
57
58 void *
59 fd6_blend_state_create(struct pipe_context *pctx,
60 const struct pipe_blend_state *cso)
61 {
62 struct fd6_blend_stateobj *so;
63 enum a3xx_rop_code rop = ROP_COPY;
64 bool reads_dest = false;
65 unsigned i, mrt_blend = 0;
66
67 if (cso->logicop_enable) {
68 rop = cso->logicop_func; /* maps 1:1 */
69
70 switch (cso->logicop_func) {
71 case PIPE_LOGICOP_NOR:
72 case PIPE_LOGICOP_AND_INVERTED:
73 case PIPE_LOGICOP_AND_REVERSE:
74 case PIPE_LOGICOP_INVERT:
75 case PIPE_LOGICOP_XOR:
76 case PIPE_LOGICOP_NAND:
77 case PIPE_LOGICOP_AND:
78 case PIPE_LOGICOP_EQUIV:
79 case PIPE_LOGICOP_NOOP:
80 case PIPE_LOGICOP_OR_INVERTED:
81 case PIPE_LOGICOP_OR_REVERSE:
82 case PIPE_LOGICOP_OR:
83 reads_dest = true;
84 break;
85 }
86 }
87
88 so = CALLOC_STRUCT(fd6_blend_stateobj);
89 if (!so)
90 return NULL;
91
92 so->base = *cso;
93
94 for (i = 0; i < ARRAY_SIZE(so->rb_mrt); i++) {
95 const struct pipe_rt_blend_state *rt;
96
97 if (cso->independent_blend_enable)
98 rt = &cso->rt[i];
99 else
100 rt = &cso->rt[0];
101
102 so->rb_mrt[i].blend_control_rgb =
103 A6XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) |
104 A6XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
105 A6XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor));
106
107 so->rb_mrt[i].blend_control_alpha =
108 A6XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) |
109 A6XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) |
110 A6XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor));
111
112 so->rb_mrt[i].blend_control_no_alpha_rgb =
113 A6XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) |
114 A6XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) |
115 A6XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor)));
116
117
118 so->rb_mrt[i].control =
119 A6XX_RB_MRT_CONTROL_ROP_CODE(rop) |
120 COND(cso->logicop_enable, A6XX_RB_MRT_CONTROL_ROP_ENABLE) |
121 A6XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
122
123 if (rt->blend_enable) {
124 so->rb_mrt[i].control |=
125 // A6XX_RB_MRT_CONTROL_READ_DEST_ENABLE |
126 A6XX_RB_MRT_CONTROL_BLEND |
127 A6XX_RB_MRT_CONTROL_BLEND2;
128 mrt_blend |= (1 << i);
129 }
130
131 if (reads_dest) {
132 // so->rb_mrt[i].control |= A6XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
133 mrt_blend |= (1 << i);
134 }
135 }
136
137 if (cso->dither) {
138 so->rb_dither_cntl = A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT0(DITHER_ALWAYS) |
139 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT1(DITHER_ALWAYS) |
140 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT2(DITHER_ALWAYS) |
141 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT3(DITHER_ALWAYS) |
142 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT4(DITHER_ALWAYS) |
143 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT5(DITHER_ALWAYS) |
144 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT6(DITHER_ALWAYS) |
145 A6XX_RB_DITHER_CNTL_DITHER_MODE_MRT7(DITHER_ALWAYS);
146 }
147
148 so->rb_blend_cntl = A6XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) |
149 COND(cso->alpha_to_coverage, A6XX_RB_BLEND_CNTL_ALPHA_TO_COVERAGE) |
150 COND(cso->independent_blend_enable, A6XX_RB_BLEND_CNTL_INDEPENDENT_BLEND);
151 so->sp_blend_cntl = A6XX_SP_BLEND_CNTL_UNK8 |
152 COND(cso->alpha_to_coverage, A6XX_SP_BLEND_CNTL_ALPHA_TO_COVERAGE) |
153 COND(mrt_blend, A6XX_SP_BLEND_CNTL_ENABLED);
154
155 return so;
156 }