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39e913bfbf7106a9c4f849d8674f1ae09b485439
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29 #include "util/half_float.h"
30
31 #include "freedreno_blitter.h"
32 #include "freedreno_fence.h"
33 #include "freedreno_log.h"
34 #include "freedreno_resource.h"
35
36 #include "fd6_blitter.h"
37 #include "fd6_format.h"
38 #include "fd6_emit.h"
39 #include "fd6_resource.h"
40 #include "fd6_pack.h"
41
42 /* Make sure none of the requested dimensions extend beyond the size of the
43 * resource. Not entirely sure why this happens, but sometimes it does, and
44 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
45 * back to u_blitter
46 */
47 static bool
48 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
49 {
50 int last_layer =
51 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
52 : r->array_size;
53
54 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
55 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
56 (b->z >= 0) && (b->z + b->depth <= last_layer);
57 }
58
59 static bool
60 ok_format(enum pipe_format pfmt)
61 {
62 enum a6xx_format fmt = fd6_pipe2color(pfmt);
63
64 switch (pfmt) {
65 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
66 case PIPE_FORMAT_Z24X8_UNORM:
67 case PIPE_FORMAT_Z16_UNORM:
68 case PIPE_FORMAT_Z32_UNORM:
69 case PIPE_FORMAT_Z32_FLOAT:
70 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
71 case PIPE_FORMAT_S8_UINT:
72 return true;
73 default:
74 break;
75 }
76
77 if (fmt == ~0)
78 return false;
79
80 if (fd6_ifmt(fmt) == 0)
81 return false;
82
83 return true;
84 }
85
86 #define DEBUG_BLIT 0
87 #define DEBUG_BLIT_FALLBACK 0
88
89 #define fail_if(cond) \
90 do { \
91 if (cond) { \
92 if (DEBUG_BLIT_FALLBACK) { \
93 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
94 util_dump_blit_info(stderr, info); \
95 fprintf(stderr, "\nsrc: "); \
96 util_dump_resource(stderr, info->src.resource); \
97 fprintf(stderr, "\ndst: "); \
98 util_dump_resource(stderr, info->dst.resource); \
99 fprintf(stderr, "\n"); \
100 } \
101 return false; \
102 } \
103 } while (0)
104
105 static bool
106 can_do_blit(const struct pipe_blit_info *info)
107 {
108 /* I think we can do scaling, but not in z dimension since that would
109 * require blending..
110 */
111 fail_if(info->dst.box.depth != info->src.box.depth);
112
113 /* Fail if unsupported format: */
114 fail_if(!ok_format(info->src.format));
115 fail_if(!ok_format(info->dst.format));
116
117 debug_assert(!util_format_is_compressed(info->src.format));
118 debug_assert(!util_format_is_compressed(info->dst.format));
119
120 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
121
122 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
123
124 debug_assert(info->dst.box.width >= 0);
125 debug_assert(info->dst.box.height >= 0);
126 debug_assert(info->dst.box.depth >= 0);
127
128 fail_if(info->dst.resource->nr_samples > 1);
129
130 fail_if(info->window_rectangle_include);
131
132 const struct util_format_description *src_desc =
133 util_format_description(info->src.format);
134 const struct util_format_description *dst_desc =
135 util_format_description(info->dst.format);
136 const int common_channels = MIN2(src_desc->nr_channels, dst_desc->nr_channels);
137
138 if (info->mask & PIPE_MASK_RGBA) {
139 for (int i = 0; i < common_channels; i++) {
140 fail_if(memcmp(&src_desc->channel[i],
141 &dst_desc->channel[i],
142 sizeof(src_desc->channel[0])));
143 }
144 }
145
146 fail_if(info->alpha_blend);
147
148 return true;
149 }
150
151 static void
152 emit_setup(struct fd_batch *batch)
153 {
154 struct fd_ringbuffer *ring = batch->draw;
155
156 fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true);
157 fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true);
158 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
159 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
160 }
161
162 static uint32_t
163 blit_control(enum a6xx_format fmt, bool is_srgb)
164 {
165 enum a6xx_2d_ifmt ifmt = fd6_ifmt(fmt);
166
167 if (is_srgb) {
168 assert(ifmt == R2D_UNORM8);
169 ifmt = R2D_UNORM8_SRGB;
170 }
171
172 return A6XX_RB_2D_BLIT_CNTL_MASK(0xf) |
173 A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt) |
174 A6XX_RB_2D_BLIT_CNTL_IFMT(ifmt);
175 }
176
177 /* buffers need to be handled specially since x/width can exceed the bounds
178 * supported by hw.. if necessary decompose into (potentially) two 2D blits
179 */
180 static void
181 emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring,
182 const struct pipe_blit_info *info)
183 {
184 const struct pipe_box *sbox = &info->src.box;
185 const struct pipe_box *dbox = &info->dst.box;
186 struct fd_resource *src, *dst;
187 unsigned sshift, dshift;
188
189 if (DEBUG_BLIT) {
190 fprintf(stderr, "buffer blit: ");
191 util_dump_blit_info(stderr, info);
192 fprintf(stderr, "\ndst resource: ");
193 util_dump_resource(stderr, info->dst.resource);
194 fprintf(stderr, "\nsrc resource: ");
195 util_dump_resource(stderr, info->src.resource);
196 fprintf(stderr, "\n");
197 }
198
199 src = fd_resource(info->src.resource);
200 dst = fd_resource(info->dst.resource);
201
202 debug_assert(src->layout.cpp == 1);
203 debug_assert(dst->layout.cpp == 1);
204 debug_assert(info->src.resource->format == info->dst.resource->format);
205 debug_assert((sbox->y == 0) && (sbox->height == 1));
206 debug_assert((dbox->y == 0) && (dbox->height == 1));
207 debug_assert((sbox->z == 0) && (sbox->depth == 1));
208 debug_assert((dbox->z == 0) && (dbox->depth == 1));
209 debug_assert(sbox->width == dbox->width);
210 debug_assert(info->src.level == 0);
211 debug_assert(info->dst.level == 0);
212
213 /*
214 * Buffers can have dimensions bigger than max width, remap into
215 * multiple 1d blits to fit within max dimension
216 *
217 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
218 * seems to prevent overfetch related faults. Not quite sure what
219 * the deal is there.
220 *
221 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
222 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
223 * difference. On top of already splitting up the blit so width
224 * isn't > 16k.
225 *
226 * We perhaps could do a bit better, if src and dst are aligned but
227 * in the worst case this means we have to split the copy up into
228 * 16k (0x4000) minus 64 (0x40).
229 */
230
231 sshift = sbox->x & 0x3f;
232 dshift = dbox->x & 0x3f;
233
234 OUT_PKT7(ring, CP_SET_MARKER, 1);
235 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
236
237 uint32_t blit_cntl = blit_control(FMT6_8_UNORM, false) | 0x20000000;
238 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
239 OUT_RING(ring, blit_cntl);
240
241 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
242 OUT_RING(ring, blit_cntl);
243
244 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
245 unsigned soff, doff, w, p;
246
247 soff = (sbox->x + off) & ~0x3f;
248 doff = (dbox->x + off) & ~0x3f;
249
250 w = MIN2(sbox->width - off, (0x4000 - 0x40));
251 p = align(w, 64);
252
253 debug_assert((soff + w) <= fd_bo_size(src->bo));
254 debug_assert((doff + w) <= fd_bo_size(dst->bo));
255
256 /*
257 * Emit source:
258 */
259 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
260 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(FMT6_8_UNORM) |
261 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
262 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) |
263 0x500000);
264 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
265 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
266 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
267 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
268
269 OUT_RING(ring, 0x00000000);
270 OUT_RING(ring, 0x00000000);
271 OUT_RING(ring, 0x00000000);
272 OUT_RING(ring, 0x00000000);
273 OUT_RING(ring, 0x00000000);
274
275 /*
276 * Emit destination:
277 */
278 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
279 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(FMT6_8_UNORM) |
280 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
281 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
282 OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
283 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
284 OUT_RING(ring, 0x00000000);
285 OUT_RING(ring, 0x00000000);
286 OUT_RING(ring, 0x00000000);
287 OUT_RING(ring, 0x00000000);
288 OUT_RING(ring, 0x00000000);
289
290 /*
291 * Blit command:
292 */
293 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
294 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
295 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
296 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
297 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
298
299 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
300 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
301 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
302
303 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
304 OUT_RING(ring, 0x3f);
305 OUT_WFI5(ring);
306
307 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
308 OUT_RING(ring, 0);
309
310 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
311 OUT_RING(ring, 0xf180);
312
313 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
314 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
315
316 OUT_PKT7(ring, CP_BLIT, 1);
317 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
318
319 OUT_WFI5(ring);
320
321 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
322 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
323 }
324 }
325
326 static void
327 emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
328 const struct pipe_blit_info *info, union pipe_color_union *color)
329 {
330 const struct pipe_box *sbox = &info->src.box;
331 const struct pipe_box *dbox = &info->dst.box;
332 struct fd_resource *src, *dst;
333 struct fdl_slice *sslice, *dslice;
334 enum a6xx_format sfmt, dfmt;
335 enum a6xx_tile_mode stile, dtile;
336 enum a3xx_color_swap sswap, dswap;
337 unsigned spitch, dpitch;
338 int sx1, sy1, sx2, sy2;
339 int dx1, dy1, dx2, dy2;
340
341 if (DEBUG_BLIT) {
342 fprintf(stderr, "texture blit: ");
343 util_dump_blit_info(stderr, info);
344 fprintf(stderr, "\ndst resource: ");
345 util_dump_resource(stderr, info->dst.resource);
346 fprintf(stderr, "\nsrc resource: ");
347 util_dump_resource(stderr, info->src.resource);
348 fprintf(stderr, "\n");
349 }
350
351 src = fd_resource(info->src.resource);
352 dst = fd_resource(info->dst.resource);
353
354 sslice = fd_resource_slice(src, info->src.level);
355 dslice = fd_resource_slice(dst, info->dst.level);
356
357 sfmt = fd6_pipe2color(info->src.format);
358 dfmt = fd6_pipe2color(info->dst.format);
359
360 stile = fd_resource_tile_mode(info->src.resource, info->src.level);
361 dtile = fd_resource_tile_mode(info->dst.resource, info->dst.level);
362
363 /* Linear levels of a tiled resource are always WZYX, so look at
364 * rsc->tile_mode to determine the swap.
365 */
366 sswap = fd6_resource_swap(src, info->src.format);
367 dswap = fd6_resource_swap(dst, info->dst.format);
368
369 /* Use the underlying resource format so that we get the right block width
370 * for compressed textures.
371 */
372 spitch = util_format_get_nblocksx(src->base.format, sslice->pitch) * src->layout.cpp;
373 dpitch = util_format_get_nblocksx(dst->base.format, dslice->pitch) * dst->layout.cpp;
374
375 uint32_t nr_samples = fd_resource_nr_samples(&dst->base);
376 sx1 = sbox->x * nr_samples;
377 sy1 = sbox->y;
378 sx2 = (sbox->x + sbox->width) * nr_samples - 1;
379 sy2 = sbox->y + sbox->height - 1;
380
381 dx1 = dbox->x * nr_samples;
382 dy1 = dbox->y;
383 dx2 = (dbox->x + dbox->width) * nr_samples - 1;
384 dy2 = dbox->y + dbox->height - 1;
385
386 uint32_t width = u_minify(src->base.width0, info->src.level) * nr_samples;
387 uint32_t height = u_minify(src->base.height0, info->src.level);
388
389 OUT_PKT7(ring, CP_SET_MARKER, 1);
390 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
391
392 uint32_t blit_cntl = blit_control(dfmt, util_format_is_srgb(info->dst.format));
393
394 if (color) {
395 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR;
396
397 switch (info->dst.format) {
398 case PIPE_FORMAT_Z24X8_UNORM:
399 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
400 case PIPE_FORMAT_X24S8_UINT: {
401 uint32_t depth_unorm24 = color->f[0] * ((1u << 24) - 1);
402 uint8_t stencil = color->ui[1];
403 color->ui[0] = depth_unorm24 & 0xff;
404 color->ui[1] = (depth_unorm24 >> 8) & 0xff;
405 color->ui[2] = (depth_unorm24 >> 16) & 0xff;
406 color->ui[3] = stencil;
407
408 dfmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
409 break;
410 }
411 case PIPE_FORMAT_B5G6R5_UNORM:
412 case PIPE_FORMAT_B5G5R5A1_UNORM:
413 case PIPE_FORMAT_B5G5R5X1_UNORM:
414 case PIPE_FORMAT_B4G4R4A4_UNORM:
415 color->ui[0] = float_to_ubyte(color->f[0]);
416 color->ui[1] = float_to_ubyte(color->f[1]);
417 color->ui[2] = float_to_ubyte(color->f[2]);
418 color->ui[3] = float_to_ubyte(color->f[3]);
419 break;
420 default:
421 break;
422 }
423
424 OUT_PKT4(ring, REG_A6XX_RB_2D_SRC_SOLID_C0, 4);
425
426 switch (fd6_ifmt(dfmt)) {
427 case R2D_UNORM8:
428 case R2D_UNORM8_SRGB:
429 OUT_RING(ring, float_to_ubyte(color->f[0]));
430 OUT_RING(ring, float_to_ubyte(color->f[1]));
431 OUT_RING(ring, float_to_ubyte(color->f[2]));
432 OUT_RING(ring, float_to_ubyte(color->f[3]));
433 break;
434 case R2D_FLOAT16:
435 OUT_RING(ring, _mesa_float_to_half(color->f[0]));
436 OUT_RING(ring, _mesa_float_to_half(color->f[1]));
437 OUT_RING(ring, _mesa_float_to_half(color->f[2]));
438 OUT_RING(ring, _mesa_float_to_half(color->f[3]));
439 sfmt = FMT6_16_16_16_16_FLOAT;
440 break;
441
442 case R2D_FLOAT32:
443 case R2D_INT32:
444 case R2D_INT16:
445 case R2D_INT8:
446 case R2D_RAW:
447 default:
448 OUT_RING(ring, color->ui[0]);
449 OUT_RING(ring, color->ui[1]);
450 OUT_RING(ring, color->ui[2]);
451 OUT_RING(ring, color->ui[3]);
452 break;
453 }
454 }
455
456 if (dtile != stile)
457 blit_cntl |= 0x20000000;
458
459 if (info->scissor_enable) {
460 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
461 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
462 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
463 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
464 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
465 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
466 }
467
468 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
469 OUT_RING(ring, blit_cntl);
470
471 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
472 OUT_RING(ring, blit_cntl);
473
474 for (unsigned i = 0; i < info->dst.box.depth; i++) {
475 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
476 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
477 bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
478 bool dubwc_enabled = fd_resource_ubwc_enabled(dst, info->dst.level);
479
480 /*
481 * Emit source:
482 */
483 uint32_t filter = 0;
484 if (info->filter == PIPE_TEX_FILTER_LINEAR)
485 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
486
487 enum a3xx_msaa_samples samples = fd_msaa_samples(src->base.nr_samples);
488
489 if (sfmt == FMT6_10_10_10_2_UNORM_DEST)
490 sfmt = FMT6_10_10_10_2_UNORM;
491
492 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
493 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
494 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
495 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) |
496 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples) |
497 COND(samples > MSAA_ONE && (info->mask & PIPE_MASK_RGBA),
498 A6XX_SP_PS_2D_SRC_INFO_SAMPLES_AVERAGE) |
499 COND(subwc_enabled, A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
500 COND(util_format_is_srgb(info->src.format), A6XX_SP_PS_2D_SRC_INFO_SRGB) |
501 0x500000 | filter);
502 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
503 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
504 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
505 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
506
507 OUT_RING(ring, 0x00000000);
508 OUT_RING(ring, 0x00000000);
509 OUT_RING(ring, 0x00000000);
510 OUT_RING(ring, 0x00000000);
511 OUT_RING(ring, 0x00000000);
512
513 if (subwc_enabled) {
514 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
515 fd6_emit_flag_reference(ring, src, info->src.level, sbox->z + i);
516 OUT_RING(ring, 0x00000000);
517 OUT_RING(ring, 0x00000000);
518 OUT_RING(ring, 0x00000000);
519 }
520
521 /*
522 * Emit destination:
523 */
524 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
525 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
526 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
527 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap) |
528 COND(util_format_is_srgb(info->dst.format), A6XX_RB_2D_DST_INFO_SRGB) |
529 COND(dubwc_enabled, A6XX_RB_2D_DST_INFO_FLAGS));
530 OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
531 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
532 OUT_RING(ring, 0x00000000);
533 OUT_RING(ring, 0x00000000);
534 OUT_RING(ring, 0x00000000);
535 OUT_RING(ring, 0x00000000);
536 OUT_RING(ring, 0x00000000);
537
538 if (dubwc_enabled) {
539 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
540 fd6_emit_flag_reference(ring, dst, info->dst.level, dbox->z + i);
541 OUT_RING(ring, 0x00000000);
542 OUT_RING(ring, 0x00000000);
543 OUT_RING(ring, 0x00000000);
544 }
545
546 /*
547 * Blit command:
548 */
549 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
550 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
551 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
552 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
553 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
554
555 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
556 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
557 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
558
559 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
560 OUT_RING(ring, 0x3f);
561 OUT_WFI5(ring);
562
563 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
564 OUT_RING(ring, 0);
565
566 if (dfmt == FMT6_10_10_10_2_UNORM_DEST)
567 sfmt = FMT6_16_16_16_16_FLOAT;
568
569 /* This register is probably badly named... it seems that it's
570 * controlling the internal/accumulator format or something like
571 * that. It's certainly not tied to only the src format.
572 */
573 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
574 OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
575 COND(util_format_is_pure_sint(info->src.format),
576 A6XX_SP_2D_SRC_FORMAT_SINT) |
577 COND(util_format_is_pure_uint(info->src.format),
578 A6XX_SP_2D_SRC_FORMAT_UINT) |
579 COND(util_format_is_snorm(info->src.format),
580 A6XX_SP_2D_SRC_FORMAT_SINT |
581 A6XX_SP_2D_SRC_FORMAT_NORM) |
582 COND(util_format_is_unorm(info->src.format),
583 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
584 // A6XX_SP_2D_SRC_FORMAT_UINT |
585 A6XX_SP_2D_SRC_FORMAT_NORM) |
586 COND(util_format_is_srgb(info->dst.format), A6XX_SP_2D_SRC_FORMAT_SRGB) |
587 A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
588
589 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
590 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
591
592 OUT_PKT7(ring, CP_BLIT, 1);
593 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
594
595 OUT_WFI5(ring);
596
597 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
598 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
599 }
600 }
601
602 void
603 fd6_clear_surface(struct fd_context *ctx,
604 struct fd_ringbuffer *ring, struct pipe_surface *psurf,
605 uint32_t width, uint32_t height, union pipe_color_union *color)
606 {
607 struct pipe_blit_info info = {};
608
609 info.dst.resource = psurf->texture;
610 info.dst.level = psurf->u.tex.level;
611 info.dst.box.x = 0;
612 info.dst.box.y = 0;
613 info.dst.box.z = psurf->u.tex.first_layer;
614 info.dst.box.width = width;
615 info.dst.box.height = height;
616 info.dst.box.depth = psurf->u.tex.last_layer + 1 - psurf->u.tex.first_layer;
617 info.dst.format = psurf->format;
618 info.src = info.dst;
619 info.mask = util_format_get_mask(psurf->format);
620 info.filter = PIPE_TEX_FILTER_NEAREST;
621 info.scissor_enable = 0;
622
623 emit_blit_or_clear_texture(ctx, ring, &info, color);
624 }
625
626 static bool
627 handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
628 {
629 struct fd_batch *batch;
630
631 debug_assert(!(info->mask & PIPE_MASK_ZS));
632
633 if (!can_do_blit(info))
634 return false;
635
636 fd_fence_ref(&ctx->last_fence, NULL);
637
638 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
639
640 fd6_emit_restore(batch, batch->draw);
641 fd6_emit_lrz_flush(batch->draw);
642
643 mtx_lock(&ctx->screen->lock);
644
645 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
646 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
647
648 mtx_unlock(&ctx->screen->lock);
649
650 fd_batch_set_stage(batch, FD_STAGE_BLIT);
651
652 fd_log_stream(batch, stream, util_dump_blit_info(stream, info));
653
654 emit_setup(batch);
655
656 if ((info->src.resource->target == PIPE_BUFFER) &&
657 (info->dst.resource->target == PIPE_BUFFER)) {
658 assert(fd_resource(info->src.resource)->layout.tile_mode == TILE6_LINEAR);
659 assert(fd_resource(info->dst.resource)->layout.tile_mode == TILE6_LINEAR);
660 fd_log(batch, "START BLIT (BUFFER)");
661 emit_blit_buffer(ctx, batch->draw, info);
662 fd_log(batch, "END BLIT (BUFFER)");
663 } else {
664 /* I don't *think* we need to handle blits between buffer <-> !buffer */
665 debug_assert(info->src.resource->target != PIPE_BUFFER);
666 debug_assert(info->dst.resource->target != PIPE_BUFFER);
667 fd_log(batch, "START BLIT (TEXTURE)");
668 emit_blit_or_clear_texture(ctx, batch->draw, info, NULL);
669 fd_log(batch, "END BLIT (TEXTURE)");
670 }
671
672 fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_COLOR_TS, true);
673 fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_DEPTH_TS, true);
674 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
675 fd6_cache_inv(batch, batch->draw);
676
677 fd_resource(info->dst.resource)->valid = true;
678 batch->needs_flush = true;
679
680 fd_batch_flush(batch);
681 fd_batch_reference(&batch, NULL);
682
683 return true;
684 }
685
686 /**
687 * Re-written z/s blits can still fail for various reasons (for example MSAA).
688 * But we want to do the fallback blit with the re-written pipe_blit_info,
689 * in particular as u_blitter cannot blit stencil. So handle the fallback
690 * ourself and never "fail".
691 */
692 static bool
693 do_rewritten_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
694 {
695 bool success = handle_rgba_blit(ctx, info);
696 if (!success)
697 success = fd_blitter_blit(ctx, info);
698 debug_assert(success); /* fallback should never fail! */
699 return success;
700 }
701
702 /**
703 * Handle depth/stencil blits either via u_blitter and/or re-writing the
704 * blit into an equivilant format that we can handle
705 */
706 static bool
707 handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
708 {
709 struct pipe_blit_info blit = *info;
710
711 if (DEBUG_BLIT) {
712 fprintf(stderr, "---- handle_zs_blit: ");
713 util_dump_blit_info(stderr, info);
714 fprintf(stderr, "\ndst resource: ");
715 util_dump_resource(stderr, info->dst.resource);
716 fprintf(stderr, "\nsrc resource: ");
717 util_dump_resource(stderr, info->src.resource);
718 fprintf(stderr, "\n");
719 }
720
721 switch (info->dst.format) {
722 case PIPE_FORMAT_S8_UINT:
723 debug_assert(info->mask == PIPE_MASK_S);
724 blit.mask = PIPE_MASK_R;
725 blit.src.format = PIPE_FORMAT_R8_UINT;
726 blit.dst.format = PIPE_FORMAT_R8_UINT;
727 return do_rewritten_blit(ctx, &blit);
728
729 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
730 if (info->mask & PIPE_MASK_Z) {
731 blit.mask = PIPE_MASK_R;
732 blit.src.format = PIPE_FORMAT_R32_FLOAT;
733 blit.dst.format = PIPE_FORMAT_R32_FLOAT;
734 do_rewritten_blit(ctx, &blit);
735 }
736
737 if (info->mask & PIPE_MASK_S) {
738 blit.mask = PIPE_MASK_R;
739 blit.src.format = PIPE_FORMAT_R8_UINT;
740 blit.dst.format = PIPE_FORMAT_R8_UINT;
741 blit.src.resource = &fd_resource(info->src.resource)->stencil->base;
742 blit.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
743 do_rewritten_blit(ctx, &blit);
744 }
745
746 return true;
747
748 case PIPE_FORMAT_Z16_UNORM:
749 blit.mask = PIPE_MASK_R;
750 blit.src.format = PIPE_FORMAT_R16_UNORM;
751 blit.dst.format = PIPE_FORMAT_R16_UNORM;
752 return do_rewritten_blit(ctx, &blit);
753
754 case PIPE_FORMAT_Z32_UNORM:
755 case PIPE_FORMAT_Z32_FLOAT:
756 debug_assert(info->mask == PIPE_MASK_Z);
757 blit.mask = PIPE_MASK_R;
758 blit.src.format = PIPE_FORMAT_R32_UINT;
759 blit.dst.format = PIPE_FORMAT_R32_UINT;
760 return do_rewritten_blit(ctx, &blit);
761
762 case PIPE_FORMAT_Z24X8_UNORM:
763 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
764 blit.mask = 0;
765 if (info->mask & PIPE_MASK_Z)
766 blit.mask |= PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
767 if (info->mask & PIPE_MASK_S)
768 blit.mask |= PIPE_MASK_A;
769 blit.src.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
770 blit.dst.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
771 return fd_blitter_blit(ctx, &blit);
772
773 default:
774 return false;
775 }
776 }
777
778 static bool
779 handle_compressed_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
780 {
781 struct pipe_blit_info blit = *info;
782
783 if (DEBUG_BLIT) {
784 fprintf(stderr, "---- handle_compressed_blit: ");
785 util_dump_blit_info(stderr, info);
786 fprintf(stderr, "\ndst resource: ");
787 util_dump_resource(stderr, info->dst.resource);
788 fprintf(stderr, "\nsrc resource: ");
789 util_dump_resource(stderr, info->src.resource);
790 fprintf(stderr, "\n");
791 }
792
793 if (info->src.format != info->dst.format)
794 return fd_blitter_blit(ctx, info);
795
796 if (util_format_get_blocksize(info->src.format) == 8) {
797 blit.src.format = blit.dst.format = PIPE_FORMAT_R16G16B16A16_UINT;
798 } else {
799 debug_assert(util_format_get_blocksize(info->src.format) == 16);
800 blit.src.format = blit.dst.format = PIPE_FORMAT_R32G32B32A32_UINT;
801 }
802
803 int bw = util_format_get_blockwidth(info->src.format);
804 int bh = util_format_get_blockheight(info->src.format);
805
806 blit.src.box.x /= bw;
807 blit.src.box.y /= bh;
808 blit.src.box.width /= bw;
809 blit.src.box.height /= bh;
810
811 blit.dst.box.x /= bw;
812 blit.dst.box.y /= bh;
813 blit.dst.box.width /= bw;
814 blit.dst.box.height /= bh;
815
816 return do_rewritten_blit(ctx, &blit);
817 }
818
819 static bool
820 fd6_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
821 {
822 if (info->mask & PIPE_MASK_ZS)
823 return handle_zs_blit(ctx, info);
824 if (util_format_is_compressed(info->src.format) ||
825 util_format_is_compressed(info->dst.format))
826 return handle_compressed_blit(ctx, info);
827
828 return handle_rgba_blit(ctx, info);
829 }
830
831 void
832 fd6_blitter_init(struct pipe_context *pctx)
833 {
834 if (fd_mesa_debug & FD_DBG_NOBLIT)
835 return;
836
837 fd_context(pctx)->blit = fd6_blit;
838 }
839
840 unsigned
841 fd6_tile_mode(const struct pipe_resource *tmpl)
842 {
843 /* if the mipmap level 0 is still too small to be tiled, then don't
844 * bother pretending:
845 */
846 if (fd_resource_level_linear(tmpl, 0))
847 return TILE6_LINEAR;
848
849 /* basically just has to be a format we can blit, so uploads/downloads
850 * via linear staging buffer works:
851 */
852 if (ok_format(tmpl->format))
853 return TILE6_3;
854
855 return TILE6_LINEAR;
856 }