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freedreno/a6xx: Pick blitter swap based on resource tiling
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29 #include "util/half_float.h"
30
31 #include "freedreno_blitter.h"
32 #include "freedreno_fence.h"
33 #include "freedreno_resource.h"
34
35 #include "fd6_blitter.h"
36 #include "fd6_format.h"
37 #include "fd6_emit.h"
38 #include "fd6_resource.h"
39 #include "fd6_pack.h"
40
41 /* Make sure none of the requested dimensions extend beyond the size of the
42 * resource. Not entirely sure why this happens, but sometimes it does, and
43 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
44 * back to u_blitter
45 */
46 static bool
47 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
48 {
49 int last_layer =
50 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
51 : r->array_size;
52
53 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
54 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
55 (b->z >= 0) && (b->z + b->depth <= last_layer);
56 }
57
58 static bool
59 ok_format(enum pipe_format pfmt)
60 {
61 enum a6xx_color_fmt fmt = fd6_pipe2color(pfmt);
62
63 switch (pfmt) {
64 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
65 case PIPE_FORMAT_Z24X8_UNORM:
66 case PIPE_FORMAT_Z16_UNORM:
67 case PIPE_FORMAT_Z32_UNORM:
68 case PIPE_FORMAT_Z32_FLOAT:
69 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
70 case PIPE_FORMAT_S8_UINT:
71 return true;
72 default:
73 break;
74 }
75
76 if (fmt == ~0)
77 return false;
78
79 if (fd6_ifmt(fmt) == 0)
80 return false;
81
82 return true;
83 }
84
85 #define DEBUG_BLIT 0
86 #define DEBUG_BLIT_FALLBACK 0
87
88 #define fail_if(cond) \
89 do { \
90 if (cond) { \
91 if (DEBUG_BLIT_FALLBACK) { \
92 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
93 util_dump_blit_info(stderr, info); \
94 fprintf(stderr, "\nsrc: "); \
95 util_dump_resource(stderr, info->src.resource); \
96 fprintf(stderr, "\ndst: "); \
97 util_dump_resource(stderr, info->dst.resource); \
98 fprintf(stderr, "\n"); \
99 } \
100 return false; \
101 } \
102 } while (0)
103
104 static bool
105 can_do_blit(const struct pipe_blit_info *info)
106 {
107 /* I think we can do scaling, but not in z dimension since that would
108 * require blending..
109 */
110 fail_if(info->dst.box.depth != info->src.box.depth);
111
112 /* Fail if unsupported format: */
113 fail_if(!ok_format(info->src.format));
114 fail_if(!ok_format(info->dst.format));
115
116 /* We can blit if both or neither formats are compressed formats... */
117 fail_if(util_format_is_compressed(info->src.format) !=
118 util_format_is_compressed(info->src.format));
119
120 /* ... but only if they're the same compression format. */
121 fail_if(util_format_is_compressed(info->src.format) &&
122 info->src.format != info->dst.format);
123
124 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
125
126 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
127
128 debug_assert(info->dst.box.width >= 0);
129 debug_assert(info->dst.box.height >= 0);
130 debug_assert(info->dst.box.depth >= 0);
131
132 /* We could probably blit between resources with equal sample count.. */
133 fail_if(info->dst.resource->nr_samples > 1);
134
135 /* CP_BLIT supports resolving, but seems to pick one only of the samples
136 * (no blending). This doesn't work for RGBA resolves, so we fall back in
137 * that case. However, GL/GLES spec says:
138 *
139 * "If the source formats are integer types or stencil values, a single
140 * sample’s value is selected for each pixel. If the source formats are
141 * floating-point or normalized types, the sample values for each pixel
142 * are resolved in an implementationdependent manner. If the source
143 * formats are depth values, sample values are resolved in an
144 * implementation-dependent manner where the result will be between the
145 * minimum and maximum depth values in the pixel."
146 *
147 * so do those with CP_BLIT.
148 *
149 * TODO since we re-write z/s blits to RGBA, we'll fail this check in some
150 * cases where we don't need to.
151 */
152 fail_if((info->mask & PIPE_MASK_RGBA) &&
153 info->src.resource->nr_samples > 1);
154
155 fail_if(info->window_rectangle_include);
156
157 fail_if(util_format_is_srgb(info->src.format));
158 fail_if(util_format_is_srgb(info->dst.format));
159
160 const struct util_format_description *src_desc =
161 util_format_description(info->src.format);
162 const struct util_format_description *dst_desc =
163 util_format_description(info->dst.format);
164 const int common_channels = MIN2(src_desc->nr_channels, dst_desc->nr_channels);
165
166 if (info->mask & PIPE_MASK_RGBA) {
167 for (int i = 0; i < common_channels; i++) {
168 fail_if(memcmp(&src_desc->channel[i],
169 &dst_desc->channel[i],
170 sizeof(src_desc->channel[0])));
171 }
172 }
173
174 fail_if(info->alpha_blend);
175
176 return true;
177 }
178
179 static void
180 emit_setup(struct fd_batch *batch)
181 {
182 struct fd_ringbuffer *ring = batch->draw;
183
184 fd6_event_write(batch, ring, 0x1d, true);
185 fd6_event_write(batch, ring, FACENESS_FLUSH, true);
186 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
187 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
188 }
189
190 static uint32_t
191 blit_control(enum a6xx_color_fmt fmt)
192 {
193 unsigned blit_cntl = 0xf00000;
194 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt);
195 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_IFMT(fd6_ifmt(fmt));
196 return blit_cntl;
197 }
198
199 /* buffers need to be handled specially since x/width can exceed the bounds
200 * supported by hw.. if necessary decompose into (potentially) two 2D blits
201 */
202 static void
203 emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring,
204 const struct pipe_blit_info *info)
205 {
206 const struct pipe_box *sbox = &info->src.box;
207 const struct pipe_box *dbox = &info->dst.box;
208 struct fd_resource *src, *dst;
209 unsigned sshift, dshift;
210
211 if (DEBUG_BLIT) {
212 fprintf(stderr, "buffer blit: ");
213 util_dump_blit_info(stderr, info);
214 fprintf(stderr, "\ndst resource: ");
215 util_dump_resource(stderr, info->dst.resource);
216 fprintf(stderr, "\nsrc resource: ");
217 util_dump_resource(stderr, info->src.resource);
218 fprintf(stderr, "\n");
219 }
220
221 src = fd_resource(info->src.resource);
222 dst = fd_resource(info->dst.resource);
223
224 debug_assert(src->layout.cpp == 1);
225 debug_assert(dst->layout.cpp == 1);
226 debug_assert(info->src.resource->format == info->dst.resource->format);
227 debug_assert((sbox->y == 0) && (sbox->height == 1));
228 debug_assert((dbox->y == 0) && (dbox->height == 1));
229 debug_assert((sbox->z == 0) && (sbox->depth == 1));
230 debug_assert((dbox->z == 0) && (dbox->depth == 1));
231 debug_assert(sbox->width == dbox->width);
232 debug_assert(info->src.level == 0);
233 debug_assert(info->dst.level == 0);
234
235 /*
236 * Buffers can have dimensions bigger than max width, remap into
237 * multiple 1d blits to fit within max dimension
238 *
239 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
240 * seems to prevent overfetch related faults. Not quite sure what
241 * the deal is there.
242 *
243 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
244 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
245 * difference. On top of already splitting up the blit so width
246 * isn't > 16k.
247 *
248 * We perhaps could do a bit better, if src and dst are aligned but
249 * in the worst case this means we have to split the copy up into
250 * 16k (0x4000) minus 64 (0x40).
251 */
252
253 sshift = sbox->x & 0x3f;
254 dshift = dbox->x & 0x3f;
255
256 OUT_PKT7(ring, CP_SET_MARKER, 1);
257 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
258
259 uint32_t blit_cntl = blit_control(RB6_R8_UNORM) | 0x20000000;
260 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
261 OUT_RING(ring, blit_cntl);
262
263 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
264 OUT_RING(ring, blit_cntl);
265
266 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
267 unsigned soff, doff, w, p;
268
269 soff = (sbox->x + off) & ~0x3f;
270 doff = (dbox->x + off) & ~0x3f;
271
272 w = MIN2(sbox->width - off, (0x4000 - 0x40));
273 p = align(w, 64);
274
275 debug_assert((soff + w) <= fd_bo_size(src->bo));
276 debug_assert((doff + w) <= fd_bo_size(dst->bo));
277
278 /*
279 * Emit source:
280 */
281 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
282 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
283 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
284 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) |
285 0x500000);
286 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
287 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
288 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
289 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
290
291 OUT_RING(ring, 0x00000000);
292 OUT_RING(ring, 0x00000000);
293 OUT_RING(ring, 0x00000000);
294 OUT_RING(ring, 0x00000000);
295 OUT_RING(ring, 0x00000000);
296
297 /*
298 * Emit destination:
299 */
300 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
301 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
302 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
303 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
304 OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
305 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
306 OUT_RING(ring, 0x00000000);
307 OUT_RING(ring, 0x00000000);
308 OUT_RING(ring, 0x00000000);
309 OUT_RING(ring, 0x00000000);
310 OUT_RING(ring, 0x00000000);
311
312 /*
313 * Blit command:
314 */
315 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
316 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
317 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
318 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
319 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
320
321 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
322 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
323 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
324
325 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
326 OUT_RING(ring, 0x3f);
327 OUT_WFI5(ring);
328
329 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
330 OUT_RING(ring, 0);
331
332 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
333 OUT_RING(ring, 0xf180);
334
335 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
336 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
337
338 OUT_PKT7(ring, CP_BLIT, 1);
339 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
340
341 OUT_WFI5(ring);
342
343 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
344 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
345 }
346 }
347
348 static void
349 emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
350 const struct pipe_blit_info *info, union pipe_color_union *color)
351 {
352 const struct pipe_box *sbox = &info->src.box;
353 const struct pipe_box *dbox = &info->dst.box;
354 struct fd_resource *src, *dst;
355 struct fdl_slice *sslice, *dslice;
356 enum a6xx_color_fmt sfmt, dfmt;
357 enum a6xx_tile_mode stile, dtile;
358 enum a3xx_color_swap sswap, dswap;
359 unsigned spitch, dpitch;
360 int sx1, sy1, sx2, sy2;
361 int dx1, dy1, dx2, dy2;
362
363 if (DEBUG_BLIT) {
364 fprintf(stderr, "texture blit: ");
365 util_dump_blit_info(stderr, info);
366 fprintf(stderr, "\ndst resource: ");
367 util_dump_resource(stderr, info->dst.resource);
368 fprintf(stderr, "\nsrc resource: ");
369 util_dump_resource(stderr, info->src.resource);
370 fprintf(stderr, "\n");
371 }
372
373 src = fd_resource(info->src.resource);
374 dst = fd_resource(info->dst.resource);
375
376 sslice = fd_resource_slice(src, info->src.level);
377 dslice = fd_resource_slice(dst, info->dst.level);
378
379 sfmt = fd6_pipe2color(info->src.format);
380 dfmt = fd6_pipe2color(info->dst.format);
381
382 int blocksize = util_format_get_blocksize(info->src.format);
383 int blockwidth = util_format_get_blockwidth(info->src.format);
384 int blockheight = util_format_get_blockheight(info->src.format);
385 int nelements;
386
387 stile = fd_resource_tile_mode(info->src.resource, info->src.level);
388 dtile = fd_resource_tile_mode(info->dst.resource, info->dst.level);
389
390 /* Linear levels of a tiled resource are always WZYX, so look at
391 * rsc->tile_mode to determine the swap.
392 */
393 sswap = src->layout.tile_mode ? WZYX : fd6_pipe2swap(info->src.format);
394 dswap = dst->layout.tile_mode ? WZYX : fd6_pipe2swap(info->dst.format);
395
396 if (util_format_is_compressed(info->src.format)) {
397 debug_assert(info->src.format == info->dst.format);
398 sfmt = dfmt = RB6_R8_UNORM;
399 nelements = blocksize;
400 } else {
401 debug_assert(!util_format_is_compressed(info->dst.format));
402 nelements = (dst->base.nr_samples ? dst->base.nr_samples : 1);
403 }
404
405 spitch = DIV_ROUND_UP(sslice->pitch, blockwidth) * src->layout.cpp;
406 dpitch = DIV_ROUND_UP(dslice->pitch, blockwidth) * dst->layout.cpp;
407
408 sx1 = sbox->x / blockwidth * nelements;
409 sy1 = sbox->y / blockheight;
410 sx2 = DIV_ROUND_UP(sbox->x + sbox->width, blockwidth) * nelements - 1;
411 sy2 = DIV_ROUND_UP(sbox->y + sbox->height, blockheight) - 1;
412
413 dx1 = dbox->x / blockwidth * nelements;
414 dy1 = dbox->y / blockheight;
415 dx2 = DIV_ROUND_UP(dbox->x + dbox->width, blockwidth) * nelements - 1;
416 dy2 = DIV_ROUND_UP(dbox->y + dbox->height, blockheight) - 1;
417
418 uint32_t width = DIV_ROUND_UP(u_minify(src->base.width0, info->src.level), blockwidth) * nelements;
419 uint32_t height = DIV_ROUND_UP(u_minify(src->base.height0, info->src.level), blockheight);
420
421 OUT_PKT7(ring, CP_SET_MARKER, 1);
422 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
423
424 uint32_t blit_cntl = blit_control(dfmt);
425
426 if (color) {
427 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR;
428
429 switch (info->dst.format) {
430 case PIPE_FORMAT_Z24X8_UNORM:
431 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
432 case PIPE_FORMAT_X24S8_UINT: {
433 uint32_t depth_unorm24 = color->f[0] * ((1u << 24) - 1);
434 uint8_t stencil = color->ui[1];
435 color->ui[0] = depth_unorm24 & 0xff;
436 color->ui[1] = (depth_unorm24 >> 8) & 0xff;
437 color->ui[2] = (depth_unorm24 >> 16) & 0xff;
438 color->ui[3] = stencil;
439
440 dfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
441 break;
442 }
443 case PIPE_FORMAT_B5G6R5_UNORM:
444 case PIPE_FORMAT_B5G5R5A1_UNORM:
445 case PIPE_FORMAT_B5G5R5X1_UNORM:
446 case PIPE_FORMAT_B4G4R4A4_UNORM:
447 color->ui[0] = float_to_ubyte(color->f[0]);
448 color->ui[1] = float_to_ubyte(color->f[1]);
449 color->ui[2] = float_to_ubyte(color->f[2]);
450 color->ui[3] = float_to_ubyte(color->f[3]);
451 break;
452 default:
453 break;
454 }
455
456 OUT_PKT4(ring, REG_A6XX_RB_2D_SRC_SOLID_C0, 4);
457
458 switch (fd6_ifmt(dfmt)) {
459 case R2D_UNORM8:
460 case R2D_UNORM8_SRGB:
461 OUT_RING(ring, float_to_ubyte(color->f[0]));
462 OUT_RING(ring, float_to_ubyte(color->f[1]));
463 OUT_RING(ring, float_to_ubyte(color->f[2]));
464 OUT_RING(ring, float_to_ubyte(color->f[3]));
465 break;
466 case R2D_FLOAT16:
467 OUT_RING(ring, _mesa_float_to_half(color->f[0]));
468 OUT_RING(ring, _mesa_float_to_half(color->f[1]));
469 OUT_RING(ring, _mesa_float_to_half(color->f[2]));
470 OUT_RING(ring, _mesa_float_to_half(color->f[3]));
471 sfmt = RB6_R16G16B16A16_FLOAT;
472 break;
473
474 case R2D_FLOAT32:
475 case R2D_INT32:
476 case R2D_INT16:
477 case R2D_INT8:
478 case R2D_RAW:
479 default:
480 OUT_RING(ring, color->ui[0]);
481 OUT_RING(ring, color->ui[1]);
482 OUT_RING(ring, color->ui[2]);
483 OUT_RING(ring, color->ui[3]);
484 break;
485 }
486 }
487
488 if (dtile != stile)
489 blit_cntl |= 0x20000000;
490
491 if (info->scissor_enable) {
492 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
493 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
494 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
495 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
496 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
497 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
498 }
499
500 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
501 OUT_RING(ring, blit_cntl);
502
503 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
504 OUT_RING(ring, blit_cntl);
505
506 for (unsigned i = 0; i < info->dst.box.depth; i++) {
507 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
508 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
509 bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
510 bool dubwc_enabled = fd_resource_ubwc_enabled(dst, info->dst.level);
511
512 /*
513 * Emit source:
514 */
515 uint32_t filter = 0;
516 if (info->filter == PIPE_TEX_FILTER_LINEAR)
517 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
518
519 enum a3xx_msaa_samples samples = fd_msaa_samples(src->base.nr_samples);
520
521 if (sfmt == RB6_R10G10B10A2_UNORM)
522 sfmt = RB6_R10G10B10A2_FLOAT16;
523
524 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
525 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
526 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
527 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) |
528 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples) |
529 COND(subwc_enabled, A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
530 0x500000 | filter);
531 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
532 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
533 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
534 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
535
536 OUT_RING(ring, 0x00000000);
537 OUT_RING(ring, 0x00000000);
538 OUT_RING(ring, 0x00000000);
539 OUT_RING(ring, 0x00000000);
540 OUT_RING(ring, 0x00000000);
541
542 if (subwc_enabled) {
543 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
544 fd6_emit_flag_reference(ring, src, info->src.level, sbox->z + i);
545 OUT_RING(ring, 0x00000000);
546 OUT_RING(ring, 0x00000000);
547 OUT_RING(ring, 0x00000000);
548 }
549
550 /*
551 * Emit destination:
552 */
553 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
554 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
555 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
556 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap) |
557 COND(dubwc_enabled, A6XX_RB_2D_DST_INFO_FLAGS));
558 OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
559 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
560 OUT_RING(ring, 0x00000000);
561 OUT_RING(ring, 0x00000000);
562 OUT_RING(ring, 0x00000000);
563 OUT_RING(ring, 0x00000000);
564 OUT_RING(ring, 0x00000000);
565
566 if (dubwc_enabled) {
567 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
568 fd6_emit_flag_reference(ring, dst, info->dst.level, dbox->z + i);
569 OUT_RING(ring, 0x00000000);
570 OUT_RING(ring, 0x00000000);
571 OUT_RING(ring, 0x00000000);
572 }
573
574 /*
575 * Blit command:
576 */
577 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
578 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
579 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
580 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
581 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
582
583 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
584 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
585 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
586
587 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
588 OUT_RING(ring, 0x3f);
589 OUT_WFI5(ring);
590
591 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
592 OUT_RING(ring, 0);
593
594 if (dfmt == RB6_R10G10B10A2_UNORM)
595 sfmt = RB6_R16G16B16A16_FLOAT;
596
597 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
598 OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
599 COND(util_format_is_pure_sint(info->src.format),
600 A6XX_SP_2D_SRC_FORMAT_SINT) |
601 COND(util_format_is_pure_uint(info->src.format),
602 A6XX_SP_2D_SRC_FORMAT_UINT) |
603 COND(util_format_is_snorm(info->src.format),
604 A6XX_SP_2D_SRC_FORMAT_SINT |
605 A6XX_SP_2D_SRC_FORMAT_NORM) |
606 COND(util_format_is_unorm(info->src.format),
607 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
608 // A6XX_SP_2D_SRC_FORMAT_UINT |
609 A6XX_SP_2D_SRC_FORMAT_NORM) |
610 0xf000);
611
612 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
613 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
614
615 OUT_PKT7(ring, CP_BLIT, 1);
616 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
617
618 OUT_WFI5(ring);
619
620 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
621 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
622 }
623 }
624
625 void
626 fd6_clear_surface(struct fd_context *ctx,
627 struct fd_ringbuffer *ring, struct pipe_surface *psurf,
628 uint32_t width, uint32_t height, union pipe_color_union *color)
629 {
630 struct pipe_blit_info info = {};
631
632 info.dst.resource = psurf->texture;
633 info.dst.level = psurf->u.tex.level;
634 info.dst.box.x = 0;
635 info.dst.box.y = 0;
636 info.dst.box.z = psurf->u.tex.first_layer;
637 info.dst.box.width = width;
638 info.dst.box.height = height;
639 info.dst.box.depth = psurf->u.tex.last_layer + 1 - psurf->u.tex.first_layer;
640 info.dst.format = psurf->format;
641 info.src = info.dst;
642 info.mask = util_format_get_mask(psurf->format);
643 info.filter = PIPE_TEX_FILTER_NEAREST;
644 info.scissor_enable = 0;
645
646 emit_blit_or_clear_texture(ctx, ring, &info, color);
647 }
648
649 static bool handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info);
650
651 /**
652 * Re-written z/s blits can still fail for various reasons (for example MSAA).
653 * But we want to do the fallback blit with the re-written pipe_blit_info,
654 * in particular as u_blitter cannot blit stencil. So handle the fallback
655 * ourself and never "fail".
656 */
657 static bool
658 do_rewritten_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
659 {
660 bool success = handle_rgba_blit(ctx, info);
661 if (!success)
662 success = fd_blitter_blit(ctx, info);
663 debug_assert(success); /* fallback should never fail! */
664 return success;
665 }
666
667 /**
668 * Handle depth/stencil blits either via u_blitter and/or re-writing the
669 * blit into an equivilant format that we can handle
670 */
671 static bool
672 handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
673 {
674 struct pipe_blit_info blit = *info;
675
676 if (DEBUG_BLIT) {
677 fprintf(stderr, "---- handle_zs_blit: ");
678 util_dump_blit_info(stderr, info);
679 fprintf(stderr, "\ndst resource: ");
680 util_dump_resource(stderr, info->dst.resource);
681 fprintf(stderr, "\nsrc resource: ");
682 util_dump_resource(stderr, info->src.resource);
683 fprintf(stderr, "\n");
684 }
685
686 switch (info->dst.format) {
687 case PIPE_FORMAT_S8_UINT:
688 debug_assert(info->mask == PIPE_MASK_S);
689 blit.mask = PIPE_MASK_R;
690 blit.src.format = PIPE_FORMAT_R8_UINT;
691 blit.dst.format = PIPE_FORMAT_R8_UINT;
692 return do_rewritten_blit(ctx, &blit);
693
694 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
695 if (info->mask & PIPE_MASK_Z) {
696 blit.mask = PIPE_MASK_R;
697 blit.src.format = PIPE_FORMAT_R32_FLOAT;
698 blit.dst.format = PIPE_FORMAT_R32_FLOAT;
699 do_rewritten_blit(ctx, &blit);
700 }
701
702 if (info->mask & PIPE_MASK_S) {
703 blit.mask = PIPE_MASK_R;
704 blit.src.format = PIPE_FORMAT_R8_UINT;
705 blit.dst.format = PIPE_FORMAT_R8_UINT;
706 blit.src.resource = &fd_resource(info->src.resource)->stencil->base;
707 blit.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
708 do_rewritten_blit(ctx, &blit);
709 }
710
711 return true;
712
713 case PIPE_FORMAT_Z16_UNORM:
714 blit.mask = PIPE_MASK_R;
715 blit.src.format = PIPE_FORMAT_R16_UNORM;
716 blit.dst.format = PIPE_FORMAT_R16_UNORM;
717 return do_rewritten_blit(ctx, &blit);
718
719 case PIPE_FORMAT_Z32_UNORM:
720 case PIPE_FORMAT_Z32_FLOAT:
721 debug_assert(info->mask == PIPE_MASK_Z);
722 blit.mask = PIPE_MASK_R;
723 blit.src.format = PIPE_FORMAT_R32_UINT;
724 blit.dst.format = PIPE_FORMAT_R32_UINT;
725 return do_rewritten_blit(ctx, &blit);
726
727 case PIPE_FORMAT_Z24X8_UNORM:
728 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
729 blit.mask = 0;
730 if (info->mask & PIPE_MASK_Z)
731 blit.mask |= PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
732 if (info->mask & PIPE_MASK_S)
733 blit.mask |= PIPE_MASK_A;
734 blit.src.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
735 blit.dst.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
736 return fd_blitter_blit(ctx, &blit);
737
738 default:
739 return false;
740 }
741 }
742
743 static bool
744 handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
745 {
746 struct fd_batch *batch;
747
748 debug_assert(!(info->mask & PIPE_MASK_ZS));
749
750 if (!can_do_blit(info))
751 return false;
752
753 fd_fence_ref(&ctx->last_fence, NULL);
754
755 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
756
757 fd6_emit_restore(batch, batch->draw);
758 fd6_emit_lrz_flush(batch->draw);
759
760 mtx_lock(&ctx->screen->lock);
761
762 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
763 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
764
765 mtx_unlock(&ctx->screen->lock);
766
767 emit_setup(batch);
768
769 if ((info->src.resource->target == PIPE_BUFFER) &&
770 (info->dst.resource->target == PIPE_BUFFER)) {
771 assert(fd_resource(info->src.resource)->layout.tile_mode == TILE6_LINEAR);
772 assert(fd_resource(info->dst.resource)->layout.tile_mode == TILE6_LINEAR);
773 emit_blit_buffer(ctx, batch->draw, info);
774 } else {
775 /* I don't *think* we need to handle blits between buffer <-> !buffer */
776 debug_assert(info->src.resource->target != PIPE_BUFFER);
777 debug_assert(info->dst.resource->target != PIPE_BUFFER);
778 emit_blit_or_clear_texture(ctx, batch->draw, info, NULL);
779 }
780
781 fd6_event_write(batch, batch->draw, 0x1d, true);
782 fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
783 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
784 fd6_cache_inv(batch, batch->draw);
785
786 fd_resource(info->dst.resource)->valid = true;
787 batch->needs_flush = true;
788
789 fd_batch_flush(batch, false);
790 fd_batch_reference(&batch, NULL);
791
792 return true;
793 }
794
795 static bool
796 fd6_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
797 {
798 if (info->mask & PIPE_MASK_ZS)
799 return handle_zs_blit(ctx, info);
800 return handle_rgba_blit(ctx, info);
801 }
802
803 void
804 fd6_blitter_init(struct pipe_context *pctx)
805 {
806 if (fd_mesa_debug & FD_DBG_NOBLIT)
807 return;
808
809 fd_context(pctx)->blit = fd6_blit;
810 }
811
812 unsigned
813 fd6_tile_mode(const struct pipe_resource *tmpl)
814 {
815 /* if the mipmap level 0 is still too small to be tiled, then don't
816 * bother pretending:
817 */
818 if (fd_resource_level_linear(tmpl, 0))
819 return TILE6_LINEAR;
820
821 /* basically just has to be a format we can blit, so uploads/downloads
822 * via linear staging buffer works:
823 */
824 if (ok_format(tmpl->format))
825 return TILE6_3;
826
827 return TILE6_LINEAR;
828 }