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c962fe7997075ecd89135e8211b6f166f44ca705
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29
30 #include "freedreno_blitter.h"
31 #include "freedreno_resource.h"
32
33 #include "fd6_blitter.h"
34 #include "fd6_format.h"
35 #include "fd6_emit.h"
36
37 /* Make sure none of the requested dimensions extend beyond the size of the
38 * resource. Not entirely sure why this happens, but sometimes it does, and
39 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
40 * back to u_blitter
41 */
42 static bool
43 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
44 {
45 int last_layer =
46 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
47 : r->array_size;
48
49
50 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
51 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
52 (b->z >= 0) && (b->z + b->depth <= last_layer);
53 }
54
55 #define DEBUG_BLIT_FALLBACK 0
56 #define fail_if(cond) \
57 do { \
58 if (cond) { \
59 if (DEBUG_BLIT_FALLBACK) { \
60 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
61 util_dump_blit_info(stderr, info); \
62 fprintf(stderr, "\nsrc: "); \
63 util_dump_resource(stderr, info->src.resource); \
64 fprintf(stderr, "\ndst: "); \
65 util_dump_resource(stderr, info->dst.resource); \
66 fprintf(stderr, "\n"); \
67 } \
68 return false; \
69 } \
70 } while (0)
71
72 static bool
73 can_do_blit(const struct pipe_blit_info *info)
74 {
75 /* I think we can do scaling, but not in z dimension since that would
76 * require blending..
77 */
78 fail_if(info->dst.box.depth != info->src.box.depth);
79
80 /* We can blit if both or neither formats are compressed formats... */
81 fail_if(util_format_is_compressed(info->src.format) !=
82 util_format_is_compressed(info->src.format));
83
84 /* ... but only if they're the same compression format. */
85 fail_if(util_format_is_compressed(info->src.format) &&
86 info->src.format != info->dst.format);
87
88 /* hw ignores {SRC,DST}_INFO.COLOR_SWAP if {SRC,DST}_INFO.TILE_MODE
89 * is set (not linear). We can kind of get around that when tiling/
90 * untiling by setting both src and dst COLOR_SWAP=WZYX, but that
91 * means the formats must match:
92 */
93 fail_if((fd_resource(info->dst.resource)->tile_mode ||
94 fd_resource(info->src.resource)->tile_mode) &&
95 info->dst.format != info->src.format);
96
97 /* src box can be inverted, which we don't support.. dst box cannot: */
98 fail_if((info->src.box.width < 0) || (info->src.box.height < 0));
99
100 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
101
102 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
103
104 debug_assert(info->dst.box.width >= 0);
105 debug_assert(info->dst.box.height >= 0);
106 debug_assert(info->dst.box.depth >= 0);
107
108 fail_if(info->dst.resource->nr_samples + info->src.resource->nr_samples > 2);
109
110 fail_if(info->window_rectangle_include);
111
112 fail_if(info->render_condition_enable);
113
114 fail_if(info->alpha_blend);
115
116 fail_if(info->mask != util_format_get_mask(info->src.format));
117
118 fail_if(info->mask != util_format_get_mask(info->dst.format));
119
120 return true;
121 }
122
123 static void
124 emit_setup(struct fd_ringbuffer *ring)
125 {
126 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
127 OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
128
129 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
130 OUT_RING(ring, LRZ_FLUSH);
131
132 OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
133 OUT_RING(ring, 0x0);
134
135 OUT_WFI5(ring);
136
137 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
138 OUT_RING(ring, 0x10000000);
139 }
140
141 /* buffers need to be handled specially since x/width can exceed the bounds
142 * supported by hw.. if necessary decompose into (potentially) two 2D blits
143 */
144 static void
145 emit_blit_buffer(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
146 {
147 const struct pipe_box *sbox = &info->src.box;
148 const struct pipe_box *dbox = &info->dst.box;
149 struct fd_resource *src, *dst;
150 unsigned sshift, dshift;
151
152 if (DEBUG_BLIT_FALLBACK) {
153 fprintf(stderr, "buffer blit: ");
154 util_dump_blit_info(stderr, info);
155 fprintf(stderr, "\ndst resource: ");
156 util_dump_resource(stderr, info->dst.resource);
157 fprintf(stderr, "\nsrc resource: ");
158 util_dump_resource(stderr, info->src.resource);
159 fprintf(stderr, "\n");
160 }
161
162 src = fd_resource(info->src.resource);
163 dst = fd_resource(info->dst.resource);
164
165 debug_assert(src->cpp == 1);
166 debug_assert(dst->cpp == 1);
167 debug_assert(info->src.resource->format == info->dst.resource->format);
168 debug_assert((sbox->y == 0) && (sbox->height == 1));
169 debug_assert((dbox->y == 0) && (dbox->height == 1));
170 debug_assert((sbox->z == 0) && (sbox->depth == 1));
171 debug_assert((dbox->z == 0) && (dbox->depth == 1));
172 debug_assert(sbox->width == dbox->width);
173 debug_assert(info->src.level == 0);
174 debug_assert(info->dst.level == 0);
175
176 /*
177 * Buffers can have dimensions bigger than max width, remap into
178 * multiple 1d blits to fit within max dimension
179 *
180 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
181 * seems to prevent overfetch related faults. Not quite sure what
182 * the deal is there.
183 *
184 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
185 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
186 * difference. On top of already splitting up the blit so width
187 * isn't > 16k.
188 *
189 * We perhaps could do a bit better, if src and dst are aligned but
190 * in the worst case this means we have to split the copy up into
191 * 16k (0x4000) minus 64 (0x40).
192 */
193
194 sshift = sbox->x & 0x3f;
195 dshift = dbox->x & 0x3f;
196
197 OUT_PKT7(ring, CP_SET_MARKER, 1);
198 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
199
200 uint32_t blit_cntl = A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(RB6_R8_UNORM) | 0x20f00000;
201 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
202 OUT_RING(ring, blit_cntl);
203
204 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
205 OUT_RING(ring, blit_cntl);
206
207 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
208 unsigned soff, doff, w, p;
209
210 soff = (sbox->x + off) & ~0x3f;
211 doff = (dbox->x + off) & ~0x3f;
212
213 w = MIN2(sbox->width - off, (0x4000 - 0x40));
214 p = align(w, 64);
215
216 debug_assert((soff + w) <= fd_bo_size(src->bo));
217 debug_assert((doff + w) <= fd_bo_size(dst->bo));
218
219 /*
220 * Emit source:
221 */
222 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
223 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
224 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
225 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) | 0x500000);
226 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
227 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
228 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
229 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
230
231 OUT_RING(ring, 0x00000000);
232 OUT_RING(ring, 0x00000000);
233 OUT_RING(ring, 0x00000000);
234 OUT_RING(ring, 0x00000000);
235 OUT_RING(ring, 0x00000000);
236
237 OUT_RING(ring, 0x00000000);
238 OUT_RING(ring, 0x00000000);
239 OUT_RING(ring, 0x00000000);
240
241 /*
242 * Emit destination:
243 */
244 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
245 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
246 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
247 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
248 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
249 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
250 OUT_RING(ring, 0x00000000);
251 OUT_RING(ring, 0x00000000);
252 OUT_RING(ring, 0x00000000);
253 OUT_RING(ring, 0x00000000);
254 OUT_RING(ring, 0x00000000);
255
256 /*
257 * Blit command:
258 */
259 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
260 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
261 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
262 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
263 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
264
265 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
266 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
267 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
268
269 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
270 OUT_RING(ring, 0x3f);
271 OUT_WFI5(ring);
272
273 OUT_PKT4(ring, 0x8c01, 1);
274 OUT_RING(ring, 0);
275
276 OUT_PKT4(ring, 0xacc0, 1);
277 OUT_RING(ring, 0xf180);
278
279 OUT_PKT4(ring, 0x8e04, 1);
280 OUT_RING(ring, 0x01000000);
281
282 OUT_PKT7(ring, CP_BLIT, 1);
283 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
284
285 OUT_WFI5(ring);
286
287 OUT_PKT4(ring, 0x8e04, 1);
288 OUT_RING(ring, 0);
289 }
290 }
291
292 static void
293 emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
294 {
295 const struct pipe_box *sbox = &info->src.box;
296 const struct pipe_box *dbox = &info->dst.box;
297 struct fd_resource *src, *dst;
298 struct fd_resource_slice *sslice, *dslice;
299 enum a6xx_color_fmt sfmt, dfmt;
300 enum a6xx_tile_mode stile, dtile;
301 enum a3xx_color_swap sswap, dswap;
302 unsigned spitch, dpitch;
303 unsigned sx1, sy1, sx2, sy2;
304 unsigned dx1, dy1, dx2, dy2;
305
306 if (DEBUG_BLIT_FALLBACK) {
307 fprintf(stderr, "texture blit: ");
308 util_dump_blit_info(stderr, info);
309 fprintf(stderr, "\ndst resource: ");
310 util_dump_resource(stderr, info->dst.resource);
311 fprintf(stderr, "\nsrc resource: ");
312 util_dump_resource(stderr, info->src.resource);
313 fprintf(stderr, "\n");
314 }
315
316 src = fd_resource(info->src.resource);
317 dst = fd_resource(info->dst.resource);
318
319 sslice = fd_resource_slice(src, info->src.level);
320 dslice = fd_resource_slice(dst, info->dst.level);
321
322 sfmt = fd6_pipe2color(info->src.format);
323 dfmt = fd6_pipe2color(info->dst.format);
324
325 int blocksize = util_format_get_blocksize(info->src.format);
326 int blockwidth = util_format_get_blockwidth(info->src.format);
327 int blockheight = util_format_get_blockheight(info->src.format);
328 int nelements;
329
330 stile = fd_resource_level_linear(info->src.resource, info->src.level) ?
331 TILE6_LINEAR : src->tile_mode;
332 dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ?
333 TILE6_LINEAR : dst->tile_mode;
334
335 sswap = fd6_pipe2swap(info->src.format);
336 dswap = fd6_pipe2swap(info->dst.format);
337
338 if (util_format_is_compressed(info->src.format)) {
339 debug_assert(info->src.format == info->dst.format);
340 sfmt = dfmt = RB6_R8_UNORM;
341 nelements = blocksize;
342 } else {
343 debug_assert(!util_format_is_compressed(info->dst.format));
344 nelements = 1;
345 }
346
347 spitch = DIV_ROUND_UP(sslice->pitch, blockwidth) * src->cpp;
348 dpitch = DIV_ROUND_UP(dslice->pitch, blockwidth) * dst->cpp;
349
350 sx1 = sbox->x / blockwidth * nelements;
351 sy1 = sbox->y / blockheight;
352 sx2 = DIV_ROUND_UP(sbox->x + sbox->width, blockwidth) * nelements - 1;
353 sy2 = DIV_ROUND_UP(sbox->y + sbox->height, blockheight) - 1;
354
355 dx1 = dbox->x / blockwidth * nelements;
356 dy1 = dbox->y / blockheight;
357 dx2 = DIV_ROUND_UP(dbox->x + dbox->width, blockwidth) * nelements - 1;
358 dy2 = DIV_ROUND_UP(dbox->y + dbox->height, blockheight) - 1;
359
360 uint32_t width = DIV_ROUND_UP(u_minify(src->base.width0, info->src.level), blockwidth) * nelements;
361 uint32_t height = DIV_ROUND_UP(u_minify(src->base.height0, info->src.level), blockheight);
362
363 /* if dtile, then dswap ignored by hw, and likewise if stile then sswap
364 * ignored by hw.. but in this case we have already rejected the blit
365 * if src and dst formats differ, so juse use WZYX for both src and
366 * dst swap mode (so we don't change component order)
367 */
368 if (stile || dtile) {
369 debug_assert(info->src.format == info->dst.format);
370 sswap = dswap = WZYX;
371 }
372
373 OUT_PKT7(ring, CP_SET_MARKER, 1);
374 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
375
376 uint32_t blit_cntl = A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(dfmt) | 0xf00000;
377
378 if (dtile != stile)
379 blit_cntl |= 0x20000000;
380
381 if (info->scissor_enable) {
382 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
383 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
384 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
385 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
386 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
387 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
388 }
389
390 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
391 OUT_RING(ring, blit_cntl);
392
393 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
394 OUT_RING(ring, blit_cntl);
395
396 for (unsigned i = 0; i < info->dst.box.depth; i++) {
397 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
398 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
399
400 /*
401 * Emit source:
402 */
403 uint32_t filter = 0;
404 if (info->filter == PIPE_TEX_FILTER_LINEAR)
405 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
406
407 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
408 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
409 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
410 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) | 0x500000 | filter);
411 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
412 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
413 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
414 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
415 OUT_RING(ring, 0x00000000);
416 OUT_RING(ring, 0x00000000);
417 OUT_RING(ring, 0x00000000);
418 OUT_RING(ring, 0x00000000);
419 OUT_RING(ring, 0x00000000);
420
421 OUT_RING(ring, 0x00000000);
422 OUT_RING(ring, 0x00000000);
423 OUT_RING(ring, 0x00000000);
424
425 /*
426 * Emit destination:
427 */
428 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
429 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
430 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
431 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap));
432 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
433 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
434 OUT_RING(ring, 0x00000000);
435 OUT_RING(ring, 0x00000000);
436 OUT_RING(ring, 0x00000000);
437 OUT_RING(ring, 0x00000000);
438 OUT_RING(ring, 0x00000000);
439
440 /*
441 * Blit command:
442 */
443 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
444 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
445 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
446 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
447 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
448
449 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
450 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
451 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
452
453 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
454 OUT_RING(ring, 0x3f);
455 OUT_WFI5(ring);
456
457 OUT_PKT4(ring, 0x8c01, 1);
458 OUT_RING(ring, 0);
459
460 OUT_PKT4(ring, 0xacc0, 1);
461 OUT_RING(ring, 0xf180);
462
463 OUT_PKT4(ring, 0x8e04, 1);
464 OUT_RING(ring, 0x01000000);
465
466 OUT_PKT7(ring, CP_BLIT, 1);
467 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
468
469 OUT_WFI5(ring);
470
471 OUT_PKT4(ring, 0x8e04, 1);
472 OUT_RING(ring, 0);
473 }
474 }
475
476 static void
477 fd6_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
478 {
479 struct fd_context *ctx = fd_context(pctx);
480 struct fd_batch *batch;
481
482 if (!can_do_blit(info)) {
483 fd_blitter_pipe_begin(ctx, info->render_condition_enable, false, FD_STAGE_BLIT);
484 fd_blitter_blit(ctx, info);
485 fd_blitter_pipe_end(ctx);
486 return;
487 }
488
489 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
490
491 fd6_emit_restore(batch, batch->draw);
492 fd6_emit_lrz_flush(batch->draw);
493
494 mtx_lock(&ctx->screen->lock);
495
496 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
497 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
498
499 mtx_unlock(&ctx->screen->lock);
500
501 emit_setup(batch->draw);
502
503 if ((info->src.resource->target == PIPE_BUFFER) &&
504 (info->dst.resource->target == PIPE_BUFFER)) {
505 assert(fd_resource(info->src.resource)->tile_mode == TILE6_LINEAR);
506 assert(fd_resource(info->dst.resource)->tile_mode == TILE6_LINEAR);
507 emit_blit_buffer(batch->draw, info);
508 } else {
509 /* I don't *think* we need to handle blits between buffer <-> !buffer */
510 debug_assert(info->src.resource->target != PIPE_BUFFER);
511 debug_assert(info->dst.resource->target != PIPE_BUFFER);
512 emit_blit_texture(batch->draw, info);
513 }
514
515 fd6_event_write(batch, batch->draw, 0x1d, true);
516 fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
517 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
518
519 fd_resource(info->dst.resource)->valid = true;
520 batch->needs_flush = true;
521
522 fd_batch_flush(batch, false, false);
523 fd_batch_reference(&batch, NULL);
524 }
525
526 static void
527 fd6_resource_copy_region(struct pipe_context *pctx,
528 struct pipe_resource *dst,
529 unsigned dst_level,
530 unsigned dstx, unsigned dsty, unsigned dstz,
531 struct pipe_resource *src,
532 unsigned src_level,
533 const struct pipe_box *src_box)
534 {
535 struct pipe_blit_info info;
536
537 debug_assert(src->format == dst->format);
538
539 memset(&info, 0, sizeof info);
540 info.dst.resource = dst;
541 info.dst.level = dst_level;
542 info.dst.box.x = dstx;
543 info.dst.box.y = dsty;
544 info.dst.box.z = dstz;
545 info.dst.box.width = src_box->width;
546 info.dst.box.height = src_box->height;
547 assert(info.dst.box.width >= 0);
548 assert(info.dst.box.height >= 0);
549 info.dst.box.depth = 1;
550 info.dst.format = dst->format;
551 info.src.resource = src;
552 info.src.level = src_level;
553 info.src.box = *src_box;
554 info.src.format = src->format;
555 info.mask = util_format_get_mask(src->format);
556 info.filter = PIPE_TEX_FILTER_NEAREST;
557 info.scissor_enable = 0;
558
559 fd6_blit(pctx, &info);
560 }
561
562 void
563 fd6_blitter_init(struct pipe_context *pctx)
564 {
565 if (fd_mesa_debug & FD_DBG_NOBLIT)
566 return;
567
568 pctx->resource_copy_region = fd6_resource_copy_region;
569 pctx->blit = fd6_blit;
570 }
571
572 unsigned
573 fd6_tile_mode(const struct pipe_resource *tmpl)
574 {
575 /* basically just has to be a format we can blit, so uploads/downloads
576 * via linear staging buffer works:
577 */
578 return TILE6_3;
579 }