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freedreno/a6xx: UBWC support
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29
30 #include "freedreno_blitter.h"
31 #include "freedreno_fence.h"
32 #include "freedreno_resource.h"
33
34 #include "fd6_blitter.h"
35 #include "fd6_format.h"
36 #include "fd6_emit.h"
37
38 /* Make sure none of the requested dimensions extend beyond the size of the
39 * resource. Not entirely sure why this happens, but sometimes it does, and
40 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
41 * back to u_blitter
42 */
43 static bool
44 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
45 {
46 int last_layer =
47 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
48 : r->array_size;
49
50 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
51 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
52 (b->z >= 0) && (b->z + b->depth <= last_layer);
53 }
54
55 static bool
56 ok_format(enum pipe_format pfmt)
57 {
58 enum a6xx_color_fmt fmt = fd6_pipe2color(pfmt);
59
60 switch (pfmt) {
61 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
62 case PIPE_FORMAT_Z24X8_UNORM:
63 case PIPE_FORMAT_Z16_UNORM:
64 case PIPE_FORMAT_Z32_UNORM:
65 case PIPE_FORMAT_Z32_FLOAT:
66 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
67 case PIPE_FORMAT_S8_UINT:
68 return true;
69 default:
70 break;
71 }
72
73 if (fmt == ~0)
74 return false;
75
76 if (fd6_ifmt(fmt) == 0)
77 return false;
78
79 return true;
80 }
81
82 #define DEBUG_BLIT_FALLBACK 0
83 #define fail_if(cond) \
84 do { \
85 if (cond) { \
86 if (DEBUG_BLIT_FALLBACK) { \
87 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
88 util_dump_blit_info(stderr, info); \
89 fprintf(stderr, "\nsrc: "); \
90 util_dump_resource(stderr, info->src.resource); \
91 fprintf(stderr, "\ndst: "); \
92 util_dump_resource(stderr, info->dst.resource); \
93 fprintf(stderr, "\n"); \
94 } \
95 return false; \
96 } \
97 } while (0)
98
99 static bool
100 can_do_blit(const struct pipe_blit_info *info)
101 {
102 /* I think we can do scaling, but not in z dimension since that would
103 * require blending..
104 */
105 fail_if(info->dst.box.depth != info->src.box.depth);
106
107 /* Fail if unsupported format: */
108 fail_if(!ok_format(info->src.format));
109 fail_if(!ok_format(info->dst.format));
110
111 /* We can blit if both or neither formats are compressed formats... */
112 fail_if(util_format_is_compressed(info->src.format) !=
113 util_format_is_compressed(info->src.format));
114
115 /* ... but only if they're the same compression format. */
116 fail_if(util_format_is_compressed(info->src.format) &&
117 info->src.format != info->dst.format);
118
119 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
120
121 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
122
123 debug_assert(info->dst.box.width >= 0);
124 debug_assert(info->dst.box.height >= 0);
125 debug_assert(info->dst.box.depth >= 0);
126
127 /* We could probably blit between resources with equal sample count.. */
128 fail_if(info->dst.resource->nr_samples > 1);
129
130 /* CP_BLIT supports resolving, but seems to pick one only of the samples
131 * (no blending). This doesn't work for RGBA resolves, so we fall back in
132 * that case. However, GL/GLES spec says:
133 *
134 * "If the source formats are integer types or stencil values, a single
135 * sample’s value is selected for each pixel. If the source formats are
136 * floating-point or normalized types, the sample values for each pixel
137 * are resolved in an implementationdependent manner. If the source
138 * formats are depth values, sample values are resolved in an
139 * implementation-dependent manner where the result will be between the
140 * minimum and maximum depth values in the pixel."
141 *
142 * so do those with CP_BLIT.
143 */
144 fail_if((info->mask & PIPE_MASK_RGBA) &&
145 info->src.resource->nr_samples > 1);
146
147 fail_if(info->window_rectangle_include);
148
149 fail_if(util_format_is_srgb(info->src.format));
150 fail_if(util_format_is_srgb(info->dst.format));
151
152 const struct util_format_description *src_desc =
153 util_format_description(info->src.format);
154 const struct util_format_description *dst_desc =
155 util_format_description(info->dst.format);
156 const int common_channels = MIN2(src_desc->nr_channels, dst_desc->nr_channels);
157
158 if (info->mask & PIPE_MASK_RGBA) {
159 for (int i = 0; i < common_channels; i++) {
160 fail_if(memcmp(&src_desc->channel[i],
161 &dst_desc->channel[i],
162 sizeof(src_desc->channel[0])));
163 }
164 }
165
166 fail_if(info->alpha_blend);
167
168 return true;
169 }
170
171 static void
172 emit_setup(struct fd_ringbuffer *ring)
173 {
174 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
175 OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
176
177 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
178 OUT_RING(ring, LRZ_FLUSH);
179
180 OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
181 OUT_RING(ring, 0x0);
182
183 OUT_WFI5(ring);
184
185 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
186 OUT_RING(ring, 0x10000000);
187 }
188
189 static uint32_t
190 blit_control(enum a6xx_color_fmt fmt)
191 {
192 unsigned blit_cntl = 0xf00000;
193 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt);
194 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_IFMT(fd6_ifmt(fmt));
195 return blit_cntl;
196 }
197
198 /* buffers need to be handled specially since x/width can exceed the bounds
199 * supported by hw.. if necessary decompose into (potentially) two 2D blits
200 */
201 static void
202 emit_blit_buffer(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
203 {
204 const struct pipe_box *sbox = &info->src.box;
205 const struct pipe_box *dbox = &info->dst.box;
206 struct fd_resource *src, *dst;
207 unsigned sshift, dshift;
208
209 if (DEBUG_BLIT_FALLBACK) {
210 fprintf(stderr, "buffer blit: ");
211 util_dump_blit_info(stderr, info);
212 fprintf(stderr, "\ndst resource: ");
213 util_dump_resource(stderr, info->dst.resource);
214 fprintf(stderr, "\nsrc resource: ");
215 util_dump_resource(stderr, info->src.resource);
216 fprintf(stderr, "\n");
217 }
218
219 src = fd_resource(info->src.resource);
220 dst = fd_resource(info->dst.resource);
221
222 debug_assert(src->cpp == 1);
223 debug_assert(dst->cpp == 1);
224 debug_assert(info->src.resource->format == info->dst.resource->format);
225 debug_assert((sbox->y == 0) && (sbox->height == 1));
226 debug_assert((dbox->y == 0) && (dbox->height == 1));
227 debug_assert((sbox->z == 0) && (sbox->depth == 1));
228 debug_assert((dbox->z == 0) && (dbox->depth == 1));
229 debug_assert(sbox->width == dbox->width);
230 debug_assert(info->src.level == 0);
231 debug_assert(info->dst.level == 0);
232
233 /*
234 * Buffers can have dimensions bigger than max width, remap into
235 * multiple 1d blits to fit within max dimension
236 *
237 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
238 * seems to prevent overfetch related faults. Not quite sure what
239 * the deal is there.
240 *
241 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
242 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
243 * difference. On top of already splitting up the blit so width
244 * isn't > 16k.
245 *
246 * We perhaps could do a bit better, if src and dst are aligned but
247 * in the worst case this means we have to split the copy up into
248 * 16k (0x4000) minus 64 (0x40).
249 */
250
251 sshift = sbox->x & 0x3f;
252 dshift = dbox->x & 0x3f;
253
254 OUT_PKT7(ring, CP_SET_MARKER, 1);
255 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
256
257 uint32_t blit_cntl = blit_control(RB6_R8_UNORM) | 0x20000000;
258 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
259 OUT_RING(ring, blit_cntl);
260
261 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
262 OUT_RING(ring, blit_cntl);
263
264 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
265 unsigned soff, doff, w, p;
266
267 soff = (sbox->x + off) & ~0x3f;
268 doff = (dbox->x + off) & ~0x3f;
269
270 w = MIN2(sbox->width - off, (0x4000 - 0x40));
271 p = align(w, 64);
272
273 debug_assert((soff + w) <= fd_bo_size(src->bo));
274 debug_assert((doff + w) <= fd_bo_size(dst->bo));
275
276 /*
277 * Emit source:
278 */
279 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
280 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
281 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(src->tile_mode) |
282 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) |
283 COND(fd6_ubwc_enabled(src, src->tile_mode), A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
284 0x500000);
285 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
286 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
287 OUT_RELOC(ring, src->bo, soff + src->offset, 0, 0); /* SP_PS_2D_SRC_LO/HI */
288 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
289
290 OUT_RING(ring, 0x00000000);
291 OUT_RING(ring, 0x00000000);
292 OUT_RING(ring, 0x00000000);
293 OUT_RING(ring, 0x00000000);
294 OUT_RING(ring, 0x00000000);
295
296 if (fd6_ubwc_enabled(src, src->tile_mode)) {
297 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
298 OUT_RELOC(ring, src->bo, soff + src->ubwc_offset, 0, 0);
299 OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(src->ubwc_pitch) |
300 A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(src->ubwc_size));
301 OUT_RING(ring, 0x00000000);
302 OUT_RING(ring, 0x00000000);
303 OUT_RING(ring, 0x00000000);
304 }
305
306 /*
307 * Emit destination:
308 */
309 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
310 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
311 A6XX_RB_2D_DST_INFO_TILE_MODE(dst->tile_mode) |
312 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX) |
313 COND(fd6_ubwc_enabled(dst, dst->tile_mode), A6XX_RB_2D_DST_INFO_FLAGS));
314 OUT_RELOC(ring, dst->bo, doff + dst->offset, 0, 0); /* RB_2D_DST_LO/HI */
315 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
316 OUT_RING(ring, 0x00000000);
317 OUT_RING(ring, 0x00000000);
318 OUT_RING(ring, 0x00000000);
319 OUT_RING(ring, 0x00000000);
320 OUT_RING(ring, 0x00000000);
321
322 if (fd6_ubwc_enabled(dst, dst->tile_mode)) {
323 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
324 OUT_RELOC(ring, dst->bo, doff + dst->ubwc_offset, 0, 0);
325 OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(dst->ubwc_pitch) |
326 A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(dst->ubwc_size));
327 OUT_RING(ring, 0x00000000);
328 OUT_RING(ring, 0x00000000);
329 OUT_RING(ring, 0x00000000);
330 }
331 /*
332 * Blit command:
333 */
334 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
335 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
336 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
337 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
338 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
339
340 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
341 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
342 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
343
344 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
345 OUT_RING(ring, 0x3f);
346 OUT_WFI5(ring);
347
348 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
349 OUT_RING(ring, 0);
350
351 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
352 OUT_RING(ring, 0xf180);
353
354 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
355 OUT_RING(ring, 0x01000000);
356
357 OUT_PKT7(ring, CP_BLIT, 1);
358 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
359
360 OUT_WFI5(ring);
361
362 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
363 OUT_RING(ring, 0);
364 }
365 }
366
367 static void
368 emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
369 {
370 const struct pipe_box *sbox = &info->src.box;
371 const struct pipe_box *dbox = &info->dst.box;
372 struct fd_resource *src, *dst;
373 struct fd_resource_slice *sslice, *dslice;
374 enum a6xx_color_fmt sfmt, dfmt;
375 enum a6xx_tile_mode stile, dtile;
376 enum a3xx_color_swap sswap, dswap;
377 unsigned spitch, dpitch;
378 int sx1, sy1, sx2, sy2;
379 int dx1, dy1, dx2, dy2;
380
381 if (DEBUG_BLIT_FALLBACK) {
382 fprintf(stderr, "texture blit: ");
383 util_dump_blit_info(stderr, info);
384 fprintf(stderr, "\ndst resource: ");
385 util_dump_resource(stderr, info->dst.resource);
386 fprintf(stderr, "\nsrc resource: ");
387 util_dump_resource(stderr, info->src.resource);
388 fprintf(stderr, "\n");
389 }
390
391 src = fd_resource(info->src.resource);
392 dst = fd_resource(info->dst.resource);
393
394 sslice = fd_resource_slice(src, info->src.level);
395 dslice = fd_resource_slice(dst, info->dst.level);
396
397 sfmt = fd6_pipe2color(info->src.format);
398 dfmt = fd6_pipe2color(info->dst.format);
399
400 int blocksize = util_format_get_blocksize(info->src.format);
401 int blockwidth = util_format_get_blockwidth(info->src.format);
402 int blockheight = util_format_get_blockheight(info->src.format);
403 int nelements;
404
405 stile = fd_resource_level_linear(info->src.resource, info->src.level) ?
406 TILE6_LINEAR : src->tile_mode;
407 dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ?
408 TILE6_LINEAR : dst->tile_mode;
409
410 sswap = stile ? WZYX : fd6_pipe2swap(info->src.format);
411 dswap = dtile ? WZYX : fd6_pipe2swap(info->dst.format);
412
413 if (util_format_is_compressed(info->src.format)) {
414 debug_assert(info->src.format == info->dst.format);
415 sfmt = dfmt = RB6_R8_UNORM;
416 nelements = blocksize;
417 } else {
418 debug_assert(!util_format_is_compressed(info->dst.format));
419 nelements = 1;
420 }
421
422 spitch = DIV_ROUND_UP(sslice->pitch, blockwidth) * src->cpp;
423 dpitch = DIV_ROUND_UP(dslice->pitch, blockwidth) * dst->cpp;
424
425 sx1 = sbox->x / blockwidth * nelements;
426 sy1 = sbox->y / blockheight;
427 sx2 = DIV_ROUND_UP(sbox->x + sbox->width, blockwidth) * nelements - 1;
428 sy2 = DIV_ROUND_UP(sbox->y + sbox->height, blockheight) - 1;
429
430 dx1 = dbox->x / blockwidth * nelements;
431 dy1 = dbox->y / blockheight;
432 dx2 = DIV_ROUND_UP(dbox->x + dbox->width, blockwidth) * nelements - 1;
433 dy2 = DIV_ROUND_UP(dbox->y + dbox->height, blockheight) - 1;
434
435 uint32_t width = DIV_ROUND_UP(u_minify(src->base.width0, info->src.level), blockwidth) * nelements;
436 uint32_t height = DIV_ROUND_UP(u_minify(src->base.height0, info->src.level), blockheight);
437
438 OUT_PKT7(ring, CP_SET_MARKER, 1);
439 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
440
441 uint32_t blit_cntl = blit_control(dfmt);
442
443 if (dtile != stile)
444 blit_cntl |= 0x20000000;
445
446 if (info->scissor_enable) {
447 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
448 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
449 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
450 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
451 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
452 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
453 }
454
455 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
456 OUT_RING(ring, blit_cntl);
457
458 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
459 OUT_RING(ring, blit_cntl);
460
461 for (unsigned i = 0; i < info->dst.box.depth; i++) {
462 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
463 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
464
465 /*
466 * Emit source:
467 */
468 uint32_t filter = 0;
469 if (info->filter == PIPE_TEX_FILTER_LINEAR)
470 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
471
472 enum a3xx_msaa_samples samples = fd_msaa_samples(src->base.nr_samples);
473
474 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
475 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
476 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
477 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) |
478 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples) |
479 COND(fd6_ubwc_enabled(src, stile), A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
480 0x500000 | filter);
481 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
482 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
483 OUT_RELOC(ring, src->bo, soff + src->offset, 0, 0); /* SP_PS_2D_SRC_LO/HI */
484 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
485
486 OUT_RING(ring, 0x00000000);
487 OUT_RING(ring, 0x00000000);
488 OUT_RING(ring, 0x00000000);
489 OUT_RING(ring, 0x00000000);
490 OUT_RING(ring, 0x00000000);
491
492 if (fd6_ubwc_enabled(src, stile)) {
493 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
494 OUT_RELOC(ring, src->bo, soff + src->ubwc_offset, 0, 0);
495 OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(src->ubwc_pitch) |
496 A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(src->ubwc_size));
497 OUT_RING(ring, 0x00000000);
498 OUT_RING(ring, 0x00000000);
499 OUT_RING(ring, 0x00000000);
500 }
501
502 /*
503 * Emit destination:
504 */
505 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
506 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
507 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
508 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap) |
509 COND(fd6_ubwc_enabled(dst, dtile), A6XX_RB_2D_DST_INFO_FLAGS));
510 OUT_RELOCW(ring, dst->bo, doff + dst->offset, 0, 0); /* RB_2D_DST_LO/HI */
511 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
512 OUT_RING(ring, 0x00000000);
513 OUT_RING(ring, 0x00000000);
514 OUT_RING(ring, 0x00000000);
515 OUT_RING(ring, 0x00000000);
516 OUT_RING(ring, 0x00000000);
517
518 if (fd6_ubwc_enabled(dst, dtile)) {
519 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
520 OUT_RELOC(ring, dst->bo, doff + dst->ubwc_offset, 0, 0);
521 OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(dst->ubwc_pitch) |
522 A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(dst->ubwc_size));
523 OUT_RING(ring, 0x00000000);
524 OUT_RING(ring, 0x00000000);
525 OUT_RING(ring, 0x00000000);
526 }
527 /*
528 * Blit command:
529 */
530 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
531 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
532 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
533 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
534 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
535
536 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
537 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
538 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
539
540 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
541 OUT_RING(ring, 0x3f);
542 OUT_WFI5(ring);
543
544 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
545 OUT_RING(ring, 0);
546
547 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
548 OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
549 COND(util_format_is_pure_sint(info->src.format),
550 A6XX_SP_2D_SRC_FORMAT_SINT) |
551 COND(util_format_is_pure_uint(info->src.format),
552 A6XX_SP_2D_SRC_FORMAT_UINT) |
553 COND(util_format_is_snorm(info->src.format),
554 A6XX_SP_2D_SRC_FORMAT_SINT |
555 A6XX_SP_2D_SRC_FORMAT_NORM) |
556 COND(util_format_is_unorm(info->src.format),
557 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
558 // A6XX_SP_2D_SRC_FORMAT_UINT |
559 A6XX_SP_2D_SRC_FORMAT_NORM) |
560 0xf000);
561
562 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
563 OUT_RING(ring, 0x01000000);
564
565 OUT_PKT7(ring, CP_BLIT, 1);
566 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
567
568 OUT_WFI5(ring);
569
570 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
571 OUT_RING(ring, 0);
572 }
573 }
574
575 static void
576 rewrite_zs_blit(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
577 {
578 struct pipe_blit_info separate = *info;
579
580 if (DEBUG_BLIT_FALLBACK) {
581 fprintf(stderr, "---- rewrite_separate_zs_blit: ");
582 util_dump_blit_info(stderr, info);
583 fprintf(stderr, "\ndst resource: ");
584 util_dump_resource(stderr, info->dst.resource);
585 fprintf(stderr, "\nsrc resource: ");
586 util_dump_resource(stderr, info->src.resource);
587 fprintf(stderr, "\n\n");
588 }
589
590 switch (info->src.format) {
591 case PIPE_FORMAT_S8_UINT:
592 debug_assert(info->mask == PIPE_MASK_S);
593 separate.mask = PIPE_MASK_R;
594 separate.src.format = PIPE_FORMAT_R8_UINT;
595 separate.dst.format = PIPE_FORMAT_R8_UINT;
596 emit_blit_texture(ring, &separate);
597 break;
598
599 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
600 if (info->mask & PIPE_MASK_Z) {
601 separate.mask = PIPE_MASK_R;
602 separate.src.format = PIPE_FORMAT_R32_FLOAT;
603 separate.dst.format = PIPE_FORMAT_R32_FLOAT;
604 emit_blit_texture(ring, &separate);
605 }
606 if (info->mask & PIPE_MASK_S) {
607 separate.mask = PIPE_MASK_R;
608 separate.src.format = PIPE_FORMAT_R8_UINT;
609 separate.dst.format = PIPE_FORMAT_R8_UINT;
610 separate.src.resource = &fd_resource(info->src.resource)->stencil->base;
611 separate.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
612 emit_blit_texture(ring, &separate);
613 }
614 break;
615
616 case PIPE_FORMAT_Z16_UNORM:
617 separate.mask = PIPE_MASK_R;
618 separate.src.format = PIPE_FORMAT_R16_UNORM;
619 separate.dst.format = PIPE_FORMAT_R16_UNORM;
620 emit_blit_texture(ring, &separate);
621 break;
622
623 case PIPE_FORMAT_Z32_UNORM:
624 case PIPE_FORMAT_Z32_FLOAT:
625 debug_assert(info->mask == PIPE_MASK_Z);
626 separate.mask = PIPE_MASK_R;
627 separate.src.format = PIPE_FORMAT_R32_UINT;
628 separate.dst.format = PIPE_FORMAT_R32_UINT;
629 emit_blit_texture(ring, &separate);
630 break;
631
632 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
633 debug_assert(info->mask == PIPE_MASK_ZS);
634 case PIPE_FORMAT_Z24X8_UNORM:
635 case PIPE_FORMAT_X8Z24_UNORM:
636 separate.mask = PIPE_MASK_R;
637 separate.src.format = PIPE_FORMAT_R32_UINT;
638 separate.dst.format = PIPE_FORMAT_R32_UINT;
639 emit_blit_texture(ring, &separate);
640 break;
641
642 default:
643 unreachable("");
644 }
645 }
646
647 static void
648 rewrite_combined_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
649 {
650 struct pipe_blit_info separate = *info;
651
652 if (DEBUG_BLIT_FALLBACK) {
653 fprintf(stderr, "---- rewrite_combined_zs_blit: ");
654 util_dump_blit_info(stderr, info);
655 fprintf(stderr, "\ndst resource: ");
656 util_dump_resource(stderr, info->dst.resource);
657 fprintf(stderr, "\nsrc resource: ");
658 util_dump_resource(stderr, info->src.resource);
659 fprintf(stderr, "\n");
660 }
661
662 switch (info->mask) {
663 case PIPE_MASK_Z:
664 separate.mask = PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
665 separate.src.format = PIPE_FORMAT_R8G8B8A8_UNORM;
666 separate.dst.format = PIPE_FORMAT_R8G8B8A8_UNORM;
667
668 fd_blitter_blit(ctx, &separate);
669 break;
670
671 case PIPE_MASK_S:
672 separate.mask = PIPE_MASK_A;
673 separate.src.format = PIPE_FORMAT_R8G8B8A8_UNORM;
674 separate.dst.format = PIPE_FORMAT_R8G8B8A8_UNORM;
675
676 fd_blitter_blit(ctx, &separate);
677 break;
678
679 default:
680 unreachable("");
681 }
682 }
683
684 static bool
685 fd6_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
686 {
687 struct fd_batch *batch;
688
689 if (info->dst.format == PIPE_FORMAT_Z24_UNORM_S8_UINT &&
690 info->mask != PIPE_MASK_ZS) {
691 rewrite_combined_zs_blit(ctx, info);
692 return true;
693 }
694
695 if (!can_do_blit(info))
696 return false;
697
698 fd_fence_ref(ctx->base.screen, &ctx->last_fence, NULL);
699
700 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
701
702 fd6_emit_restore(batch, batch->draw);
703 fd6_emit_lrz_flush(batch->draw);
704
705 mtx_lock(&ctx->screen->lock);
706
707 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
708 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
709
710 mtx_unlock(&ctx->screen->lock);
711
712 emit_setup(batch->draw);
713
714 if ((info->src.resource->target == PIPE_BUFFER) &&
715 (info->dst.resource->target == PIPE_BUFFER)) {
716 assert(fd_resource(info->src.resource)->tile_mode == TILE6_LINEAR);
717 assert(fd_resource(info->dst.resource)->tile_mode == TILE6_LINEAR);
718 emit_blit_buffer(batch->draw, info);
719 } else {
720 /* I don't *think* we need to handle blits between buffer <-> !buffer */
721 debug_assert(info->src.resource->target != PIPE_BUFFER);
722 debug_assert(info->dst.resource->target != PIPE_BUFFER);
723
724 if (info->mask & (PIPE_MASK_ZS)) {
725 rewrite_zs_blit(batch->draw, info);
726 } else {
727 emit_blit_texture(batch->draw, info);
728 }
729 }
730
731 fd6_event_write(batch, batch->draw, 0x1d, true);
732 fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
733 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
734
735 fd_resource(info->dst.resource)->valid = true;
736 batch->needs_flush = true;
737
738 fd_batch_flush(batch, false, false);
739 fd_batch_reference(&batch, NULL);
740
741 return true;
742 }
743
744 void
745 fd6_blitter_init(struct pipe_context *pctx)
746 {
747 if (fd_mesa_debug & FD_DBG_NOBLIT)
748 return;
749
750 fd_context(pctx)->blit = fd6_blit;
751 }
752
753 unsigned
754 fd6_tile_mode(const struct pipe_resource *tmpl)
755 {
756 /* basically just has to be a format we can blit, so uploads/downloads
757 * via linear staging buffer works:
758 */
759 if (ok_format(tmpl->format))
760 return TILE6_3;
761
762 return TILE6_LINEAR;
763 }