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freedreno/a6xx: Support some depth/stencil blits on blitter
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29
30 #include "freedreno_blitter.h"
31 #include "freedreno_fence.h"
32 #include "freedreno_resource.h"
33
34 #include "fd6_blitter.h"
35 #include "fd6_format.h"
36 #include "fd6_emit.h"
37
38 /* Make sure none of the requested dimensions extend beyond the size of the
39 * resource. Not entirely sure why this happens, but sometimes it does, and
40 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
41 * back to u_blitter
42 */
43 static bool
44 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
45 {
46 int last_layer =
47 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
48 : r->array_size;
49
50 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
51 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
52 (b->z >= 0) && (b->z + b->depth <= last_layer);
53 }
54
55 static bool
56 ok_format(enum pipe_format pfmt)
57 {
58 enum a6xx_color_fmt fmt = fd6_pipe2color(pfmt);
59
60 switch (pfmt) {
61 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
62 case PIPE_FORMAT_Z24X8_UNORM:
63 case PIPE_FORMAT_Z16_UNORM:
64 case PIPE_FORMAT_Z32_UNORM:
65 case PIPE_FORMAT_Z32_FLOAT:
66 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
67 case PIPE_FORMAT_S8_UINT:
68 return true;
69 }
70
71 if (fmt == ~0)
72 return false;
73
74 if (fd6_ifmt(fmt) == 0)
75 return false;
76
77 return true;
78 }
79
80 #define DEBUG_BLIT_FALLBACK 0
81 #define fail_if(cond) \
82 do { \
83 if (cond) { \
84 if (DEBUG_BLIT_FALLBACK) { \
85 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
86 util_dump_blit_info(stderr, info); \
87 fprintf(stderr, "\nsrc: "); \
88 util_dump_resource(stderr, info->src.resource); \
89 fprintf(stderr, "\ndst: "); \
90 util_dump_resource(stderr, info->dst.resource); \
91 fprintf(stderr, "\n"); \
92 } \
93 return false; \
94 } \
95 } while (0)
96
97 static bool
98 can_do_blit(const struct pipe_blit_info *info)
99 {
100 /* I think we can do scaling, but not in z dimension since that would
101 * require blending..
102 */
103 fail_if(info->dst.box.depth != info->src.box.depth);
104
105 /* Fail if unsupported format: */
106 fail_if(!ok_format(info->src.format));
107 fail_if(!ok_format(info->dst.format));
108
109 /* We can blit if both or neither formats are compressed formats... */
110 fail_if(util_format_is_compressed(info->src.format) !=
111 util_format_is_compressed(info->src.format));
112
113 /* ... but only if they're the same compression format. */
114 fail_if(util_format_is_compressed(info->src.format) &&
115 info->src.format != info->dst.format);
116
117 /* src box can be inverted, which we don't support.. dst box cannot: */
118 fail_if((info->src.box.width < 0) || (info->src.box.height < 0));
119
120 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
121
122 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
123
124 debug_assert(info->dst.box.width >= 0);
125 debug_assert(info->dst.box.height >= 0);
126 debug_assert(info->dst.box.depth >= 0);
127
128 /* non-multisampled could either have nr_samples == 0 or == 1 */
129 fail_if(info->dst.resource->nr_samples > 1);
130 fail_if(info->src.resource->nr_samples > 1);
131
132 fail_if(info->window_rectangle_include);
133
134 fail_if(util_format_is_srgb(info->src.format));
135 fail_if(util_format_is_srgb(info->dst.format));
136
137 const struct util_format_description *src_desc =
138 util_format_description(info->src.format);
139 const struct util_format_description *dst_desc =
140 util_format_description(info->dst.format);
141 const int common_channels = MIN2(src_desc->nr_channels, dst_desc->nr_channels);
142
143 if (info->mask & PIPE_MASK_RGBA) {
144 for (int i = 0; i < common_channels; i++) {
145 fail_if(memcmp(&src_desc->channel[i],
146 &dst_desc->channel[i],
147 sizeof(src_desc->channel[0])));
148 }
149 }
150
151 fail_if(info->alpha_blend);
152
153 /* We can blit depth and stencil in most cases, except for depth only or
154 * stencil only to combined zs. */
155 fail_if(info->dst.format == PIPE_FORMAT_Z24_UNORM_S8_UINT &&
156 info->mask != PIPE_MASK_ZS);
157
158 return true;
159 }
160
161 static void
162 emit_setup(struct fd_ringbuffer *ring)
163 {
164 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
165 OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
166
167 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
168 OUT_RING(ring, LRZ_FLUSH);
169
170 OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
171 OUT_RING(ring, 0x0);
172
173 OUT_WFI5(ring);
174
175 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
176 OUT_RING(ring, 0x10000000);
177 }
178
179 static uint32_t
180 blit_control(enum a6xx_color_fmt fmt)
181 {
182 unsigned blit_cntl = 0xf00000;
183 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt);
184 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_IFMT(fd6_ifmt(fmt));
185 return blit_cntl;
186 }
187
188 /* buffers need to be handled specially since x/width can exceed the bounds
189 * supported by hw.. if necessary decompose into (potentially) two 2D blits
190 */
191 static void
192 emit_blit_buffer(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
193 {
194 const struct pipe_box *sbox = &info->src.box;
195 const struct pipe_box *dbox = &info->dst.box;
196 struct fd_resource *src, *dst;
197 unsigned sshift, dshift;
198
199 if (DEBUG_BLIT_FALLBACK) {
200 fprintf(stderr, "buffer blit: ");
201 util_dump_blit_info(stderr, info);
202 fprintf(stderr, "\ndst resource: ");
203 util_dump_resource(stderr, info->dst.resource);
204 fprintf(stderr, "\nsrc resource: ");
205 util_dump_resource(stderr, info->src.resource);
206 fprintf(stderr, "\n");
207 }
208
209 src = fd_resource(info->src.resource);
210 dst = fd_resource(info->dst.resource);
211
212 debug_assert(src->cpp == 1);
213 debug_assert(dst->cpp == 1);
214 debug_assert(info->src.resource->format == info->dst.resource->format);
215 debug_assert((sbox->y == 0) && (sbox->height == 1));
216 debug_assert((dbox->y == 0) && (dbox->height == 1));
217 debug_assert((sbox->z == 0) && (sbox->depth == 1));
218 debug_assert((dbox->z == 0) && (dbox->depth == 1));
219 debug_assert(sbox->width == dbox->width);
220 debug_assert(info->src.level == 0);
221 debug_assert(info->dst.level == 0);
222
223 /*
224 * Buffers can have dimensions bigger than max width, remap into
225 * multiple 1d blits to fit within max dimension
226 *
227 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
228 * seems to prevent overfetch related faults. Not quite sure what
229 * the deal is there.
230 *
231 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
232 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
233 * difference. On top of already splitting up the blit so width
234 * isn't > 16k.
235 *
236 * We perhaps could do a bit better, if src and dst are aligned but
237 * in the worst case this means we have to split the copy up into
238 * 16k (0x4000) minus 64 (0x40).
239 */
240
241 sshift = sbox->x & 0x3f;
242 dshift = dbox->x & 0x3f;
243
244 OUT_PKT7(ring, CP_SET_MARKER, 1);
245 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
246
247 uint32_t blit_cntl = blit_control(RB6_R8_UNORM) | 0x20000000;
248 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
249 OUT_RING(ring, blit_cntl);
250
251 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
252 OUT_RING(ring, blit_cntl);
253
254 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
255 unsigned soff, doff, w, p;
256
257 soff = (sbox->x + off) & ~0x3f;
258 doff = (dbox->x + off) & ~0x3f;
259
260 w = MIN2(sbox->width - off, (0x4000 - 0x40));
261 p = align(w, 64);
262
263 debug_assert((soff + w) <= fd_bo_size(src->bo));
264 debug_assert((doff + w) <= fd_bo_size(dst->bo));
265
266 /*
267 * Emit source:
268 */
269 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
270 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
271 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
272 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) | 0x500000);
273 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
274 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
275 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
276 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
277
278 OUT_RING(ring, 0x00000000);
279 OUT_RING(ring, 0x00000000);
280 OUT_RING(ring, 0x00000000);
281 OUT_RING(ring, 0x00000000);
282 OUT_RING(ring, 0x00000000);
283
284 OUT_RING(ring, 0x00000000);
285 OUT_RING(ring, 0x00000000);
286 OUT_RING(ring, 0x00000000);
287
288 /*
289 * Emit destination:
290 */
291 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
292 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
293 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
294 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
295 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
296 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
297 OUT_RING(ring, 0x00000000);
298 OUT_RING(ring, 0x00000000);
299 OUT_RING(ring, 0x00000000);
300 OUT_RING(ring, 0x00000000);
301 OUT_RING(ring, 0x00000000);
302
303 /*
304 * Blit command:
305 */
306 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
307 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
308 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
309 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
310 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
311
312 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
313 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
314 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
315
316 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
317 OUT_RING(ring, 0x3f);
318 OUT_WFI5(ring);
319
320 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
321 OUT_RING(ring, 0);
322
323 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
324 OUT_RING(ring, 0xf180);
325
326 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
327 OUT_RING(ring, 0x01000000);
328
329 OUT_PKT7(ring, CP_BLIT, 1);
330 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
331
332 OUT_WFI5(ring);
333
334 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
335 OUT_RING(ring, 0);
336 }
337 }
338
339 static void
340 emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
341 {
342 const struct pipe_box *sbox = &info->src.box;
343 const struct pipe_box *dbox = &info->dst.box;
344 struct fd_resource *src, *dst;
345 struct fd_resource_slice *sslice, *dslice;
346 enum a6xx_color_fmt sfmt, dfmt;
347 enum a6xx_tile_mode stile, dtile;
348 enum a3xx_color_swap sswap, dswap;
349 unsigned spitch, dpitch;
350 unsigned sx1, sy1, sx2, sy2;
351 unsigned dx1, dy1, dx2, dy2;
352
353 if (DEBUG_BLIT_FALLBACK) {
354 fprintf(stderr, "texture blit: ");
355 util_dump_blit_info(stderr, info);
356 fprintf(stderr, "\ndst resource: ");
357 util_dump_resource(stderr, info->dst.resource);
358 fprintf(stderr, "\nsrc resource: ");
359 util_dump_resource(stderr, info->src.resource);
360 fprintf(stderr, "\n");
361 }
362
363 src = fd_resource(info->src.resource);
364 dst = fd_resource(info->dst.resource);
365
366 sslice = fd_resource_slice(src, info->src.level);
367 dslice = fd_resource_slice(dst, info->dst.level);
368
369 sfmt = fd6_pipe2color(info->src.format);
370 dfmt = fd6_pipe2color(info->dst.format);
371
372 int blocksize = util_format_get_blocksize(info->src.format);
373 int blockwidth = util_format_get_blockwidth(info->src.format);
374 int blockheight = util_format_get_blockheight(info->src.format);
375 int nelements;
376
377 stile = fd_resource_level_linear(info->src.resource, info->src.level) ?
378 TILE6_LINEAR : src->tile_mode;
379 dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ?
380 TILE6_LINEAR : dst->tile_mode;
381
382 sswap = stile ? WZYX : fd6_pipe2swap(info->src.format);
383 dswap = dtile ? WZYX : fd6_pipe2swap(info->dst.format);
384
385 if (util_format_is_compressed(info->src.format)) {
386 debug_assert(info->src.format == info->dst.format);
387 sfmt = dfmt = RB6_R8_UNORM;
388 nelements = blocksize;
389 } else {
390 debug_assert(!util_format_is_compressed(info->dst.format));
391 nelements = 1;
392 }
393
394 spitch = DIV_ROUND_UP(sslice->pitch, blockwidth) * src->cpp;
395 dpitch = DIV_ROUND_UP(dslice->pitch, blockwidth) * dst->cpp;
396
397 sx1 = sbox->x / blockwidth * nelements;
398 sy1 = sbox->y / blockheight;
399 sx2 = DIV_ROUND_UP(sbox->x + sbox->width, blockwidth) * nelements - 1;
400 sy2 = DIV_ROUND_UP(sbox->y + sbox->height, blockheight) - 1;
401
402 dx1 = dbox->x / blockwidth * nelements;
403 dy1 = dbox->y / blockheight;
404 dx2 = DIV_ROUND_UP(dbox->x + dbox->width, blockwidth) * nelements - 1;
405 dy2 = DIV_ROUND_UP(dbox->y + dbox->height, blockheight) - 1;
406
407 uint32_t width = DIV_ROUND_UP(u_minify(src->base.width0, info->src.level), blockwidth) * nelements;
408 uint32_t height = DIV_ROUND_UP(u_minify(src->base.height0, info->src.level), blockheight);
409
410 OUT_PKT7(ring, CP_SET_MARKER, 1);
411 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
412
413 uint32_t blit_cntl = blit_control(dfmt);
414
415 if (dtile != stile)
416 blit_cntl |= 0x20000000;
417
418 if (info->scissor_enable) {
419 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
420 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
421 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
422 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
423 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
424 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
425 }
426
427 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
428 OUT_RING(ring, blit_cntl);
429
430 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
431 OUT_RING(ring, blit_cntl);
432
433 for (unsigned i = 0; i < info->dst.box.depth; i++) {
434 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
435 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
436
437 /*
438 * Emit source:
439 */
440 uint32_t filter = 0;
441 if (info->filter == PIPE_TEX_FILTER_LINEAR)
442 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
443
444 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
445 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
446 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
447 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) | 0x500000 | filter);
448 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
449 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
450 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
451 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
452 OUT_RING(ring, 0x00000000);
453 OUT_RING(ring, 0x00000000);
454 OUT_RING(ring, 0x00000000);
455 OUT_RING(ring, 0x00000000);
456 OUT_RING(ring, 0x00000000);
457
458 OUT_RING(ring, 0x00000000);
459 OUT_RING(ring, 0x00000000);
460 OUT_RING(ring, 0x00000000);
461
462 /*
463 * Emit destination:
464 */
465 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
466 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
467 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
468 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap));
469 OUT_RELOCW(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
470 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
471 OUT_RING(ring, 0x00000000);
472 OUT_RING(ring, 0x00000000);
473 OUT_RING(ring, 0x00000000);
474 OUT_RING(ring, 0x00000000);
475 OUT_RING(ring, 0x00000000);
476
477 /*
478 * Blit command:
479 */
480 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
481 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
482 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
483 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
484 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
485
486 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
487 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
488 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
489
490 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
491 OUT_RING(ring, 0x3f);
492 OUT_WFI5(ring);
493
494 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
495 OUT_RING(ring, 0);
496
497 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
498 OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
499 COND(util_format_is_pure_sint(info->src.format),
500 A6XX_SP_2D_SRC_FORMAT_SINT) |
501 COND(util_format_is_pure_uint(info->src.format),
502 A6XX_SP_2D_SRC_FORMAT_UINT) |
503 COND(util_format_is_snorm(info->src.format),
504 A6XX_SP_2D_SRC_FORMAT_SINT |
505 A6XX_SP_2D_SRC_FORMAT_NORM) |
506 COND(util_format_is_unorm(info->src.format),
507 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
508 // A6XX_SP_2D_SRC_FORMAT_UINT |
509 A6XX_SP_2D_SRC_FORMAT_NORM) |
510 0xf000);
511
512 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
513 OUT_RING(ring, 0x01000000);
514
515 OUT_PKT7(ring, CP_BLIT, 1);
516 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
517
518 OUT_WFI5(ring);
519
520 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
521 OUT_RING(ring, 0);
522 }
523 }
524
525 static void
526 rewrite_zs_blit(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
527 {
528 struct pipe_blit_info separate = *info;
529
530 switch (info->src.format) {
531 case PIPE_FORMAT_S8_UINT:
532 debug_assert(info->mask == PIPE_MASK_S);
533 separate.mask = PIPE_MASK_R;
534 separate.src.format = PIPE_FORMAT_R8_UNORM;
535 separate.dst.format = PIPE_FORMAT_R8_UNORM;
536 emit_blit_texture(ring, &separate);
537 break;
538
539 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
540 if (info->mask & PIPE_MASK_Z) {
541 separate.mask = PIPE_MASK_R;
542 separate.src.format = PIPE_FORMAT_R32_FLOAT;
543 separate.dst.format = PIPE_FORMAT_R32_FLOAT;
544 emit_blit_texture(ring, &separate);
545 }
546 if (info->mask & PIPE_MASK_S) {
547 separate.mask = PIPE_MASK_R;
548 separate.src.format = PIPE_FORMAT_R8_UNORM;
549 separate.dst.format = PIPE_FORMAT_R8_UNORM;
550 separate.src.resource = &fd_resource(info->src.resource)->stencil->base;
551 separate.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
552 emit_blit_texture(ring, &separate);
553 }
554 break;
555
556 case PIPE_FORMAT_Z16_UNORM:
557 separate.mask = PIPE_MASK_R;
558 separate.src.format = PIPE_FORMAT_R16_UNORM;
559 separate.dst.format = PIPE_FORMAT_R16_UNORM;
560 emit_blit_texture(ring, &separate);
561 break;
562
563 case PIPE_FORMAT_Z32_UNORM:
564 case PIPE_FORMAT_Z32_FLOAT:
565 debug_assert(info->mask == PIPE_MASK_Z);
566 separate.mask = PIPE_MASK_R;
567 separate.src.format = PIPE_FORMAT_R32_UINT;
568 separate.dst.format = PIPE_FORMAT_R32_UINT;
569 emit_blit_texture(ring, &separate);
570 break;
571
572 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
573 case PIPE_FORMAT_Z24X8_UNORM:
574 case PIPE_FORMAT_X8Z24_UNORM:
575 separate.mask = PIPE_MASK_R;
576 separate.src.format = PIPE_FORMAT_R32_UINT;
577 separate.dst.format = PIPE_FORMAT_R32_UINT;
578 emit_blit_texture(ring, &separate);
579 break;
580
581 default:
582 unreachable("");
583 }
584 }
585
586 static bool
587 fd6_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
588 {
589 struct fd_batch *batch;
590
591 if (!can_do_blit(info))
592 return false;
593
594 fd_fence_ref(ctx->base.screen, &ctx->last_fence, NULL);
595
596 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
597
598 fd6_emit_restore(batch, batch->draw);
599 fd6_emit_lrz_flush(batch->draw);
600
601 mtx_lock(&ctx->screen->lock);
602
603 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
604 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
605
606 mtx_unlock(&ctx->screen->lock);
607
608 emit_setup(batch->draw);
609
610 if ((info->src.resource->target == PIPE_BUFFER) &&
611 (info->dst.resource->target == PIPE_BUFFER)) {
612 assert(fd_resource(info->src.resource)->tile_mode == TILE6_LINEAR);
613 assert(fd_resource(info->dst.resource)->tile_mode == TILE6_LINEAR);
614 emit_blit_buffer(batch->draw, info);
615 } else {
616 /* I don't *think* we need to handle blits between buffer <-> !buffer */
617 debug_assert(info->src.resource->target != PIPE_BUFFER);
618 debug_assert(info->dst.resource->target != PIPE_BUFFER);
619
620 if (info->mask & (PIPE_MASK_ZS)) {
621 rewrite_zs_blit(batch->draw, info);
622 } else {
623 emit_blit_texture(batch->draw, info);
624 }
625 }
626
627 fd6_event_write(batch, batch->draw, 0x1d, true);
628 fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
629 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
630
631 fd_resource(info->dst.resource)->valid = true;
632 batch->needs_flush = true;
633
634 fd_batch_flush(batch, false, false);
635 fd_batch_reference(&batch, NULL);
636
637 return true;
638 }
639
640 void
641 fd6_blitter_init(struct pipe_context *pctx)
642 {
643 if (fd_mesa_debug & FD_DBG_NOBLIT)
644 return;
645
646 fd_context(pctx)->blit = fd6_blit;
647 }
648
649 unsigned
650 fd6_tile_mode(const struct pipe_resource *tmpl)
651 {
652 /* basically just has to be a format we can blit, so uploads/downloads
653 * via linear staging buffer works:
654 */
655 if (ok_format(tmpl->format))
656 return TILE6_3;
657
658 return TILE6_LINEAR;
659 }