2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * Rob Clark <robclark@freedesktop.org>
28 #include "util/u_dump.h"
29 #include "util/half_float.h"
31 #include "freedreno_blitter.h"
32 #include "freedreno_fence.h"
33 #include "freedreno_log.h"
34 #include "freedreno_resource.h"
36 #include "fd6_blitter.h"
37 #include "fd6_format.h"
39 #include "fd6_resource.h"
42 /* Make sure none of the requested dimensions extend beyond the size of the
43 * resource. Not entirely sure why this happens, but sometimes it does, and
44 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
48 ok_dims(const struct pipe_resource
*r
, const struct pipe_box
*b
, int lvl
)
51 r
->target
== PIPE_TEXTURE_3D
? u_minify(r
->depth0
, lvl
)
54 return (b
->x
>= 0) && (b
->x
+ b
->width
<= u_minify(r
->width0
, lvl
)) &&
55 (b
->y
>= 0) && (b
->y
+ b
->height
<= u_minify(r
->height0
, lvl
)) &&
56 (b
->z
>= 0) && (b
->z
+ b
->depth
<= last_layer
);
60 ok_format(enum pipe_format pfmt
)
62 enum a6xx_format fmt
= fd6_pipe2color(pfmt
);
64 if (util_format_is_compressed(pfmt
))
68 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
69 case PIPE_FORMAT_Z24X8_UNORM
:
70 case PIPE_FORMAT_Z16_UNORM
:
71 case PIPE_FORMAT_Z32_UNORM
:
72 case PIPE_FORMAT_Z32_FLOAT
:
73 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
74 case PIPE_FORMAT_S8_UINT
:
83 if (fd6_ifmt(fmt
) == 0)
90 #define DEBUG_BLIT_FALLBACK 0
92 #define fail_if(cond) \
95 if (DEBUG_BLIT_FALLBACK) { \
96 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
97 util_dump_blit_info(stderr, info); \
98 fprintf(stderr, "\nsrc: "); \
99 util_dump_resource(stderr, info->src.resource); \
100 fprintf(stderr, "\ndst: "); \
101 util_dump_resource(stderr, info->dst.resource); \
102 fprintf(stderr, "\n"); \
109 can_do_blit(const struct pipe_blit_info
*info
)
111 /* I think we can do scaling, but not in z dimension since that would
114 fail_if(info
->dst
.box
.depth
!= info
->src
.box
.depth
);
116 /* Fail if unsupported format: */
117 fail_if(!ok_format(info
->src
.format
));
118 fail_if(!ok_format(info
->dst
.format
));
120 debug_assert(!util_format_is_compressed(info
->src
.format
));
121 debug_assert(!util_format_is_compressed(info
->dst
.format
));
123 fail_if(!ok_dims(info
->src
.resource
, &info
->src
.box
, info
->src
.level
));
125 fail_if(!ok_dims(info
->dst
.resource
, &info
->dst
.box
, info
->dst
.level
));
127 debug_assert(info
->dst
.box
.width
>= 0);
128 debug_assert(info
->dst
.box
.height
>= 0);
129 debug_assert(info
->dst
.box
.depth
>= 0);
131 fail_if(info
->dst
.resource
->nr_samples
> 1);
133 fail_if(info
->window_rectangle_include
);
135 const struct util_format_description
*src_desc
=
136 util_format_description(info
->src
.format
);
137 const struct util_format_description
*dst_desc
=
138 util_format_description(info
->dst
.format
);
139 const int common_channels
= MIN2(src_desc
->nr_channels
, dst_desc
->nr_channels
);
141 if (info
->mask
& PIPE_MASK_RGBA
) {
142 for (int i
= 0; i
< common_channels
; i
++) {
143 fail_if(memcmp(&src_desc
->channel
[i
],
144 &dst_desc
->channel
[i
],
145 sizeof(src_desc
->channel
[0])));
149 fail_if(info
->alpha_blend
);
155 emit_setup(struct fd_batch
*batch
)
157 struct fd_ringbuffer
*ring
= batch
->draw
;
159 fd6_event_write(batch
, ring
, PC_CCU_FLUSH_COLOR_TS
, true);
160 fd6_event_write(batch
, ring
, PC_CCU_FLUSH_DEPTH_TS
, true);
161 fd6_event_write(batch
, ring
, PC_CCU_INVALIDATE_COLOR
, false);
162 fd6_event_write(batch
, ring
, PC_CCU_INVALIDATE_DEPTH
, false);
164 /* normal BLIT_OP_SCALE operation needs bypass RB_CCU_CNTL */
166 OUT_PKT4(ring
, REG_A6XX_RB_CCU_CNTL
, 1);
167 OUT_RING(ring
, fd6_context(batch
->ctx
)->magic
.RB_CCU_CNTL_bypass
);
171 blit_control(enum a6xx_format fmt
, bool is_srgb
)
173 enum a6xx_2d_ifmt ifmt
= fd6_ifmt(fmt
);
176 assert(ifmt
== R2D_UNORM8
);
177 ifmt
= R2D_UNORM8_SRGB
;
180 return A6XX_RB_2D_BLIT_CNTL_MASK(0xf) |
181 A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt
) |
182 A6XX_RB_2D_BLIT_CNTL_IFMT(ifmt
);
185 /* buffers need to be handled specially since x/width can exceed the bounds
186 * supported by hw.. if necessary decompose into (potentially) two 2D blits
189 emit_blit_buffer(struct fd_context
*ctx
, struct fd_ringbuffer
*ring
,
190 const struct pipe_blit_info
*info
)
192 const struct pipe_box
*sbox
= &info
->src
.box
;
193 const struct pipe_box
*dbox
= &info
->dst
.box
;
194 struct fd_resource
*src
, *dst
;
195 unsigned sshift
, dshift
;
198 fprintf(stderr
, "buffer blit: ");
199 util_dump_blit_info(stderr
, info
);
200 fprintf(stderr
, "\ndst resource: ");
201 util_dump_resource(stderr
, info
->dst
.resource
);
202 fprintf(stderr
, "\nsrc resource: ");
203 util_dump_resource(stderr
, info
->src
.resource
);
204 fprintf(stderr
, "\n");
207 src
= fd_resource(info
->src
.resource
);
208 dst
= fd_resource(info
->dst
.resource
);
210 debug_assert(src
->layout
.cpp
== 1);
211 debug_assert(dst
->layout
.cpp
== 1);
212 debug_assert(info
->src
.resource
->format
== info
->dst
.resource
->format
);
213 debug_assert((sbox
->y
== 0) && (sbox
->height
== 1));
214 debug_assert((dbox
->y
== 0) && (dbox
->height
== 1));
215 debug_assert((sbox
->z
== 0) && (sbox
->depth
== 1));
216 debug_assert((dbox
->z
== 0) && (dbox
->depth
== 1));
217 debug_assert(sbox
->width
== dbox
->width
);
218 debug_assert(info
->src
.level
== 0);
219 debug_assert(info
->dst
.level
== 0);
222 * Buffers can have dimensions bigger than max width, remap into
223 * multiple 1d blits to fit within max dimension
225 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
226 * seems to prevent overfetch related faults. Not quite sure what
229 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
230 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
231 * difference. On top of already splitting up the blit so width
234 * We perhaps could do a bit better, if src and dst are aligned but
235 * in the worst case this means we have to split the copy up into
236 * 16k (0x4000) minus 64 (0x40).
239 sshift
= sbox
->x
& 0x3f;
240 dshift
= dbox
->x
& 0x3f;
242 OUT_PKT7(ring
, CP_SET_MARKER
, 1);
243 OUT_RING(ring
, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE
));
245 uint32_t blit_cntl
= blit_control(FMT6_8_UNORM
, false) | 0x20000000;
246 OUT_PKT4(ring
, REG_A6XX_RB_2D_BLIT_CNTL
, 1);
247 OUT_RING(ring
, blit_cntl
);
249 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_BLIT_CNTL
, 1);
250 OUT_RING(ring
, blit_cntl
);
252 for (unsigned off
= 0; off
< sbox
->width
; off
+= (0x4000 - 0x40)) {
253 unsigned soff
, doff
, w
, p
;
255 soff
= (sbox
->x
+ off
) & ~0x3f;
256 doff
= (dbox
->x
+ off
) & ~0x3f;
258 w
= MIN2(sbox
->width
- off
, (0x4000 - 0x40));
261 debug_assert((soff
+ w
) <= fd_bo_size(src
->bo
));
262 debug_assert((doff
+ w
) <= fd_bo_size(dst
->bo
));
267 OUT_PKT4(ring
, REG_A6XX_SP_PS_2D_SRC_INFO
, 10);
268 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(FMT6_8_UNORM
) |
269 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR
) |
270 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX
) |
272 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift
+ w
) |
273 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
274 OUT_RELOC(ring
, src
->bo
, soff
, 0, 0); /* SP_PS_2D_SRC_LO/HI */
275 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p
));
277 OUT_RING(ring
, 0x00000000);
278 OUT_RING(ring
, 0x00000000);
279 OUT_RING(ring
, 0x00000000);
280 OUT_RING(ring
, 0x00000000);
281 OUT_RING(ring
, 0x00000000);
286 OUT_PKT4(ring
, REG_A6XX_RB_2D_DST_INFO
, 9);
287 OUT_RING(ring
, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(FMT6_8_UNORM
) |
288 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR
) |
289 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX
));
290 OUT_RELOC(ring
, dst
->bo
, doff
, 0, 0); /* RB_2D_DST_LO/HI */
291 OUT_RING(ring
, A6XX_RB_2D_DST_SIZE_PITCH(p
));
292 OUT_RING(ring
, 0x00000000);
293 OUT_RING(ring
, 0x00000000);
294 OUT_RING(ring
, 0x00000000);
295 OUT_RING(ring
, 0x00000000);
296 OUT_RING(ring
, 0x00000000);
301 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_SRC_TL_X
, 4);
302 OUT_RING(ring
, A6XX_GRAS_2D_SRC_TL_X_X(sshift
));
303 OUT_RING(ring
, A6XX_GRAS_2D_SRC_BR_X_X(sshift
+ w
- 1));
304 OUT_RING(ring
, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
305 OUT_RING(ring
, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
307 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_DST_TL
, 2);
308 OUT_RING(ring
, A6XX_GRAS_2D_DST_TL_X(dshift
) | A6XX_GRAS_2D_DST_TL_Y(0));
309 OUT_RING(ring
, A6XX_GRAS_2D_DST_BR_X(dshift
+ w
- 1) | A6XX_GRAS_2D_DST_BR_Y(0));
311 OUT_PKT7(ring
, CP_EVENT_WRITE
, 1);
312 OUT_RING(ring
, 0x3f);
315 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8C01
, 1);
318 OUT_PKT4(ring
, REG_A6XX_SP_2D_SRC_FORMAT
, 1);
319 OUT_RING(ring
, 0xf180);
321 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8E04
, 1);
322 OUT_RING(ring
, fd6_context(ctx
)->magic
.RB_UNKNOWN_8E04_blit
);
324 OUT_PKT7(ring
, CP_BLIT
, 1);
325 OUT_RING(ring
, CP_BLIT_0_OP(BLIT_OP_SCALE
));
329 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8E04
, 1);
330 OUT_RING(ring
, 0); /* RB_UNKNOWN_8E04 */
335 emit_blit_or_clear_texture(struct fd_context
*ctx
, struct fd_ringbuffer
*ring
,
336 const struct pipe_blit_info
*info
, union pipe_color_union
*color
)
338 const struct pipe_box
*sbox
= &info
->src
.box
;
339 const struct pipe_box
*dbox
= &info
->dst
.box
;
340 struct fd_resource
*src
, *dst
;
341 struct fdl_slice
*sslice
, *dslice
;
342 enum a6xx_format sfmt
, dfmt
;
343 enum a6xx_tile_mode stile
, dtile
;
344 enum a3xx_color_swap sswap
, dswap
;
345 int sx1
, sy1
, sx2
, sy2
;
346 int dx1
, dy1
, dx2
, dy2
;
349 fprintf(stderr
, "texture blit: ");
350 util_dump_blit_info(stderr
, info
);
351 fprintf(stderr
, "\ndst resource: ");
352 util_dump_resource(stderr
, info
->dst
.resource
);
353 fprintf(stderr
, "\nsrc resource: ");
354 util_dump_resource(stderr
, info
->src
.resource
);
355 fprintf(stderr
, "\n");
358 src
= fd_resource(info
->src
.resource
);
359 dst
= fd_resource(info
->dst
.resource
);
361 sslice
= fd_resource_slice(src
, info
->src
.level
);
362 dslice
= fd_resource_slice(dst
, info
->dst
.level
);
364 sfmt
= fd6_pipe2color(info
->src
.format
);
365 dfmt
= fd6_pipe2color(info
->dst
.format
);
367 stile
= fd_resource_tile_mode(info
->src
.resource
, info
->src
.level
);
368 dtile
= fd_resource_tile_mode(info
->dst
.resource
, info
->dst
.level
);
370 /* Linear levels of a tiled resource are always WZYX, so look at
371 * rsc->tile_mode to determine the swap.
373 sswap
= fd6_resource_swap(src
, info
->src
.format
);
374 dswap
= fd6_resource_swap(dst
, info
->dst
.format
);
376 uint32_t nr_samples
= fd_resource_nr_samples(&dst
->base
);
377 sx1
= sbox
->x
* nr_samples
;
379 sx2
= (sbox
->x
+ sbox
->width
) * nr_samples
- 1;
380 sy2
= sbox
->y
+ sbox
->height
- 1;
382 dx1
= dbox
->x
* nr_samples
;
384 dx2
= (dbox
->x
+ dbox
->width
) * nr_samples
- 1;
385 dy2
= dbox
->y
+ dbox
->height
- 1;
387 uint32_t width
= u_minify(src
->base
.width0
, info
->src
.level
) * nr_samples
;
388 uint32_t height
= u_minify(src
->base
.height0
, info
->src
.level
);
390 OUT_PKT7(ring
, CP_SET_MARKER
, 1);
391 OUT_RING(ring
, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE
));
393 uint32_t blit_cntl
= blit_control(dfmt
, util_format_is_srgb(info
->dst
.format
));
396 blit_cntl
|= A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR
;
398 switch (info
->dst
.format
) {
399 case PIPE_FORMAT_Z24X8_UNORM
:
400 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
401 case PIPE_FORMAT_X24S8_UINT
: {
402 uint32_t depth_unorm24
= color
->f
[0] * ((1u << 24) - 1);
403 uint8_t stencil
= color
->ui
[1];
404 color
->ui
[0] = depth_unorm24
& 0xff;
405 color
->ui
[1] = (depth_unorm24
>> 8) & 0xff;
406 color
->ui
[2] = (depth_unorm24
>> 16) & 0xff;
407 color
->ui
[3] = stencil
;
409 dfmt
= FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8
;
412 case PIPE_FORMAT_B5G6R5_UNORM
:
413 case PIPE_FORMAT_B5G5R5A1_UNORM
:
414 case PIPE_FORMAT_B5G5R5X1_UNORM
:
415 case PIPE_FORMAT_B4G4R4A4_UNORM
:
416 color
->ui
[0] = float_to_ubyte(color
->f
[0]);
417 color
->ui
[1] = float_to_ubyte(color
->f
[1]);
418 color
->ui
[2] = float_to_ubyte(color
->f
[2]);
419 color
->ui
[3] = float_to_ubyte(color
->f
[3]);
425 OUT_PKT4(ring
, REG_A6XX_RB_2D_SRC_SOLID_C0
, 4);
427 switch (fd6_ifmt(dfmt
)) {
429 case R2D_UNORM8_SRGB
:
430 OUT_RING(ring
, float_to_ubyte(color
->f
[0]));
431 OUT_RING(ring
, float_to_ubyte(color
->f
[1]));
432 OUT_RING(ring
, float_to_ubyte(color
->f
[2]));
433 OUT_RING(ring
, float_to_ubyte(color
->f
[3]));
436 OUT_RING(ring
, _mesa_float_to_half(color
->f
[0]));
437 OUT_RING(ring
, _mesa_float_to_half(color
->f
[1]));
438 OUT_RING(ring
, _mesa_float_to_half(color
->f
[2]));
439 OUT_RING(ring
, _mesa_float_to_half(color
->f
[3]));
440 sfmt
= FMT6_16_16_16_16_FLOAT
;
449 OUT_RING(ring
, color
->ui
[0]);
450 OUT_RING(ring
, color
->ui
[1]);
451 OUT_RING(ring
, color
->ui
[2]);
452 OUT_RING(ring
, color
->ui
[3]);
458 blit_cntl
|= 0x20000000;
460 if (info
->scissor_enable
) {
461 OUT_PKT4(ring
, REG_A6XX_GRAS_RESOLVE_CNTL_1
, 2);
462 OUT_RING(ring
, A6XX_GRAS_RESOLVE_CNTL_1_X(info
->scissor
.minx
) |
463 A6XX_GRAS_RESOLVE_CNTL_1_Y(info
->scissor
.miny
));
464 OUT_RING(ring
, A6XX_GRAS_RESOLVE_CNTL_1_X(info
->scissor
.maxx
- 1) |
465 A6XX_GRAS_RESOLVE_CNTL_1_Y(info
->scissor
.maxy
- 1));
466 blit_cntl
|= A6XX_RB_2D_BLIT_CNTL_SCISSOR
;
469 OUT_PKT4(ring
, REG_A6XX_RB_2D_BLIT_CNTL
, 1);
470 OUT_RING(ring
, blit_cntl
);
472 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_BLIT_CNTL
, 1);
473 OUT_RING(ring
, blit_cntl
);
475 for (unsigned i
= 0; i
< info
->dst
.box
.depth
; i
++) {
476 unsigned soff
= fd_resource_offset(src
, info
->src
.level
, sbox
->z
+ i
);
477 unsigned doff
= fd_resource_offset(dst
, info
->dst
.level
, dbox
->z
+ i
);
478 bool subwc_enabled
= fd_resource_ubwc_enabled(src
, info
->src
.level
);
479 bool dubwc_enabled
= fd_resource_ubwc_enabled(dst
, info
->dst
.level
);
485 if (info
->filter
== PIPE_TEX_FILTER_LINEAR
)
486 filter
= A6XX_SP_PS_2D_SRC_INFO_FILTER
;
488 enum a3xx_msaa_samples samples
= fd_msaa_samples(src
->base
.nr_samples
);
490 if (sfmt
== FMT6_10_10_10_2_UNORM_DEST
)
491 sfmt
= FMT6_10_10_10_2_UNORM
;
493 OUT_PKT4(ring
, REG_A6XX_SP_PS_2D_SRC_INFO
, 10);
494 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt
) |
495 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile
) |
496 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap
) |
497 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples
) |
498 COND(samples
> MSAA_ONE
&& (info
->mask
& PIPE_MASK_RGBA
),
499 A6XX_SP_PS_2D_SRC_INFO_SAMPLES_AVERAGE
) |
500 COND(subwc_enabled
, A6XX_SP_PS_2D_SRC_INFO_FLAGS
) |
501 COND(util_format_is_srgb(info
->src
.format
), A6XX_SP_PS_2D_SRC_INFO_SRGB
) |
503 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width
) |
504 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height
)); /* SP_PS_2D_SRC_SIZE */
505 OUT_RELOC(ring
, src
->bo
, soff
, 0, 0); /* SP_PS_2D_SRC_LO/HI */
506 OUT_RING(ring
, A6XX_SP_PS_2D_SRC_PITCH_PITCH(sslice
->pitch
));
508 OUT_RING(ring
, 0x00000000);
509 OUT_RING(ring
, 0x00000000);
510 OUT_RING(ring
, 0x00000000);
511 OUT_RING(ring
, 0x00000000);
512 OUT_RING(ring
, 0x00000000);
515 OUT_PKT4(ring
, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO
, 6);
516 fd6_emit_flag_reference(ring
, src
, info
->src
.level
, sbox
->z
+ i
);
517 OUT_RING(ring
, 0x00000000);
518 OUT_RING(ring
, 0x00000000);
519 OUT_RING(ring
, 0x00000000);
525 OUT_PKT4(ring
, REG_A6XX_RB_2D_DST_INFO
, 9);
526 OUT_RING(ring
, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt
) |
527 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile
) |
528 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap
) |
529 COND(util_format_is_srgb(info
->dst
.format
), A6XX_RB_2D_DST_INFO_SRGB
) |
530 COND(dubwc_enabled
, A6XX_RB_2D_DST_INFO_FLAGS
));
531 OUT_RELOC(ring
, dst
->bo
, doff
, 0, 0); /* RB_2D_DST_LO/HI */
532 OUT_RING(ring
, A6XX_RB_2D_DST_SIZE_PITCH(dslice
->pitch
));
533 OUT_RING(ring
, 0x00000000);
534 OUT_RING(ring
, 0x00000000);
535 OUT_RING(ring
, 0x00000000);
536 OUT_RING(ring
, 0x00000000);
537 OUT_RING(ring
, 0x00000000);
540 OUT_PKT4(ring
, REG_A6XX_RB_2D_DST_FLAGS_LO
, 6);
541 fd6_emit_flag_reference(ring
, dst
, info
->dst
.level
, dbox
->z
+ i
);
542 OUT_RING(ring
, 0x00000000);
543 OUT_RING(ring
, 0x00000000);
544 OUT_RING(ring
, 0x00000000);
550 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_SRC_TL_X
, 4);
551 OUT_RING(ring
, A6XX_GRAS_2D_SRC_TL_X_X(sx1
));
552 OUT_RING(ring
, A6XX_GRAS_2D_SRC_BR_X_X(sx2
));
553 OUT_RING(ring
, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1
));
554 OUT_RING(ring
, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2
));
556 OUT_PKT4(ring
, REG_A6XX_GRAS_2D_DST_TL
, 2);
557 OUT_RING(ring
, A6XX_GRAS_2D_DST_TL_X(dx1
) | A6XX_GRAS_2D_DST_TL_Y(dy1
));
558 OUT_RING(ring
, A6XX_GRAS_2D_DST_BR_X(dx2
) | A6XX_GRAS_2D_DST_BR_Y(dy2
));
560 OUT_PKT7(ring
, CP_EVENT_WRITE
, 1);
561 OUT_RING(ring
, 0x3f);
564 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8C01
, 1);
567 if (dfmt
== FMT6_10_10_10_2_UNORM_DEST
)
568 sfmt
= FMT6_16_16_16_16_FLOAT
;
570 /* This register is probably badly named... it seems that it's
571 * controlling the internal/accumulator format or something like
572 * that. It's certainly not tied to only the src format.
574 OUT_PKT4(ring
, REG_A6XX_SP_2D_SRC_FORMAT
, 1);
575 OUT_RING(ring
, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt
) |
576 COND(util_format_is_pure_sint(info
->src
.format
),
577 A6XX_SP_2D_SRC_FORMAT_SINT
) |
578 COND(util_format_is_pure_uint(info
->src
.format
),
579 A6XX_SP_2D_SRC_FORMAT_UINT
) |
580 COND(util_format_is_snorm(info
->src
.format
),
581 A6XX_SP_2D_SRC_FORMAT_SINT
|
582 A6XX_SP_2D_SRC_FORMAT_NORM
) |
583 COND(util_format_is_unorm(info
->src
.format
),
584 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
585 // A6XX_SP_2D_SRC_FORMAT_UINT |
586 A6XX_SP_2D_SRC_FORMAT_NORM
) |
587 COND(util_format_is_srgb(info
->dst
.format
), A6XX_SP_2D_SRC_FORMAT_SRGB
) |
588 A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
590 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8E04
, 1);
591 OUT_RING(ring
, fd6_context(ctx
)->magic
.RB_UNKNOWN_8E04_blit
);
593 OUT_PKT7(ring
, CP_BLIT
, 1);
594 OUT_RING(ring
, CP_BLIT_0_OP(BLIT_OP_SCALE
));
598 OUT_PKT4(ring
, REG_A6XX_RB_UNKNOWN_8E04
, 1);
599 OUT_RING(ring
, 0); /* RB_UNKNOWN_8E04 */
604 fd6_clear_surface(struct fd_context
*ctx
,
605 struct fd_ringbuffer
*ring
, struct pipe_surface
*psurf
,
606 uint32_t width
, uint32_t height
, union pipe_color_union
*color
)
608 struct pipe_blit_info info
= {};
610 info
.dst
.resource
= psurf
->texture
;
611 info
.dst
.level
= psurf
->u
.tex
.level
;
614 info
.dst
.box
.z
= psurf
->u
.tex
.first_layer
;
615 info
.dst
.box
.width
= width
;
616 info
.dst
.box
.height
= height
;
617 info
.dst
.box
.depth
= psurf
->u
.tex
.last_layer
+ 1 - psurf
->u
.tex
.first_layer
;
618 info
.dst
.format
= psurf
->format
;
620 info
.mask
= util_format_get_mask(psurf
->format
);
621 info
.filter
= PIPE_TEX_FILTER_NEAREST
;
622 info
.scissor_enable
= 0;
624 emit_blit_or_clear_texture(ctx
, ring
, &info
, color
);
628 handle_rgba_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*info
)
630 struct fd_batch
*batch
;
632 debug_assert(!(info
->mask
& PIPE_MASK_ZS
));
634 if (!can_do_blit(info
))
637 fd_fence_ref(&ctx
->last_fence
, NULL
);
639 batch
= fd_bc_alloc_batch(&ctx
->screen
->batch_cache
, ctx
, true);
641 fd6_emit_restore(batch
, batch
->draw
);
642 fd6_emit_lrz_flush(batch
->draw
);
644 fd_screen_lock(ctx
->screen
);
646 fd_batch_resource_read(batch
, fd_resource(info
->src
.resource
));
647 fd_batch_resource_write(batch
, fd_resource(info
->dst
.resource
));
649 fd_screen_unlock(ctx
->screen
);
651 fd_batch_set_stage(batch
, FD_STAGE_BLIT
);
653 fd_log_stream(batch
, stream
, util_dump_blit_info(stream
, info
));
657 if ((info
->src
.resource
->target
== PIPE_BUFFER
) &&
658 (info
->dst
.resource
->target
== PIPE_BUFFER
)) {
659 assert(fd_resource(info
->src
.resource
)->layout
.tile_mode
== TILE6_LINEAR
);
660 assert(fd_resource(info
->dst
.resource
)->layout
.tile_mode
== TILE6_LINEAR
);
661 fd_log(batch
, "START BLIT (BUFFER)");
662 emit_blit_buffer(ctx
, batch
->draw
, info
);
663 fd_log(batch
, "END BLIT (BUFFER)");
665 /* I don't *think* we need to handle blits between buffer <-> !buffer */
666 debug_assert(info
->src
.resource
->target
!= PIPE_BUFFER
);
667 debug_assert(info
->dst
.resource
->target
!= PIPE_BUFFER
);
668 fd_log(batch
, "START BLIT (TEXTURE)");
669 emit_blit_or_clear_texture(ctx
, batch
->draw
, info
, NULL
);
670 fd_log(batch
, "END BLIT (TEXTURE)");
673 fd6_event_write(batch
, batch
->draw
, PC_CCU_FLUSH_COLOR_TS
, true);
674 fd6_event_write(batch
, batch
->draw
, PC_CCU_FLUSH_DEPTH_TS
, true);
675 fd6_event_write(batch
, batch
->draw
, CACHE_FLUSH_TS
, true);
676 fd6_cache_inv(batch
, batch
->draw
);
678 fd_resource(info
->dst
.resource
)->valid
= true;
679 batch
->needs_flush
= true;
681 fd_batch_flush(batch
);
682 fd_batch_reference(&batch
, NULL
);
688 * Re-written z/s blits can still fail for various reasons (for example MSAA).
689 * But we want to do the fallback blit with the re-written pipe_blit_info,
690 * in particular as u_blitter cannot blit stencil. So handle the fallback
691 * ourself and never "fail".
694 do_rewritten_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*info
)
696 bool success
= handle_rgba_blit(ctx
, info
);
698 success
= fd_blitter_blit(ctx
, info
);
699 debug_assert(success
); /* fallback should never fail! */
704 * Handle depth/stencil blits either via u_blitter and/or re-writing the
705 * blit into an equivilant format that we can handle
708 handle_zs_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*info
)
710 struct pipe_blit_info blit
= *info
;
713 fprintf(stderr
, "---- handle_zs_blit: ");
714 util_dump_blit_info(stderr
, info
);
715 fprintf(stderr
, "\ndst resource: ");
716 util_dump_resource(stderr
, info
->dst
.resource
);
717 fprintf(stderr
, "\nsrc resource: ");
718 util_dump_resource(stderr
, info
->src
.resource
);
719 fprintf(stderr
, "\n");
722 switch (info
->dst
.format
) {
723 case PIPE_FORMAT_S8_UINT
:
724 debug_assert(info
->mask
== PIPE_MASK_S
);
725 blit
.mask
= PIPE_MASK_R
;
726 blit
.src
.format
= PIPE_FORMAT_R8_UINT
;
727 blit
.dst
.format
= PIPE_FORMAT_R8_UINT
;
728 return do_rewritten_blit(ctx
, &blit
);
730 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
731 if (info
->mask
& PIPE_MASK_Z
) {
732 blit
.mask
= PIPE_MASK_R
;
733 blit
.src
.format
= PIPE_FORMAT_R32_FLOAT
;
734 blit
.dst
.format
= PIPE_FORMAT_R32_FLOAT
;
735 do_rewritten_blit(ctx
, &blit
);
738 if (info
->mask
& PIPE_MASK_S
) {
739 blit
.mask
= PIPE_MASK_R
;
740 blit
.src
.format
= PIPE_FORMAT_R8_UINT
;
741 blit
.dst
.format
= PIPE_FORMAT_R8_UINT
;
742 blit
.src
.resource
= &fd_resource(info
->src
.resource
)->stencil
->base
;
743 blit
.dst
.resource
= &fd_resource(info
->dst
.resource
)->stencil
->base
;
744 do_rewritten_blit(ctx
, &blit
);
749 case PIPE_FORMAT_Z16_UNORM
:
750 blit
.mask
= PIPE_MASK_R
;
751 blit
.src
.format
= PIPE_FORMAT_R16_UNORM
;
752 blit
.dst
.format
= PIPE_FORMAT_R16_UNORM
;
753 return do_rewritten_blit(ctx
, &blit
);
755 case PIPE_FORMAT_Z32_UNORM
:
756 case PIPE_FORMAT_Z32_FLOAT
:
757 debug_assert(info
->mask
== PIPE_MASK_Z
);
758 blit
.mask
= PIPE_MASK_R
;
759 blit
.src
.format
= PIPE_FORMAT_R32_UINT
;
760 blit
.dst
.format
= PIPE_FORMAT_R32_UINT
;
761 return do_rewritten_blit(ctx
, &blit
);
763 case PIPE_FORMAT_Z24X8_UNORM
:
764 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
766 if (info
->mask
& PIPE_MASK_Z
)
767 blit
.mask
|= PIPE_MASK_R
| PIPE_MASK_G
| PIPE_MASK_B
;
768 if (info
->mask
& PIPE_MASK_S
)
769 blit
.mask
|= PIPE_MASK_A
;
770 blit
.src
.format
= PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8
;
771 blit
.dst
.format
= PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8
;
772 return fd_blitter_blit(ctx
, &blit
);
780 handle_compressed_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*info
)
782 struct pipe_blit_info blit
= *info
;
785 fprintf(stderr
, "---- handle_compressed_blit: ");
786 util_dump_blit_info(stderr
, info
);
787 fprintf(stderr
, "\ndst resource: ");
788 util_dump_resource(stderr
, info
->dst
.resource
);
789 fprintf(stderr
, "\nsrc resource: ");
790 util_dump_resource(stderr
, info
->src
.resource
);
791 fprintf(stderr
, "\n");
794 if (info
->src
.format
!= info
->dst
.format
)
795 return fd_blitter_blit(ctx
, info
);
797 if (util_format_get_blocksize(info
->src
.format
) == 8) {
798 blit
.src
.format
= blit
.dst
.format
= PIPE_FORMAT_R16G16B16A16_UINT
;
800 debug_assert(util_format_get_blocksize(info
->src
.format
) == 16);
801 blit
.src
.format
= blit
.dst
.format
= PIPE_FORMAT_R32G32B32A32_UINT
;
804 int bw
= util_format_get_blockwidth(info
->src
.format
);
805 int bh
= util_format_get_blockheight(info
->src
.format
);
807 /* NOTE: x/y *must* be aligned to block boundary (ie. in
808 * glCompressedTexSubImage2D()) but width/height may not
812 debug_assert((blit
.src
.box
.x
% bw
) == 0);
813 debug_assert((blit
.src
.box
.y
% bh
) == 0);
815 blit
.src
.box
.x
/= bw
;
816 blit
.src
.box
.y
/= bh
;
817 blit
.src
.box
.width
= DIV_ROUND_UP(blit
.src
.box
.width
, bw
);
818 blit
.src
.box
.height
= DIV_ROUND_UP(blit
.src
.box
.height
, bh
);
820 debug_assert((blit
.dst
.box
.x
% bw
) == 0);
821 debug_assert((blit
.dst
.box
.y
% bh
) == 0);
823 blit
.dst
.box
.x
/= bw
;
824 blit
.dst
.box
.y
/= bh
;
825 blit
.dst
.box
.width
= DIV_ROUND_UP(blit
.dst
.box
.width
, bw
);
826 blit
.dst
.box
.height
= DIV_ROUND_UP(blit
.dst
.box
.height
, bh
);
828 return do_rewritten_blit(ctx
, &blit
);
832 fd6_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*info
)
834 if (info
->mask
& PIPE_MASK_ZS
)
835 return handle_zs_blit(ctx
, info
);
836 if (util_format_is_compressed(info
->src
.format
) ||
837 util_format_is_compressed(info
->dst
.format
))
838 return handle_compressed_blit(ctx
, info
);
840 return handle_rgba_blit(ctx
, info
);
844 fd6_blitter_init(struct pipe_context
*pctx
)
846 if (fd_mesa_debug
& FD_DBG_NOBLIT
)
849 fd_context(pctx
)->blit
= fd6_blit
;
853 fd6_tile_mode(const struct pipe_resource
*tmpl
)
855 /* if the mipmap level 0 is still too small to be tiled, then don't
858 if (fd_resource_level_linear(tmpl
, 0))
861 /* basically just has to be a format we can blit, so uploads/downloads
862 * via linear staging buffer works:
864 if (ok_format(tmpl
->format
))