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freedreno/a6xx: Set src and dst rects outside blit loop
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29 #include "util/half_float.h"
30
31 #include "freedreno_blitter.h"
32 #include "freedreno_fence.h"
33 #include "freedreno_log.h"
34 #include "freedreno_resource.h"
35
36 #include "fd6_blitter.h"
37 #include "fd6_format.h"
38 #include "fd6_emit.h"
39 #include "fd6_resource.h"
40 #include "fd6_pack.h"
41
42 static inline enum a6xx_2d_ifmt
43 fd6_ifmt(enum a6xx_format fmt)
44 {
45 switch (fmt) {
46 case FMT6_A8_UNORM:
47 case FMT6_8_UNORM:
48 case FMT6_8_SNORM:
49 case FMT6_8_8_UNORM:
50 case FMT6_8_8_SNORM:
51 case FMT6_8_8_8_8_UNORM:
52 case FMT6_8_8_8_X8_UNORM:
53 case FMT6_8_8_8_8_SNORM:
54 case FMT6_4_4_4_4_UNORM:
55 case FMT6_5_5_5_1_UNORM:
56 case FMT6_5_6_5_UNORM:
57 return R2D_UNORM8;
58
59 case FMT6_32_UINT:
60 case FMT6_32_SINT:
61 case FMT6_32_32_UINT:
62 case FMT6_32_32_SINT:
63 case FMT6_32_32_32_32_UINT:
64 case FMT6_32_32_32_32_SINT:
65 return R2D_INT32;
66
67 case FMT6_16_UINT:
68 case FMT6_16_SINT:
69 case FMT6_16_16_UINT:
70 case FMT6_16_16_SINT:
71 case FMT6_16_16_16_16_UINT:
72 case FMT6_16_16_16_16_SINT:
73 case FMT6_10_10_10_2_UINT:
74 return R2D_INT16;
75
76 case FMT6_8_UINT:
77 case FMT6_8_SINT:
78 case FMT6_8_8_UINT:
79 case FMT6_8_8_SINT:
80 case FMT6_8_8_8_8_UINT:
81 case FMT6_8_8_8_8_SINT:
82 case FMT6_Z24_UNORM_S8_UINT:
83 case FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8:
84 return R2D_INT8;
85
86 case FMT6_16_UNORM:
87 case FMT6_16_SNORM:
88 case FMT6_16_16_UNORM:
89 case FMT6_16_16_SNORM:
90 case FMT6_16_16_16_16_UNORM:
91 case FMT6_16_16_16_16_SNORM:
92 case FMT6_32_FLOAT:
93 case FMT6_32_32_FLOAT:
94 case FMT6_32_32_32_32_FLOAT:
95 return R2D_FLOAT32;
96
97 case FMT6_16_FLOAT:
98 case FMT6_16_16_FLOAT:
99 case FMT6_16_16_16_16_FLOAT:
100 case FMT6_11_11_10_FLOAT:
101 case FMT6_10_10_10_2_UNORM_DEST:
102 return R2D_FLOAT16;
103
104 default:
105 unreachable("bad format");
106 return 0;
107 }
108 }
109
110 /* Make sure none of the requested dimensions extend beyond the size of the
111 * resource. Not entirely sure why this happens, but sometimes it does, and
112 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
113 * back to u_blitter
114 */
115 static bool
116 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
117 {
118 int last_layer =
119 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
120 : r->array_size;
121
122 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
123 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
124 (b->z >= 0) && (b->z + b->depth <= last_layer);
125 }
126
127 static bool
128 ok_format(enum pipe_format pfmt)
129 {
130 enum a6xx_format fmt = fd6_pipe2color(pfmt);
131
132 if (util_format_is_compressed(pfmt))
133 return true;
134
135 switch (pfmt) {
136 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
137 case PIPE_FORMAT_Z24X8_UNORM:
138 case PIPE_FORMAT_Z16_UNORM:
139 case PIPE_FORMAT_Z32_UNORM:
140 case PIPE_FORMAT_Z32_FLOAT:
141 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
142 case PIPE_FORMAT_S8_UINT:
143 return true;
144 default:
145 break;
146 }
147
148 if (fmt == FMT6_NONE)
149 return false;
150
151 if (fmt == FMT6_10_10_10_2_UNORM_DEST)
152 return false;
153
154 return true;
155 }
156
157 #define DEBUG_BLIT 0
158 #define DEBUG_BLIT_FALLBACK 0
159
160 #define fail_if(cond) \
161 do { \
162 if (cond) { \
163 if (DEBUG_BLIT_FALLBACK) { \
164 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
165 util_dump_blit_info(stderr, info); \
166 fprintf(stderr, "\nsrc: "); \
167 util_dump_resource(stderr, info->src.resource); \
168 fprintf(stderr, "\ndst: "); \
169 util_dump_resource(stderr, info->dst.resource); \
170 fprintf(stderr, "\n"); \
171 } \
172 return false; \
173 } \
174 } while (0)
175
176 static bool
177 can_do_blit(const struct pipe_blit_info *info)
178 {
179 /* I think we can do scaling, but not in z dimension since that would
180 * require blending..
181 */
182 fail_if(info->dst.box.depth != info->src.box.depth);
183
184 /* Fail if unsupported format: */
185 fail_if(!ok_format(info->src.format));
186 fail_if(!ok_format(info->dst.format));
187
188 debug_assert(!util_format_is_compressed(info->src.format));
189 debug_assert(!util_format_is_compressed(info->dst.format));
190
191 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
192
193 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
194
195 debug_assert(info->dst.box.width >= 0);
196 debug_assert(info->dst.box.height >= 0);
197 debug_assert(info->dst.box.depth >= 0);
198
199 fail_if(info->dst.resource->nr_samples > 1);
200
201 fail_if(info->window_rectangle_include);
202
203 const struct util_format_description *src_desc =
204 util_format_description(info->src.format);
205 const struct util_format_description *dst_desc =
206 util_format_description(info->dst.format);
207 const int common_channels = MIN2(src_desc->nr_channels, dst_desc->nr_channels);
208
209 if (info->mask & PIPE_MASK_RGBA) {
210 for (int i = 0; i < common_channels; i++) {
211 fail_if(memcmp(&src_desc->channel[i],
212 &dst_desc->channel[i],
213 sizeof(src_desc->channel[0])));
214 }
215 }
216
217 fail_if(info->alpha_blend);
218
219 return true;
220 }
221
222 static void
223 emit_setup(struct fd_batch *batch)
224 {
225 struct fd_ringbuffer *ring = batch->draw;
226
227 fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true);
228 fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true);
229 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
230 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
231
232 /* normal BLIT_OP_SCALE operation needs bypass RB_CCU_CNTL */
233 OUT_WFI5(ring);
234 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
235 OUT_RING(ring, fd6_context(batch->ctx)->magic.RB_CCU_CNTL_bypass);
236 }
237
238 static uint32_t
239 blit_control(enum a6xx_format fmt, bool is_srgb)
240 {
241 enum a6xx_2d_ifmt ifmt = fd6_ifmt(fmt);
242
243 if (is_srgb) {
244 assert(ifmt == R2D_UNORM8);
245 ifmt = R2D_UNORM8_SRGB;
246 }
247
248 return A6XX_RB_2D_BLIT_CNTL_MASK(0xf) |
249 A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt) |
250 A6XX_RB_2D_BLIT_CNTL_IFMT(ifmt);
251 }
252
253 /* buffers need to be handled specially since x/width can exceed the bounds
254 * supported by hw.. if necessary decompose into (potentially) two 2D blits
255 */
256 static void
257 emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring,
258 const struct pipe_blit_info *info)
259 {
260 const struct pipe_box *sbox = &info->src.box;
261 const struct pipe_box *dbox = &info->dst.box;
262 struct fd_resource *src, *dst;
263 unsigned sshift, dshift;
264
265 if (DEBUG_BLIT) {
266 fprintf(stderr, "buffer blit: ");
267 util_dump_blit_info(stderr, info);
268 fprintf(stderr, "\ndst resource: ");
269 util_dump_resource(stderr, info->dst.resource);
270 fprintf(stderr, "\nsrc resource: ");
271 util_dump_resource(stderr, info->src.resource);
272 fprintf(stderr, "\n");
273 }
274
275 src = fd_resource(info->src.resource);
276 dst = fd_resource(info->dst.resource);
277
278 debug_assert(src->layout.cpp == 1);
279 debug_assert(dst->layout.cpp == 1);
280 debug_assert(info->src.resource->format == info->dst.resource->format);
281 debug_assert((sbox->y == 0) && (sbox->height == 1));
282 debug_assert((dbox->y == 0) && (dbox->height == 1));
283 debug_assert((sbox->z == 0) && (sbox->depth == 1));
284 debug_assert((dbox->z == 0) && (dbox->depth == 1));
285 debug_assert(sbox->width == dbox->width);
286 debug_assert(info->src.level == 0);
287 debug_assert(info->dst.level == 0);
288
289 /*
290 * Buffers can have dimensions bigger than max width, remap into
291 * multiple 1d blits to fit within max dimension
292 *
293 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
294 * seems to prevent overfetch related faults. Not quite sure what
295 * the deal is there.
296 *
297 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
298 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
299 * difference. On top of already splitting up the blit so width
300 * isn't > 16k.
301 *
302 * We perhaps could do a bit better, if src and dst are aligned but
303 * in the worst case this means we have to split the copy up into
304 * 16k (0x4000) minus 64 (0x40).
305 */
306
307 sshift = sbox->x & 0x3f;
308 dshift = dbox->x & 0x3f;
309
310 OUT_PKT7(ring, CP_SET_MARKER, 1);
311 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
312
313 uint32_t blit_cntl = blit_control(FMT6_8_UNORM, false) | 0x20000000;
314 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
315 OUT_RING(ring, blit_cntl);
316
317 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
318 OUT_RING(ring, blit_cntl);
319
320 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
321 unsigned soff, doff, w, p;
322
323 soff = (sbox->x + off) & ~0x3f;
324 doff = (dbox->x + off) & ~0x3f;
325
326 w = MIN2(sbox->width - off, (0x4000 - 0x40));
327 p = align(w, 64);
328
329 debug_assert((soff + w) <= fd_bo_size(src->bo));
330 debug_assert((doff + w) <= fd_bo_size(dst->bo));
331
332 /*
333 * Emit source:
334 */
335 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
336 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(FMT6_8_UNORM) |
337 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
338 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) |
339 0x500000);
340 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
341 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
342 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
343 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
344
345 OUT_RING(ring, 0x00000000);
346 OUT_RING(ring, 0x00000000);
347 OUT_RING(ring, 0x00000000);
348 OUT_RING(ring, 0x00000000);
349 OUT_RING(ring, 0x00000000);
350
351 /*
352 * Emit destination:
353 */
354 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
355 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(FMT6_8_UNORM) |
356 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
357 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
358 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
359 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
360 OUT_RING(ring, 0x00000000);
361 OUT_RING(ring, 0x00000000);
362 OUT_RING(ring, 0x00000000);
363 OUT_RING(ring, 0x00000000);
364 OUT_RING(ring, 0x00000000);
365
366 /*
367 * Blit command:
368 */
369 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
370 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
371 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
372 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
373 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
374
375 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
376 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
377 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
378
379 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
380 OUT_RING(ring, 0x3f);
381 OUT_WFI5(ring);
382
383 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
384 OUT_RING(ring, 0);
385
386 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
387 OUT_RING(ring, 0xf180);
388
389 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
390 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
391
392 OUT_PKT7(ring, CP_BLIT, 1);
393 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
394
395 OUT_WFI5(ring);
396
397 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
398 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
399 }
400 }
401
402 static void
403 emit_blit_dst(struct fd_ringbuffer *ring, const struct pipe_blit_info *info, unsigned layer)
404 {
405 struct fd_resource *dst = fd_resource(info->dst.resource);
406 enum a6xx_format fmt = fd6_pipe2color(info->dst.format);
407 enum a6xx_tile_mode tile = fd_resource_tile_mode(info->dst.resource, info->dst.level);
408 enum a3xx_color_swap swap = fd6_resource_swap(dst, info->dst.format);
409 uint32_t pitch = fd_resource_pitch(dst, info->dst.level);
410 bool ubwc_enabled = fd_resource_ubwc_enabled(dst, info->dst.level);
411 unsigned off = fd_resource_offset(dst, info->dst.level, layer);
412
413 if (fmt == FMT6_Z24_UNORM_S8_UINT)
414 fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
415
416 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
417 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(fmt) |
418 A6XX_RB_2D_DST_INFO_TILE_MODE(tile) |
419 A6XX_RB_2D_DST_INFO_COLOR_SWAP(swap) |
420 COND(util_format_is_srgb(info->dst.format), A6XX_RB_2D_DST_INFO_SRGB) |
421 COND(ubwc_enabled, A6XX_RB_2D_DST_INFO_FLAGS));
422 OUT_RELOC(ring, dst->bo, off, 0, 0); /* RB_2D_DST_LO/HI */
423 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(pitch));
424 OUT_RING(ring, 0x00000000);
425 OUT_RING(ring, 0x00000000);
426 OUT_RING(ring, 0x00000000);
427 OUT_RING(ring, 0x00000000);
428 OUT_RING(ring, 0x00000000);
429
430 if (ubwc_enabled) {
431 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
432 fd6_emit_flag_reference(ring, dst, info->dst.level, layer);
433 OUT_RING(ring, 0x00000000);
434 OUT_RING(ring, 0x00000000);
435 OUT_RING(ring, 0x00000000);
436 }
437 }
438
439 static void
440 emit_blit_src(struct fd_ringbuffer *ring, const struct pipe_blit_info *info, unsigned layer, unsigned nr_samples)
441 {
442 struct fd_resource *src = fd_resource(info->src.resource);
443 enum a6xx_format sfmt = fd6_pipe2color(info->src.format);
444 enum a6xx_tile_mode stile = fd_resource_tile_mode(info->src.resource, info->src.level);
445 enum a3xx_color_swap sswap = fd6_resource_swap(src, info->src.format);
446 uint32_t pitch = fd_resource_pitch(src, info->src.level);
447 bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
448 unsigned soff = fd_resource_offset(src, info->src.level, layer);
449 uint32_t width = u_minify(src->base.width0, info->src.level) * nr_samples;
450 uint32_t height = u_minify(src->base.height0, info->src.level);
451 uint32_t filter = 0;
452
453 if (info->filter == PIPE_TEX_FILTER_LINEAR)
454 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
455
456 enum a3xx_msaa_samples samples = fd_msaa_samples(src->base.nr_samples);
457
458 if (sfmt == FMT6_10_10_10_2_UNORM_DEST)
459 sfmt = FMT6_10_10_10_2_UNORM;
460
461 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10);
462 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
463 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
464 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) |
465 A6XX_SP_PS_2D_SRC_INFO_SAMPLES(samples) |
466 COND(samples > MSAA_ONE && (info->mask & PIPE_MASK_RGBA),
467 A6XX_SP_PS_2D_SRC_INFO_SAMPLES_AVERAGE) |
468 COND(subwc_enabled, A6XX_SP_PS_2D_SRC_INFO_FLAGS) |
469 COND(util_format_is_srgb(info->src.format), A6XX_SP_PS_2D_SRC_INFO_SRGB) |
470 0x500000 | filter);
471 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
472 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
473 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
474 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(pitch));
475
476 OUT_RING(ring, 0x00000000);
477 OUT_RING(ring, 0x00000000);
478 OUT_RING(ring, 0x00000000);
479 OUT_RING(ring, 0x00000000);
480 OUT_RING(ring, 0x00000000);
481
482 if (subwc_enabled) {
483 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
484 fd6_emit_flag_reference(ring, src, info->src.level, layer);
485 OUT_RING(ring, 0x00000000);
486 OUT_RING(ring, 0x00000000);
487 OUT_RING(ring, 0x00000000);
488 }
489 }
490
491 static void
492 emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
493 const struct pipe_blit_info *info, union pipe_color_union *color)
494 {
495 const struct pipe_box *sbox = &info->src.box;
496 const struct pipe_box *dbox = &info->dst.box;
497 struct fd_resource *dst;
498 enum a6xx_format sfmt, dfmt;
499 int sx1, sy1, sx2, sy2;
500 int dx1, dy1, dx2, dy2;
501
502 if (DEBUG_BLIT) {
503 fprintf(stderr, "texture blit: ");
504 util_dump_blit_info(stderr, info);
505 fprintf(stderr, "\ndst resource: ");
506 util_dump_resource(stderr, info->dst.resource);
507 fprintf(stderr, "\nsrc resource: ");
508 util_dump_resource(stderr, info->src.resource);
509 fprintf(stderr, "\n");
510 }
511
512 dst = fd_resource(info->dst.resource);
513
514 sfmt = fd6_pipe2color(info->src.format);
515 dfmt = fd6_pipe2color(info->dst.format);
516
517 OUT_PKT7(ring, CP_SET_MARKER, 1);
518 OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
519
520 uint32_t nr_samples = fd_resource_nr_samples(&dst->base);
521 sx1 = sbox->x * nr_samples;
522 sy1 = sbox->y;
523 sx2 = (sbox->x + sbox->width) * nr_samples - 1;
524 sy2 = sbox->y + sbox->height - 1;
525
526 dx1 = dbox->x * nr_samples;
527 dy1 = dbox->y;
528 dx2 = (dbox->x + dbox->width) * nr_samples - 1;
529 dy2 = dbox->y + dbox->height - 1;
530
531 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
532 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
533 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
534 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
535 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
536
537 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
538 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
539 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
540
541 uint32_t blit_cntl = blit_control(dfmt, util_format_is_srgb(info->dst.format));
542
543 if (color) {
544 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SOLID_COLOR;
545
546 switch (info->dst.format) {
547 case PIPE_FORMAT_Z24X8_UNORM:
548 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
549 case PIPE_FORMAT_X24S8_UINT: {
550 uint32_t depth_unorm24 = color->f[0] * ((1u << 24) - 1);
551 uint8_t stencil = color->ui[1];
552 color->ui[0] = depth_unorm24 & 0xff;
553 color->ui[1] = (depth_unorm24 >> 8) & 0xff;
554 color->ui[2] = (depth_unorm24 >> 16) & 0xff;
555 color->ui[3] = stencil;
556 break;
557 }
558 default:
559 break;
560 }
561
562 OUT_PKT4(ring, REG_A6XX_RB_2D_SRC_SOLID_C0, 4);
563
564 switch (fd6_ifmt(dfmt)) {
565 case R2D_UNORM8:
566 case R2D_UNORM8_SRGB:
567 OUT_RING(ring, float_to_ubyte(color->f[0]));
568 OUT_RING(ring, float_to_ubyte(color->f[1]));
569 OUT_RING(ring, float_to_ubyte(color->f[2]));
570 OUT_RING(ring, float_to_ubyte(color->f[3]));
571 break;
572 case R2D_FLOAT16:
573 OUT_RING(ring, _mesa_float_to_half(color->f[0]));
574 OUT_RING(ring, _mesa_float_to_half(color->f[1]));
575 OUT_RING(ring, _mesa_float_to_half(color->f[2]));
576 OUT_RING(ring, _mesa_float_to_half(color->f[3]));
577 sfmt = FMT6_16_16_16_16_FLOAT;
578 break;
579 case R2D_FLOAT32:
580 case R2D_INT32:
581 case R2D_INT16:
582 case R2D_INT8:
583 default:
584 OUT_RING(ring, color->ui[0]);
585 OUT_RING(ring, color->ui[1]);
586 OUT_RING(ring, color->ui[2]);
587 OUT_RING(ring, color->ui[3]);
588 break;
589 }
590 }
591
592 if (info->scissor_enable) {
593 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
594 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
595 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
596 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
597 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
598 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
599 }
600
601 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
602 OUT_RING(ring, blit_cntl);
603
604 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
605 OUT_RING(ring, blit_cntl);
606
607 for (unsigned i = 0; i < info->dst.box.depth; i++) {
608
609 emit_blit_src(ring, info, sbox->z + i, nr_samples);
610
611 emit_blit_dst(ring, info, dbox->z + i);
612
613 /*
614 * Blit command:
615 */
616 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
617 OUT_RING(ring, 0x3f);
618 OUT_WFI5(ring);
619
620 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
621 OUT_RING(ring, 0);
622
623 if (dfmt == FMT6_10_10_10_2_UNORM_DEST)
624 sfmt = FMT6_16_16_16_16_FLOAT;
625
626 /* This register is probably badly named... it seems that it's
627 * controlling the internal/accumulator format or something like
628 * that. It's certainly not tied to only the src format.
629 */
630 OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
631 OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(sfmt) |
632 COND(util_format_is_pure_sint(info->src.format),
633 A6XX_SP_2D_SRC_FORMAT_SINT) |
634 COND(util_format_is_pure_uint(info->src.format),
635 A6XX_SP_2D_SRC_FORMAT_UINT) |
636 COND(util_format_is_snorm(info->src.format),
637 A6XX_SP_2D_SRC_FORMAT_SINT |
638 A6XX_SP_2D_SRC_FORMAT_NORM) |
639 COND(util_format_is_unorm(info->src.format),
640 // TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
641 // A6XX_SP_2D_SRC_FORMAT_UINT |
642 A6XX_SP_2D_SRC_FORMAT_NORM) |
643 COND(util_format_is_srgb(info->dst.format), A6XX_SP_2D_SRC_FORMAT_SRGB) |
644 A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
645
646 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
647 OUT_RING(ring, fd6_context(ctx)->magic.RB_UNKNOWN_8E04_blit);
648
649 OUT_PKT7(ring, CP_BLIT, 1);
650 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
651
652 OUT_WFI5(ring);
653
654 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1);
655 OUT_RING(ring, 0); /* RB_UNKNOWN_8E04 */
656 }
657 }
658
659 void
660 fd6_clear_surface(struct fd_context *ctx,
661 struct fd_ringbuffer *ring, struct pipe_surface *psurf,
662 uint32_t width, uint32_t height, union pipe_color_union *color)
663 {
664 struct pipe_blit_info info = {};
665
666 info.dst.resource = psurf->texture;
667 info.dst.level = psurf->u.tex.level;
668 info.dst.box.x = 0;
669 info.dst.box.y = 0;
670 info.dst.box.z = psurf->u.tex.first_layer;
671 info.dst.box.width = width;
672 info.dst.box.height = height;
673 info.dst.box.depth = psurf->u.tex.last_layer + 1 - psurf->u.tex.first_layer;
674 info.dst.format = psurf->format;
675 info.src = info.dst;
676 info.mask = util_format_get_mask(psurf->format);
677 info.filter = PIPE_TEX_FILTER_NEAREST;
678 info.scissor_enable = 0;
679
680 emit_blit_or_clear_texture(ctx, ring, &info, color);
681 }
682
683 static bool
684 handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
685 {
686 struct fd_batch *batch;
687
688 debug_assert(!(info->mask & PIPE_MASK_ZS));
689
690 if (!can_do_blit(info))
691 return false;
692
693 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
694
695 fd6_emit_restore(batch, batch->draw);
696 fd6_emit_lrz_flush(batch->draw);
697
698 fd_screen_lock(ctx->screen);
699
700 fd_batch_resource_read(batch, fd_resource(info->src.resource));
701 fd_batch_resource_write(batch, fd_resource(info->dst.resource));
702
703 fd_screen_unlock(ctx->screen);
704
705 /* Clearing last_fence must come after the batch dependency tracking
706 * (resource_read()/resource_write()), as that can trigger a flush,
707 * re-populating last_fence
708 */
709 fd_fence_ref(&ctx->last_fence, NULL);
710
711 fd_batch_set_stage(batch, FD_STAGE_BLIT);
712
713 fd_log_stream(batch, stream, util_dump_blit_info(stream, info));
714
715 emit_setup(batch);
716
717 if ((info->src.resource->target == PIPE_BUFFER) &&
718 (info->dst.resource->target == PIPE_BUFFER)) {
719 assert(fd_resource(info->src.resource)->layout.tile_mode == TILE6_LINEAR);
720 assert(fd_resource(info->dst.resource)->layout.tile_mode == TILE6_LINEAR);
721 fd_log(batch, "START BLIT (BUFFER)");
722 emit_blit_buffer(ctx, batch->draw, info);
723 fd_log(batch, "END BLIT (BUFFER)");
724 } else {
725 /* I don't *think* we need to handle blits between buffer <-> !buffer */
726 debug_assert(info->src.resource->target != PIPE_BUFFER);
727 debug_assert(info->dst.resource->target != PIPE_BUFFER);
728 fd_log(batch, "START BLIT (TEXTURE)");
729 emit_blit_or_clear_texture(ctx, batch->draw, info, NULL);
730 fd_log(batch, "END BLIT (TEXTURE)");
731 }
732
733 fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_COLOR_TS, true);
734 fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_DEPTH_TS, true);
735 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
736 fd6_cache_inv(batch, batch->draw);
737
738 fd_resource(info->dst.resource)->valid = true;
739 batch->needs_flush = true;
740
741 fd_batch_flush(batch);
742 fd_batch_reference(&batch, NULL);
743
744 return true;
745 }
746
747 /**
748 * Re-written z/s blits can still fail for various reasons (for example MSAA).
749 * But we want to do the fallback blit with the re-written pipe_blit_info,
750 * in particular as u_blitter cannot blit stencil. So handle the fallback
751 * ourself and never "fail".
752 */
753 static bool
754 do_rewritten_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
755 {
756 bool success = handle_rgba_blit(ctx, info);
757 if (!success)
758 success = fd_blitter_blit(ctx, info);
759 debug_assert(success); /* fallback should never fail! */
760 return success;
761 }
762
763 /**
764 * Handle depth/stencil blits either via u_blitter and/or re-writing the
765 * blit into an equivilant format that we can handle
766 */
767 static bool
768 handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
769 {
770 struct pipe_blit_info blit = *info;
771
772 if (DEBUG_BLIT) {
773 fprintf(stderr, "---- handle_zs_blit: ");
774 util_dump_blit_info(stderr, info);
775 fprintf(stderr, "\ndst resource: ");
776 util_dump_resource(stderr, info->dst.resource);
777 fprintf(stderr, "\nsrc resource: ");
778 util_dump_resource(stderr, info->src.resource);
779 fprintf(stderr, "\n");
780 }
781
782 switch (info->dst.format) {
783 case PIPE_FORMAT_S8_UINT:
784 debug_assert(info->mask == PIPE_MASK_S);
785 blit.mask = PIPE_MASK_R;
786 blit.src.format = PIPE_FORMAT_R8_UINT;
787 blit.dst.format = PIPE_FORMAT_R8_UINT;
788 return do_rewritten_blit(ctx, &blit);
789
790 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
791 if (info->mask & PIPE_MASK_Z) {
792 blit.mask = PIPE_MASK_R;
793 blit.src.format = PIPE_FORMAT_R32_FLOAT;
794 blit.dst.format = PIPE_FORMAT_R32_FLOAT;
795 do_rewritten_blit(ctx, &blit);
796 }
797
798 if (info->mask & PIPE_MASK_S) {
799 blit.mask = PIPE_MASK_R;
800 blit.src.format = PIPE_FORMAT_R8_UINT;
801 blit.dst.format = PIPE_FORMAT_R8_UINT;
802 blit.src.resource = &fd_resource(info->src.resource)->stencil->base;
803 blit.dst.resource = &fd_resource(info->dst.resource)->stencil->base;
804 do_rewritten_blit(ctx, &blit);
805 }
806
807 return true;
808
809 case PIPE_FORMAT_Z16_UNORM:
810 blit.mask = PIPE_MASK_R;
811 blit.src.format = PIPE_FORMAT_R16_UNORM;
812 blit.dst.format = PIPE_FORMAT_R16_UNORM;
813 return do_rewritten_blit(ctx, &blit);
814
815 case PIPE_FORMAT_Z32_UNORM:
816 case PIPE_FORMAT_Z32_FLOAT:
817 debug_assert(info->mask == PIPE_MASK_Z);
818 blit.mask = PIPE_MASK_R;
819 blit.src.format = PIPE_FORMAT_R32_UINT;
820 blit.dst.format = PIPE_FORMAT_R32_UINT;
821 return do_rewritten_blit(ctx, &blit);
822
823 case PIPE_FORMAT_Z24X8_UNORM:
824 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
825 blit.mask = 0;
826 if (info->mask & PIPE_MASK_Z)
827 blit.mask |= PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
828 if (info->mask & PIPE_MASK_S)
829 blit.mask |= PIPE_MASK_A;
830 blit.src.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
831 blit.dst.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
832 return fd_blitter_blit(ctx, &blit);
833
834 default:
835 return false;
836 }
837 }
838
839 static bool
840 handle_compressed_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
841 {
842 struct pipe_blit_info blit = *info;
843
844 if (DEBUG_BLIT) {
845 fprintf(stderr, "---- handle_compressed_blit: ");
846 util_dump_blit_info(stderr, info);
847 fprintf(stderr, "\ndst resource: ");
848 util_dump_resource(stderr, info->dst.resource);
849 fprintf(stderr, "\nsrc resource: ");
850 util_dump_resource(stderr, info->src.resource);
851 fprintf(stderr, "\n");
852 }
853
854 if (info->src.format != info->dst.format)
855 return fd_blitter_blit(ctx, info);
856
857 if (util_format_get_blocksize(info->src.format) == 8) {
858 blit.src.format = blit.dst.format = PIPE_FORMAT_R16G16B16A16_UINT;
859 } else {
860 debug_assert(util_format_get_blocksize(info->src.format) == 16);
861 blit.src.format = blit.dst.format = PIPE_FORMAT_R32G32B32A32_UINT;
862 }
863
864 int bw = util_format_get_blockwidth(info->src.format);
865 int bh = util_format_get_blockheight(info->src.format);
866
867 /* NOTE: x/y *must* be aligned to block boundary (ie. in
868 * glCompressedTexSubImage2D()) but width/height may not
869 * be:
870 */
871
872 debug_assert((blit.src.box.x % bw) == 0);
873 debug_assert((blit.src.box.y % bh) == 0);
874
875 blit.src.box.x /= bw;
876 blit.src.box.y /= bh;
877 blit.src.box.width = DIV_ROUND_UP(blit.src.box.width, bw);
878 blit.src.box.height = DIV_ROUND_UP(blit.src.box.height, bh);
879
880 debug_assert((blit.dst.box.x % bw) == 0);
881 debug_assert((blit.dst.box.y % bh) == 0);
882
883 blit.dst.box.x /= bw;
884 blit.dst.box.y /= bh;
885 blit.dst.box.width = DIV_ROUND_UP(blit.dst.box.width, bw);
886 blit.dst.box.height = DIV_ROUND_UP(blit.dst.box.height, bh);
887
888 return do_rewritten_blit(ctx, &blit);
889 }
890
891 static bool
892 fd6_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
893 {
894 if (info->mask & PIPE_MASK_ZS)
895 return handle_zs_blit(ctx, info);
896 if (util_format_is_compressed(info->src.format) ||
897 util_format_is_compressed(info->dst.format))
898 return handle_compressed_blit(ctx, info);
899
900 return handle_rgba_blit(ctx, info);
901 }
902
903 void
904 fd6_blitter_init(struct pipe_context *pctx)
905 {
906 if (fd_mesa_debug & FD_DBG_NOBLIT)
907 return;
908
909 fd_context(pctx)->blit = fd6_blit;
910 }
911
912 unsigned
913 fd6_tile_mode(const struct pipe_resource *tmpl)
914 {
915 /* if the mipmap level 0 is still too small to be tiled, then don't
916 * bother pretending:
917 */
918 if (fd_resource_level_linear(tmpl, 0))
919 return TILE6_LINEAR;
920
921 /* basically just has to be a format we can blit, so uploads/downloads
922 * via linear staging buffer works:
923 */
924 if (ok_format(tmpl->format))
925 return TILE6_3;
926
927 return TILE6_LINEAR;
928 }