freedreno: Add a6xx backend
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_context.h
1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #ifndef FD6_CONTEXT_H_
29 #define FD6_CONTEXT_H_
30
31 #include "util/u_upload_mgr.h"
32
33 #include "freedreno_drmif.h"
34
35 #include "freedreno_context.h"
36
37 #include "ir3_shader.h"
38
39 #include "a6xx.xml.h"
40
41 struct fd6_context {
42 struct fd_context base;
43
44 struct fd_bo *vs_pvt_mem, *fs_pvt_mem;
45
46 /* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes). We
47 * could combine it with another allocation.
48 */
49 struct fd_bo *vsc_size_mem;
50
51 /* TODO not sure what this is for.. probably similar to
52 * CACHE_FLUSH_TS on kernel side, where value gets written
53 * to this address synchronized w/ 3d (ie. a way to
54 * synchronize when the CP is running far ahead)
55 */
56 struct fd_bo *blit_mem;
57
58 struct u_upload_mgr *border_color_uploader;
59 struct pipe_resource *border_color_buf;
60
61 /* if *any* of bits are set in {v,f}saturate_{s,t,r} */
62 bool vsaturate, fsaturate;
63
64 /* bitmask of sampler which needs coords clamped for vertex
65 * shader:
66 */
67 uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
68
69 /* bitmask of sampler which needs coords clamped for frag
70 * shader:
71 */
72 uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
73
74 /* bitmask of samplers which need astc srgb workaround: */
75 uint16_t vastc_srgb, fastc_srgb;
76
77 /* some state changes require a different shader variant. Keep
78 * track of this so we know when we need to re-emit shader state
79 * due to variant change. See fixup_shader_state()
80 */
81 struct ir3_shader_key last_key;
82
83 /* number of active samples-passed queries: */
84 int samples_passed_queries;
85
86 /* cached state about current emitted shader program (3d): */
87 unsigned max_loc;
88 };
89
90 static inline struct fd6_context *
91 fd6_context(struct fd_context *ctx)
92 {
93 return (struct fd6_context *)ctx;
94 }
95
96 struct pipe_context *
97 fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
98
99 /* helper for places where we need to stall CP to wait for previous draws: */
100 static inline void
101 fd6_emit_flush(struct fd_context *ctx, struct fd_ringbuffer *ring)
102 {
103 OUT_PKT7(ring, CP_EVENT_WRITE, 4);
104 OUT_RING(ring, CACHE_FLUSH_TS);
105 OUT_RELOCW(ring, fd6_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
106 OUT_RING(ring, 0x00000000);
107
108 OUT_WFI5(ring);
109 }
110
111 static inline void
112 emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
113 {
114 extern unsigned marker_cnt;
115 unsigned reg = REG_A6XX_CP_SCRATCH_REG(scratch_idx);
116 OUT_PKT4(ring, reg, 1);
117 OUT_RING(ring, ++marker_cnt);
118 }
119
120 #endif /* FD6_CONTEXT_H_ */