2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * Rob Clark <robclark@freedesktop.org>
28 #ifndef FD6_CONTEXT_H_
29 #define FD6_CONTEXT_H_
31 #include "util/u_upload_mgr.h"
33 #include "freedreno_context.h"
34 #include "freedreno_resource.h"
36 #include "ir3/ir3_shader.h"
40 struct fd6_lrz_state
{
44 enum fd_lrz_direction direction
: 2;
46 /* this comes from the fs program state, rather than zsa: */
47 enum a6xx_ztest_mode z_mode
: 2;
51 struct fd_context base
;
53 /* Two buffers related to hw binning / visibility stream (VSC).
54 * Compared to previous generations
55 * (1) we cannot specify individual buffers per VSC, instead
56 * just a pitch and base address
57 * (2) there is a second smaller buffer.. we also stash
58 * VSC_BIN_SIZE at end of 2nd buffer.
60 struct fd_bo
*vsc_draw_strm
, *vsc_prim_strm
;
62 unsigned vsc_draw_strm_pitch
, vsc_prim_strm_pitch
;
64 /* The 'control' mem BO is used for various housekeeping
65 * functions. See 'struct fd6_control'
67 struct fd_bo
*control_mem
;
70 struct u_upload_mgr
*border_color_uploader
;
71 struct pipe_resource
*border_color_buf
;
73 /* if *any* of bits are set in {v,f}saturate_{s,t,r} */
74 bool vsaturate
, fsaturate
;
76 /* bitmask of sampler which needs coords clamped for vertex
79 uint16_t vsaturate_s
, vsaturate_t
, vsaturate_r
;
81 /* bitmask of sampler which needs coords clamped for frag
84 uint16_t fsaturate_s
, fsaturate_t
, fsaturate_r
;
86 /* some state changes require a different shader variant. Keep
87 * track of this so we know when we need to re-emit shader state
88 * due to variant change. See fixup_shader_state()
90 struct ir3_shader_key last_key
;
92 /* Is there current VS driver-param state set? */
95 /* number of active samples-passed queries: */
96 int samples_passed_queries
;
98 /* maps per-shader-stage state plus variant key to hw
101 struct ir3_cache
*shader_cache
;
103 /* cached stateobjs to avoid hashtable lookup when not dirty: */
104 const struct fd6_program_state
*prog
;
107 struct hash_table
*tex_cache
;
109 /* collection of magic register values which differ between
110 * various different a6xx
113 uint32_t RB_UNKNOWN_8E04_blit
; /* value for CP_BLIT's */
114 uint32_t RB_CCU_CNTL_bypass
; /* for sysmem rendering */
115 uint32_t RB_CCU_CNTL_gmem
; /* for GMEM rendering */
116 uint32_t PC_UNKNOWN_9805
;
117 uint32_t SP_UNKNOWN_A0F8
;
121 /* previous binning/draw lrz state, which is a function of multiple
122 * gallium stateobjs, but doesn't necessarily change as frequently:
124 struct fd6_lrz_state lrz
[2];
128 static inline struct fd6_context
*
129 fd6_context(struct fd_context
*ctx
)
131 return (struct fd6_context
*)ctx
;
134 struct pipe_context
*
135 fd6_context_create(struct pipe_screen
*pscreen
, void *priv
, unsigned flags
);
138 /* This struct defines the layout of the fd6_context::control buffer: */
140 uint32_t seqno
; /* seqno for async CP_EVENT_WRITE, etc */
142 volatile uint32_t vsc_overflow
;
145 /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
152 #define control_ptr(fd6_ctx, member) \
153 (fd6_ctx)->control_mem, offsetof(struct fd6_control, member), 0, 0
157 emit_marker6(struct fd_ringbuffer
*ring
, int scratch_idx
)
159 extern unsigned marker_cnt
;
160 unsigned reg
= REG_A6XX_CP_SCRATCH_REG(scratch_idx
);
162 # define __EMIT_MARKER 1
164 # define __EMIT_MARKER 0
168 OUT_PKT4(ring
, reg
, 1);
169 OUT_RING(ring
, ++marker_cnt
);
173 struct fd6_vertex_stateobj
{
174 struct fd_vertex_stateobj base
;
175 struct fd_ringbuffer
*stateobj
;
178 static inline struct fd6_vertex_stateobj
*
179 fd6_vertex_stateobj(void *p
)
181 return (struct fd6_vertex_stateobj
*) p
;
185 #endif /* FD6_CONTEXT_H_ */