src/gallium/drivers/freedreno/a6xx/fd6_context.h

   1 /*
   2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
   3  * Copyright © 2018 Google, Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  * Authors:
  25  *    Rob Clark <robclark@freedesktop.org>
  26  */
  27
  28 #ifndef FD6_CONTEXT_H_
  29 #define FD6_CONTEXT_H_
  30
  31 #include "util/u_upload_mgr.h"
  32
  33 #include "freedreno_context.h"
  34
  35 #include "ir3/ir3_shader.h"
  36
  37 #include "a6xx.xml.h"
  38
  39 struct fd6_context {
  40         struct fd_context base;
  41
  42         /* Two buffers related to hw binning / visibility stream (VSC).
  43          * Compared to previous generations
  44          *   (1) we cannot specify individual buffers per VSC, instead
  45          *       just a pitch and base address
  46          *   (2) there is a second smaller buffer, for something.. we
  47          *       also stash VSC_BIN_SIZE at end of 2nd buffer.
  48          */
  49         struct fd_bo *vsc_data, *vsc_data2;
  50
  51 // TODO annoyingly large sizes to prevent hangs with larger amounts
  52 // of geometry, like aquarium with max # of fish.  Need to figure
  53 // out how to calculate the required size.
  54 #define A6XX_VSC_DATA_PITCH  0x4400
  55 #define A6XX_VSC_DATA2_PITCH 0x10400
  56
  57         /* TODO not sure what this is for.. probably similar to
  58          * CACHE_FLUSH_TS on kernel side, where value gets written
  59          * to this address synchronized w/ 3d (ie. a way to
  60          * synchronize when the CP is running far ahead)
  61          */
  62         struct fd_bo *blit_mem;
  63         uint32_t seqno;
  64
  65         struct u_upload_mgr *border_color_uploader;
  66         struct pipe_resource *border_color_buf;
  67
  68         /* if *any* of bits are set in {v,f}saturate_{s,t,r} */
  69         bool vsaturate, fsaturate;
  70
  71         /* bitmask of sampler which needs coords clamped for vertex
  72          * shader:
  73          */
  74         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  75
  76         /* bitmask of sampler which needs coords clamped for frag
  77          * shader:
  78          */
  79         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
  80
  81         /* some state changes require a different shader variant.  Keep
  82          * track of this so we know when we need to re-emit shader state
  83          * due to variant change.  See fixup_shader_state()
  84          */
  85         struct ir3_shader_key last_key;
  86
  87         /* number of active samples-passed queries: */
  88         int samples_passed_queries;
  89
  90         /* maps per-shader-stage state plus variant key to hw
  91          * program stateobj:
  92          */
  93         struct ir3_cache *shader_cache;
  94
  95         /* cached stateobjs to avoid hashtable lookup when not dirty: */
  96         const struct fd6_program_state *prog;
  97
  98         uint16_t tex_seqno;
  99         struct hash_table *tex_cache;
 100 };
 101
 102 static inline struct fd6_context *
 103 fd6_context(struct fd_context *ctx)
 104 {
 105         return (struct fd6_context *)ctx;
 106 }
 107
 108 struct pipe_context *
 109 fd6_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
 110
 111 static inline void
 112 emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
 113 {
 114         extern unsigned marker_cnt;
 115         unsigned reg = REG_A6XX_CP_SCRATCH_REG(scratch_idx);
 116         OUT_PKT4(ring, reg, 1);
 117         OUT_RING(ring, ++marker_cnt);
 118 }
 119
 120 #endif /* FD6_CONTEXT_H_ */