8f3c058cf5c8aa3a7029213d35b8922de3288d7f
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_draw.h
1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #ifndef FD6_DRAW_H_
29 #define FD6_DRAW_H_
30
31 #include "pipe/p_context.h"
32
33 #include "freedreno_draw.h"
34
35 #include "fd6_context.h"
36
37 /* some bits in common w/ a4xx: */
38 #include "a4xx/fd4_draw.h"
39
40 void fd6_draw_init(struct pipe_context *pctx);
41
42 static inline void
43 fd6_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
44 enum pc_di_primtype primtype,
45 enum pc_di_vis_cull_mode vismode,
46 enum pc_di_src_sel src_sel, uint32_t count,
47 uint32_t instances, enum a4xx_index_size idx_type,
48 uint32_t idx_size, uint32_t idx_offset,
49 struct pipe_resource *idx_buffer)
50 {
51 /* for debug after a lock up, write a unique counter value
52 * to scratch7 for each draw, to make it easier to match up
53 * register dumps to cmdstream. The combination of IB
54 * (scratch6) and DRAW is enough to "triangulate" the
55 * particular draw that caused lockup.
56 */
57 emit_marker6(ring, 7);
58
59 OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
60 if (vismode == USE_VISIBILITY) {
61 /* leave vis mode blank for now, it will be patched up when
62 * we know if we are binning or not
63 */
64 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0) | 0x2000,
65 &batch->draw_patches);
66 } else {
67 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode) | 0x2000);
68 }
69 OUT_RING(ring, instances); /* NumInstances */
70 OUT_RING(ring, count); /* NumIndices */
71 if (idx_buffer) {
72 OUT_RING(ring, 0x0); /* XXX */
73 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
74 OUT_RING (ring, idx_size);
75 }
76
77 emit_marker6(ring, 7);
78
79 fd_reset_wfi(batch);
80 }
81
82 static inline void
83 fd6_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
84 enum pc_di_primtype primtype,
85 enum pc_di_vis_cull_mode vismode,
86 const struct pipe_draw_info *info,
87 unsigned index_offset)
88 {
89 struct pipe_resource *idx_buffer = NULL;
90 enum a4xx_index_size idx_type;
91 enum pc_di_src_sel src_sel;
92 uint32_t idx_size, idx_offset;
93
94 if (info->indirect) {
95 struct fd_resource *ind = fd_resource(info->indirect->buffer);
96
97 emit_marker6(ring, 7);
98
99 if (info->index_size) {
100 struct pipe_resource *idx = info->index.resource;
101 unsigned max_indicies = (idx->width0 - info->indirect->offset) /
102 info->index_size;
103
104 OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
105 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
106 fd4_size2indextype(info->index_size), 0),
107 &batch->draw_patches);
108 OUT_RELOC(ring, fd_resource(idx)->bo,
109 index_offset, 0, 0);
110 // XXX: Check A5xx vs A6xx
111 OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
112 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
113 } else {
114 OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
115 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
116 &batch->draw_patches);
117 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
118 }
119
120 emit_marker6(ring, 7);
121 fd_reset_wfi(batch);
122
123 return;
124 }
125
126 if (info->index_size) {
127 assert(!info->has_user_indices);
128
129 idx_buffer = info->index.resource;
130 idx_type = fd4_size2indextype(info->index_size);
131 idx_size = info->index_size * info->count;
132 idx_offset = index_offset + info->start * info->index_size;
133 src_sel = DI_SRC_SEL_DMA;
134 } else {
135 idx_buffer = NULL;
136 idx_type = INDEX4_SIZE_32_BIT;
137 idx_size = 0;
138 idx_offset = 0;
139 src_sel = DI_SRC_SEL_AUTO_INDEX;
140 }
141
142 fd6_draw(batch, ring, primtype, vismode, src_sel,
143 info->count, info->instance_count,
144 idx_type, idx_size, idx_offset, idx_buffer);
145 }
146
147 #endif /* FD6_DRAW_H_ */