src/gallium/drivers/freedreno/a6xx/fd6_emit.h

   1 /*
   2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
   3  * Copyright © 2018 Google, Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  * Authors:
  25  *    Rob Clark <robclark@freedesktop.org>
  26  */
  27
  28 #ifndef FD6_EMIT_H
  29 #define FD6_EMIT_H
  30
  31 #include "pipe/p_context.h"
  32
  33 #include "freedreno_context.h"
  34 #include "fd6_context.h"
  35 #include "fd6_format.h"
  36 #include "fd6_program.h"
  37 #include "ir3_shader.h"
  38
  39 struct fd_ringbuffer;
  40
  41 /* To collect all the state objects to emit in a single CP_SET_DRAW_STATE
  42  * packet, the emit tracks a collection of however many state_group's that
  43  * need to be emit'd.
  44  */
  45 enum fd6_state_id {
  46         FD6_GROUP_PROG,
  47         FD6_GROUP_VS_CONST,
  48         FD6_GROUP_FS_CONST,
  49         FD6_GROUP_VS_TEX,
  50         FD6_GROUP_FS_TEX,
  51 };
  52
  53 struct fd6_state_group {
  54         struct fd_ringbuffer *stateobj;
  55         enum fd6_state_id group_id;
  56         uint8_t enable_mask;
  57 };
  58
  59 /* grouped together emit-state for prog/vertex/state emit: */
  60 struct fd6_emit {
  61         struct fd_context *ctx;
  62         const struct fd_vertex_state *vtx;
  63         const struct pipe_draw_info *info;
  64         bool binning_pass;
  65         struct ir3_cache_key key;
  66         enum fd_dirty_3d_state dirty;
  67
  68         uint32_t sprite_coord_enable;  /* bitmask */
  69         bool sprite_coord_mode;
  70         bool rasterflat;
  71         bool no_decode_srgb;
  72
  73         /* in binning pass, we don't have real frag shader, so we
  74          * don't know if real draw disqualifies lrz write.  So just
  75          * figure that out up-front and stash it in the emit.
  76          */
  77         bool no_lrz_write;
  78
  79         /* cached to avoid repeated lookups: */
  80         const struct fd6_program_state *prog;
  81
  82         struct ir3_shader_variant *vs;
  83         struct ir3_shader_variant *fs;
  84
  85         unsigned streamout_mask;
  86
  87         struct fd6_state_group groups[32];
  88         unsigned num_groups;
  89 };
  90
  91 static inline const struct fd6_program_state *
  92 fd6_emit_get_prog(struct fd6_emit *emit)
  93 {
  94         if (!emit->prog) {
  95                 struct fd6_context *fd6_ctx = fd6_context(emit->ctx);
  96                 struct ir3_program_state *s =
  97                                 ir3_cache_lookup(fd6_ctx->shader_cache, &emit->key, &emit->ctx->debug);
  98                 emit->prog = fd6_program_state(s);
  99         }
 100         return emit->prog;
 101 }
 102
 103 static inline void
 104 fd6_emit_add_group(struct fd6_emit *emit, struct fd_ringbuffer *stateobj,
 105                 enum fd6_state_id group_id, unsigned enable_mask)
 106 {
 107         debug_assert(emit->num_groups < ARRAY_SIZE(emit->groups));
 108         if (fd_ringbuffer_size(stateobj) == 0)
 109                 return;
 110         struct fd6_state_group *g = &emit->groups[emit->num_groups++];
 111         g->stateobj = fd_ringbuffer_ref(stateobj);
 112         g->group_id = group_id;
 113         g->enable_mask = enable_mask;
 114 }
 115
 116 static inline void
 117 fd6_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring,
 118                 enum vgt_event_type evt, bool timestamp)
 119 {
 120         fd_reset_wfi(batch);
 121
 122         OUT_PKT7(ring, CP_EVENT_WRITE, timestamp ? 4 : 1);
 123         OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(evt));
 124         if (timestamp) {
 125                 struct fd6_context *fd6_ctx = fd6_context(batch->ctx);
 126                 OUT_RELOCW(ring, fd6_ctx->blit_mem, 0, 0, 0);  /* ADDR_LO/HI */
 127                 OUT_RING(ring, ++fd6_ctx->seqno);
 128         }
 129 }
 130
 131 static inline void
 132 fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
 133 {
 134         fd6_event_write(batch, ring, 0x31, false);
 135 }
 136
 137 static inline void
 138 fd6_emit_blit(struct fd_batch *batch, struct fd_ringbuffer *ring)
 139 {
 140         emit_marker6(ring, 7);
 141         fd6_event_write(batch, ring, BLIT, false);
 142         emit_marker6(ring, 7);
 143 }
 144
 145 static inline void
 146 fd6_emit_lrz_flush(struct fd_ringbuffer *ring)
 147 {
 148         OUT_PKT7(ring, CP_EVENT_WRITE, 1);
 149         OUT_RING(ring, LRZ_FLUSH);
 150 }
 151
 152 static inline enum a6xx_state_block
 153 fd6_stage2shadersb(enum shader_t type)
 154 {
 155         switch (type) {
 156         case SHADER_VERTEX:
 157                 return SB6_VS_SHADER;
 158         case SHADER_FRAGMENT:
 159                 return SB6_FS_SHADER;
 160         case SHADER_COMPUTE:
 161                 return SB6_CS_SHADER;
 162         default:
 163                 unreachable("bad shader type");
 164                 return ~0;
 165         }
 166 }
 167
 168 bool fd6_emit_textures(struct fd_pipe *pipe, struct fd_ringbuffer *ring,
 169                 enum a6xx_state_block sb, struct fd_texture_stateobj *tex,
 170                 unsigned bcolor_offset);
 171
 172 void fd6_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd6_emit *emit);
 173
 174 void fd6_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 175                 struct fd6_emit *emit);
 176
 177 void fd6_emit_cs_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 178                 struct ir3_shader_variant *cp);
 179
 180 void fd6_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring);
 181
 182 void fd6_emit_init(struct pipe_context *pctx);
 183
 184 #define WRITE(reg, val) do {                                    \
 185                 OUT_PKT4(ring, reg, 1);                                 \
 186                 OUT_RING(ring, val);                                    \
 187         } while (0)
 188
 189
 190 #endif /* FD6_EMIT_H */