freedreno/a6xx: fix MRT config
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_resource.c
1 /*
2 * Copyright (C) 2018 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "fd6_resource.h"
29
30 /* indexed by cpp: */
31 static const struct {
32 unsigned pitchalign;
33 unsigned heightalign;
34 } tile_alignment[] = {
35 [1] = { 128, 32 },
36 [2] = { 128, 16 },
37 [3] = { 128, 16 },
38 [4] = { 64, 16 },
39 [8] = { 64, 16 },
40 [12] = { 64, 16 },
41 [16] = { 64, 16 },
42 };
43
44 /* NOTE: good way to test this is: (for example)
45 * piglit/bin/texelFetch fs sampler2D 100x100x1-100x300x1
46 */
47 static uint32_t
48 setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
49 {
50 struct pipe_resource *prsc = &rsc->base;
51 struct fd_screen *screen = fd_screen(prsc->screen);
52 enum util_format_layout layout = util_format_description(format)->layout;
53 uint32_t pitchalign = screen->gmem_alignw;
54 uint32_t heightalign;
55 uint32_t level, size = 0;
56 uint32_t width = prsc->width0;
57 uint32_t height = prsc->height0;
58 uint32_t depth = prsc->depth0;
59 /* in layer_first layout, the level (slice) contains just one
60 * layer (since in fact the layer contains the slices)
61 */
62 uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
63
64 heightalign = tile_alignment[rsc->cpp].heightalign;
65
66 for (level = 0; level <= prsc->last_level; level++) {
67 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
68 bool linear_level = fd_resource_level_linear(prsc, level);
69 uint32_t aligned_height = height;
70 uint32_t blocks;
71
72 if (rsc->tile_mode && !linear_level) {
73 pitchalign = tile_alignment[rsc->cpp].pitchalign;
74 aligned_height = align(aligned_height, heightalign);
75 } else {
76 pitchalign = 64;
77
78 /* The blits used for mem<->gmem work at a granularity of
79 * 32x32, which can cause faults due to over-fetch on the
80 * last level. The simple solution is to over-allocate a
81 * bit the last level to ensure any over-fetch is harmless.
82 * The pitch is already sufficiently aligned, but height
83 * may not be:
84 */
85 if ((level == prsc->last_level) && (prsc->target != PIPE_BUFFER))
86 aligned_height = align(aligned_height, 32);
87 }
88
89 if (layout == UTIL_FORMAT_LAYOUT_ASTC)
90 slice->pitch =
91 util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
92 else
93 slice->pitch = align(width, pitchalign);
94
95 slice->offset = size;
96 blocks = util_format_get_nblocks(format, slice->pitch, aligned_height);
97
98 /* 1d array and 2d array textures must all have the same layer size
99 * for each miplevel on a3xx. 3d textures can have different layer
100 * sizes for high levels, but the hw auto-sizer is buggy (or at least
101 * different than what this code does), so as soon as the layer size
102 * range gets into range, we stop reducing it.
103 */
104 if (prsc->target == PIPE_TEXTURE_3D && (
105 level == 1 ||
106 (level > 1 && rsc->slices[level - 1].size0 > 0xf000)))
107 slice->size0 = align(blocks * rsc->cpp, alignment);
108 else if (level == 0 || rsc->layer_first || alignment == 1)
109 slice->size0 = align(blocks * rsc->cpp, alignment);
110 else
111 slice->size0 = rsc->slices[level - 1].size0;
112
113 #if 0
114 debug_printf("%s: %ux%ux%u@%u: %2u: stride=%4u, size=%7u, aligned_height=%3u\n",
115 util_format_name(prsc->format),
116 prsc->width0, prsc->height0, prsc->depth0, rsc->cpp,
117 level, slice->pitch * rsc->cpp,
118 slice->size0 * depth * layers_in_level,
119 aligned_height);
120 #endif
121
122 size += slice->size0 * depth * layers_in_level;
123
124 width = u_minify(width, 1);
125 height = u_minify(height, 1);
126 depth = u_minify(depth, 1);
127 }
128
129 return size;
130 }
131
132 uint32_t
133 fd6_setup_slices(struct fd_resource *rsc)
134 {
135 uint32_t alignment;
136
137 switch (rsc->base.target) {
138 case PIPE_TEXTURE_3D:
139 rsc->layer_first = false;
140 alignment = 4096;
141 break;
142 default:
143 rsc->layer_first = true;
144 alignment = 1;
145 break;
146 }
147
148 return setup_slices(rsc, alignment, rsc->base.format);
149 }