freedreno/a6xx: fix 3d texture layout
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_resource.c
1 /*
2 * Copyright (C) 2018 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "fd6_resource.h"
29
30 /* indexed by cpp: */
31 static const struct {
32 unsigned pitchalign;
33 unsigned heightalign;
34 } tile_alignment[] = {
35 [1] = { 128, 32 },
36 [2] = { 128, 16 },
37 [3] = { 128, 16 },
38 [4] = { 64, 16 },
39 [8] = { 64, 16 },
40 [12] = { 64, 16 },
41 [16] = { 64, 16 },
42 };
43
44 /* NOTE: good way to test this is: (for example)
45 * piglit/bin/texelFetch fs sampler3D 100x100x8
46 */
47 static uint32_t
48 setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
49 {
50 struct pipe_resource *prsc = &rsc->base;
51 struct fd_screen *screen = fd_screen(prsc->screen);
52 enum util_format_layout layout = util_format_description(format)->layout;
53 uint32_t pitchalign = screen->gmem_alignw;
54 uint32_t heightalign;
55 uint32_t level, size = 0;
56 uint32_t width = prsc->width0;
57 uint32_t height = prsc->height0;
58 uint32_t depth = prsc->depth0;
59 /* in layer_first layout, the level (slice) contains just one
60 * layer (since in fact the layer contains the slices)
61 */
62 uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
63
64 heightalign = tile_alignment[rsc->cpp].heightalign;
65
66 for (level = 0; level <= prsc->last_level; level++) {
67 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
68 bool linear_level = fd_resource_level_linear(prsc, level);
69 uint32_t aligned_height = height;
70 uint32_t blocks;
71
72 if (rsc->tile_mode && !linear_level) {
73 pitchalign = tile_alignment[rsc->cpp].pitchalign;
74 aligned_height = align(aligned_height, heightalign);
75 } else {
76 if (prsc->target == PIPE_TEXTURE_3D) {
77 unsigned a;
78 if (width >= 64) {
79 a = util_next_power_of_two(MAX2(width, height));
80 } else {
81 a = 16;
82 }
83
84 pitchalign = align(a, 64);
85 aligned_height = align(aligned_height, a);
86 } else {
87 pitchalign = 64;
88 }
89
90 /* The blits used for mem<->gmem work at a granularity of
91 * 32x32, which can cause faults due to over-fetch on the
92 * last level. The simple solution is to over-allocate a
93 * bit the last level to ensure any over-fetch is harmless.
94 * The pitch is already sufficiently aligned, but height
95 * may not be:
96 */
97 if ((level == prsc->last_level) && (prsc->target != PIPE_BUFFER))
98 aligned_height = align(aligned_height, 32);
99 }
100
101 if (layout == UTIL_FORMAT_LAYOUT_ASTC)
102 slice->pitch =
103 util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
104 else
105 slice->pitch = align(width, pitchalign);
106
107 slice->offset = size;
108 blocks = util_format_get_nblocks(format, slice->pitch, aligned_height);
109
110 /* 1d array and 2d array textures must all have the same layer size
111 * for each miplevel on a6xx. 3d textures can have different layer
112 * sizes for high levels, but the hw auto-sizer is buggy (or at least
113 * different than what this code does), so as soon as the layer size
114 * range gets into range, we stop reducing it.
115 */
116 if (prsc->target == PIPE_TEXTURE_3D) {
117 if (level <= 1 || (rsc->slices[level - 1].size0 > 0xf000)) {
118 slice->size0 = align(blocks * rsc->cpp, alignment);
119 } else {
120 slice->size0 = rsc->slices[level - 1].size0;
121 }
122 } else {
123 slice->size0 = align(blocks * rsc->cpp, alignment);
124 }
125
126 size += slice->size0 * depth * layers_in_level;
127
128 #if 0
129 debug_printf("%s: %ux%ux%u@%u:\t%2u: stride=%4u, size=%6u,%7u, aligned_height=%3u, blocks=%u\n",
130 util_format_name(prsc->format),
131 width, height, depth, rsc->cpp,
132 level, slice->pitch * rsc->cpp,
133 slice->size0, size, aligned_height, blocks);
134 #endif
135
136 width = u_minify(width, 1);
137 height = u_minify(height, 1);
138 depth = u_minify(depth, 1);
139 }
140
141 return size;
142 }
143
144 uint32_t
145 fd6_setup_slices(struct fd_resource *rsc)
146 {
147 uint32_t alignment;
148
149 switch (rsc->base.target) {
150 case PIPE_TEXTURE_3D:
151 rsc->layer_first = false;
152 alignment = 4096;
153 break;
154 default:
155 rsc->layer_first = true;
156 alignment = 1;
157 break;
158 }
159
160 return setup_slices(rsc, alignment, rsc->base.format);
161 }