src/gallium/drivers/freedreno/a6xx/fd6_texture.c

   1 /*
   2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
   3  * Copyright © 2018 Google, Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  * Authors:
  25  *    Rob Clark <robclark@freedesktop.org>
  26  */
  27
  28 #include "pipe/p_state.h"
  29 #include "util/u_string.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_inlines.h"
  32 #include "util/u_format.h"
  33 #include "util/hash_table.h"
  34
  35 #include "fd6_texture.h"
  36 #include "fd6_format.h"
  37 #include "fd6_emit.h"
  38
  39 static void fd6_texture_state_destroy(struct fd6_texture_state *state);
  40
  41 static enum a6xx_tex_clamp
  42 tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border)
  43 {
  44         /* Hardware does not support _CLAMP, but we emulate it: */
  45         if (wrap == PIPE_TEX_WRAP_CLAMP) {
  46                 wrap = (clamp_to_edge) ?
  47                         PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER;
  48         }
  49
  50         switch (wrap) {
  51         case PIPE_TEX_WRAP_REPEAT:
  52                 return A6XX_TEX_REPEAT;
  53         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
  54                 return A6XX_TEX_CLAMP_TO_EDGE;
  55         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
  56                 *needs_border = true;
  57                 return A6XX_TEX_CLAMP_TO_BORDER;
  58         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
  59                 /* only works for PoT.. need to emulate otherwise! */
  60                 return A6XX_TEX_MIRROR_CLAMP;
  61         case PIPE_TEX_WRAP_MIRROR_REPEAT:
  62                 return A6XX_TEX_MIRROR_REPEAT;
  63         case PIPE_TEX_WRAP_MIRROR_CLAMP:
  64         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
  65                 /* these two we could perhaps emulate, but we currently
  66                  * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
  67                  */
  68         default:
  69                 DBG("invalid wrap: %u", wrap);
  70                 return 0;
  71         }
  72 }
  73
  74 static enum a6xx_tex_filter
  75 tex_filter(unsigned filter, bool aniso)
  76 {
  77         switch (filter) {
  78         case PIPE_TEX_FILTER_NEAREST:
  79                 return A6XX_TEX_NEAREST;
  80         case PIPE_TEX_FILTER_LINEAR:
  81                 return aniso ? A6XX_TEX_ANISO : A6XX_TEX_LINEAR;
  82         default:
  83                 DBG("invalid filter: %u", filter);
  84                 return 0;
  85         }
  86 }
  87
  88 static void *
  89 fd6_sampler_state_create(struct pipe_context *pctx,
  90                 const struct pipe_sampler_state *cso)
  91 {
  92         struct fd6_sampler_stateobj *so = CALLOC_STRUCT(fd6_sampler_stateobj);
  93         unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
  94         bool miplinear = false;
  95         bool clamp_to_edge;
  96
  97         if (!so)
  98                 return NULL;
  99
 100         so->base = *cso;
 101         so->seqno = ++fd6_context(fd_context(pctx))->tex_seqno;
 102
 103         if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
 104                 miplinear = true;
 105
 106         /*
 107          * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE;  for linear
 108          * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally
 109          * clamping the texture coordinates to [0.0, 1.0].
 110          *
 111          * The clamping will be taken care of in the shaders.  There are two
 112          * filters here, but let the minification one has a say.
 113          */
 114         clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST);
 115         if (!clamp_to_edge) {
 116                 so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP);
 117                 so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP);
 118                 so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP);
 119         }
 120
 121         so->needs_border = false;
 122         so->texsamp0 =
 123                 COND(miplinear, A6XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
 124                 A6XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
 125                 A6XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
 126                 A6XX_TEX_SAMP_0_ANISO(aniso) |
 127                 A6XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) |
 128                 A6XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) |
 129                 A6XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border));
 130
 131         so->texsamp1 =
 132                 COND(!cso->seamless_cube_map, A6XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
 133                 COND(!cso->normalized_coords, A6XX_TEX_SAMP_1_UNNORM_COORDS);
 134
 135         if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
 136                 so->texsamp0 |= A6XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
 137                 so->texsamp1 |=
 138                         A6XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
 139                         A6XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
 140         }
 141
 142         if (cso->compare_mode)
 143                 so->texsamp1 |= A6XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
 144
 145         return so;
 146 }
 147
 148 static void
 149 fd6_sampler_state_delete(struct pipe_context *pctx, void *hwcso)
 150 {
 151         struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
 152         struct fd6_sampler_stateobj *samp = hwcso;
 153
 154         struct hash_entry *entry;
 155         hash_table_foreach(fd6_ctx->tex_cache, entry) {
 156                 struct fd6_texture_state *state = entry->data;
 157
 158                 for (unsigned i = 0; i < ARRAY_SIZE(state->key.samp); i++) {
 159                         if (samp->seqno == state->key.samp[i].seqno) {
 160                                 fd6_texture_state_destroy(entry->data);
 161                                 _mesa_hash_table_remove(fd6_ctx->tex_cache, entry);
 162                                 break;
 163                         }
 164                 }
 165         }
 166
 167         free(hwcso);
 168 }
 169
 170 static void
 171 fd6_sampler_states_bind(struct pipe_context *pctx,
 172                 enum pipe_shader_type shader, unsigned start,
 173                 unsigned nr, void **hwcso)
 174 {
 175         struct fd_context *ctx = fd_context(pctx);
 176         struct fd6_context *fd6_ctx = fd6_context(ctx);
 177         uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0;
 178         unsigned i;
 179
 180         if (!hwcso)
 181                 nr = 0;
 182
 183         for (i = 0; i < nr; i++) {
 184                 if (hwcso[i]) {
 185                         struct fd6_sampler_stateobj *sampler =
 186                                         fd6_sampler_stateobj(hwcso[i]);
 187                         if (sampler->saturate_s)
 188                                 saturate_s |= (1 << i);
 189                         if (sampler->saturate_t)
 190                                 saturate_t |= (1 << i);
 191                         if (sampler->saturate_r)
 192                                 saturate_r |= (1 << i);
 193                 }
 194         }
 195
 196         fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
 197
 198         if (shader == PIPE_SHADER_FRAGMENT) {
 199                 fd6_ctx->fsaturate =
 200                         (saturate_s != 0) ||
 201                         (saturate_t != 0) ||
 202                         (saturate_r != 0);
 203                 fd6_ctx->fsaturate_s = saturate_s;
 204                 fd6_ctx->fsaturate_t = saturate_t;
 205                 fd6_ctx->fsaturate_r = saturate_r;
 206         } else if (shader == PIPE_SHADER_VERTEX) {
 207                 fd6_ctx->vsaturate =
 208                         (saturate_s != 0) ||
 209                         (saturate_t != 0) ||
 210                         (saturate_r != 0);
 211                 fd6_ctx->vsaturate_s = saturate_s;
 212                 fd6_ctx->vsaturate_t = saturate_t;
 213                 fd6_ctx->vsaturate_r = saturate_r;
 214         }
 215 }
 216
 217 static bool
 218 use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format)
 219 {
 220         return false;  // TODO check if this is still needed on a5xx
 221 }
 222
 223 static struct pipe_sampler_view *
 224 fd6_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
 225                 const struct pipe_sampler_view *cso)
 226 {
 227         struct fd6_pipe_sampler_view *so = CALLOC_STRUCT(fd6_pipe_sampler_view);
 228         struct fd_resource *rsc = fd_resource(prsc);
 229         enum pipe_format format = cso->format;
 230         unsigned lvl, layers;
 231
 232         if (!so)
 233                 return NULL;
 234
 235         if (format == PIPE_FORMAT_X32_S8X24_UINT) {
 236                 rsc = rsc->stencil;
 237                 format = rsc->base.format;
 238         }
 239
 240         so->base = *cso;
 241         pipe_reference(NULL, &prsc->reference);
 242         so->base.texture = prsc;
 243         so->base.reference.count = 1;
 244         so->base.context = pctx;
 245         so->seqno = ++fd6_context(fd_context(pctx))->tex_seqno;
 246
 247         so->texconst0 =
 248                 A6XX_TEX_CONST_0_FMT(fd6_pipe2tex(format)) |
 249                 fd6_tex_swiz(format, cso->swizzle_r, cso->swizzle_g,
 250                                 cso->swizzle_b, cso->swizzle_a);
 251
 252         /* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
 253          * we get isn't quite right.  Use SWAP(XYZW) as a cheap and cheerful
 254          * way to re-arrange things so stencil component is where the swiz
 255          * expects.
 256          *
 257          * Note that gallium expects stencil sampler to return (s,s,s,s)
 258          * which isn't quite true.  To make that happen we'd have to massage
 259          * the swizzle.  But in practice only the .x component is used.
 260          */
 261         if (format == PIPE_FORMAT_X24S8_UINT) {
 262                 so->texconst0 |= A6XX_TEX_CONST_0_SWAP(XYZW);
 263         }
 264
 265         if (util_format_is_srgb(format)) {
 266                 if (use_astc_srgb_workaround(pctx, format))
 267                         so->astc_srgb = true;
 268                 so->texconst0 |= A6XX_TEX_CONST_0_SRGB;
 269         }
 270
 271         if (cso->target == PIPE_BUFFER) {
 272                 unsigned elements = cso->u.buf.size / util_format_get_blocksize(format);
 273
 274                 lvl = 0;
 275                 so->texconst1 =
 276                         A6XX_TEX_CONST_1_WIDTH(elements) |
 277                         A6XX_TEX_CONST_1_HEIGHT(1);
 278                 so->texconst2 =
 279                         A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format)) |
 280                         A6XX_TEX_CONST_2_PITCH(elements * rsc->cpp);
 281                 so->offset = cso->u.buf.offset;
 282         } else {
 283                 unsigned miplevels;
 284
 285                 lvl = fd_sampler_first_level(cso);
 286                 miplevels = fd_sampler_last_level(cso) - lvl;
 287                 layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
 288
 289                 so->texconst0 |= A6XX_TEX_CONST_0_MIPLVLS(miplevels);
 290                 so->texconst1 =
 291                         A6XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
 292                         A6XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
 293                 so->texconst2 =
 294                         A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format)) |
 295                         A6XX_TEX_CONST_2_PITCH(
 296                                         util_format_get_nblocksx(
 297                                                         format, rsc->slices[lvl].pitch) * rsc->cpp);
 298                 so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
 299         }
 300
 301         so->texconst2 |= A6XX_TEX_CONST_2_TYPE(fd6_tex_type(cso->target));
 302
 303         switch (cso->target) {
 304         case PIPE_TEXTURE_RECT:
 305         case PIPE_TEXTURE_1D:
 306         case PIPE_TEXTURE_2D:
 307                 so->texconst3 =
 308                         A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
 309                 so->texconst5 =
 310                         A6XX_TEX_CONST_5_DEPTH(1);
 311                 break;
 312         case PIPE_TEXTURE_1D_ARRAY:
 313         case PIPE_TEXTURE_2D_ARRAY:
 314                 so->texconst3 =
 315                         A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
 316                 so->texconst5 =
 317                         A6XX_TEX_CONST_5_DEPTH(layers);
 318                 break;
 319         case PIPE_TEXTURE_CUBE:
 320         case PIPE_TEXTURE_CUBE_ARRAY:
 321                 so->texconst3 =
 322                         A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size);
 323                 so->texconst5 =
 324                         A6XX_TEX_CONST_5_DEPTH(layers / 6);
 325                 break;
 326         case PIPE_TEXTURE_3D:
 327                 so->texconst3 =
 328                         A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->slices[lvl].size0);
 329                 so->texconst5 =
 330                         A6XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
 331                 break;
 332         default:
 333                 so->texconst3 = 0x00000000;
 334                 break;
 335         }
 336
 337         return &so->base;
 338 }
 339
 340 static void
 341 fd6_sampler_view_destroy(struct pipe_context *pctx,
 342                 struct pipe_sampler_view *_view)
 343 {
 344         struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
 345         struct fd6_pipe_sampler_view *view = fd6_pipe_sampler_view(_view);
 346
 347         struct hash_entry *entry;
 348         hash_table_foreach(fd6_ctx->tex_cache, entry) {
 349                 struct fd6_texture_state *state = entry->data;
 350
 351                 for (unsigned i = 0; i < ARRAY_SIZE(state->key.view); i++) {
 352                         if (view->seqno == state->key.view[i].seqno) {
 353                                 fd6_texture_state_destroy(entry->data);
 354                                 _mesa_hash_table_remove(fd6_ctx->tex_cache, entry);
 355                                 break;
 356                         }
 357                 }
 358         }
 359
 360         pipe_resource_reference(&view->base.texture, NULL);
 361
 362         free(view);
 363 }
 364
 365 static void
 366 fd6_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
 367                 unsigned start, unsigned nr,
 368                 struct pipe_sampler_view **views)
 369 {
 370         struct fd_context *ctx = fd_context(pctx);
 371         struct fd6_context *fd6_ctx = fd6_context(ctx);
 372         uint16_t astc_srgb = 0;
 373         unsigned i;
 374
 375         for (i = 0; i < nr; i++) {
 376                 if (views[i]) {
 377                         struct fd6_pipe_sampler_view *view =
 378                                         fd6_pipe_sampler_view(views[i]);
 379                         if (view->astc_srgb)
 380                                 astc_srgb |= (1 << i);
 381                 }
 382         }
 383
 384         fd_set_sampler_views(pctx, shader, start, nr, views);
 385
 386         if (shader == PIPE_SHADER_FRAGMENT) {
 387                 fd6_ctx->fastc_srgb = astc_srgb;
 388         } else if (shader == PIPE_SHADER_VERTEX) {
 389                 fd6_ctx->vastc_srgb = astc_srgb;
 390         }
 391 }
 392
 393
 394 static uint32_t
 395 key_hash(const void *_key)
 396 {
 397         const struct fd6_texture_key *key = _key;
 398         uint32_t hash = _mesa_fnv32_1a_offset_bias;
 399         hash = _mesa_fnv32_1a_accumulate_block(hash, key, sizeof(*key));
 400         return hash;
 401 }
 402
 403 static bool
 404 key_equals(const void *_a, const void *_b)
 405 {
 406         const struct fd6_texture_key *a = _a;
 407         const struct fd6_texture_key *b = _b;
 408         return memcmp(a, b, sizeof(struct fd6_texture_key)) == 0;
 409 }
 410
 411 struct fd6_texture_state *
 412 fd6_texture_state(struct fd_context *ctx, enum a6xx_state_block sb,
 413                 struct fd_texture_stateobj *tex)
 414 {
 415         struct fd6_context *fd6_ctx = fd6_context(ctx);
 416         struct fd6_texture_key key;
 417         bool needs_border = false;
 418
 419         memset(&key, 0, sizeof(key));
 420
 421         for (unsigned i = 0; i < tex->num_textures; i++) {
 422                 if (!tex->textures[i])
 423                         continue;
 424
 425                 struct fd6_pipe_sampler_view *view =
 426                         fd6_pipe_sampler_view(tex->textures[i]);
 427
 428                 key.view[i].rsc_seqno = fd_resource(view->base.texture)->seqno;
 429                 key.view[i].seqno = view->seqno;
 430         }
 431
 432         for (unsigned i = 0; i < tex->num_samplers; i++) {
 433                 if (!tex->samplers[i])
 434                         continue;
 435
 436                 struct fd6_sampler_stateobj *sampler =
 437                         fd6_sampler_stateobj(tex->samplers[i]);
 438
 439                 key.samp[i].seqno = sampler->seqno;
 440
 441                 needs_border |= sampler->needs_border;
 442         }
 443
 444         /* This will need update for HS/DS/GS: */
 445         if (unlikely(needs_border && (sb == SB6_FS_TEX))) {
 446                 /* TODO we could probably use fixed offsets for each shader
 447                  * stage and avoid the need for # of VS samplers to be part
 448                  * of the FS tex state.. but I don't think our handling of
 449                  * BCOLOR_OFFSET is actually correct, and trying to use a
 450                  * hard coded offset of 16 breaks things.
 451                  *
 452                  * Note that when this changes, then a corresponding change
 453                  * in emit_border_color() is also needed.
 454                  */
 455                 key.bcolor_offset = ctx->tex[PIPE_SHADER_VERTEX].num_samplers;
 456         }
 457
 458         uint32_t hash = key_hash(&key);
 459         struct hash_entry *entry =
 460                 _mesa_hash_table_search_pre_hashed(fd6_ctx->tex_cache, hash, &key);
 461
 462         if (entry) {
 463                 return entry->data;
 464         }
 465
 466         struct fd6_texture_state *state = CALLOC_STRUCT(fd6_texture_state);
 467
 468         state->key = key;
 469         state->stateobj = fd_ringbuffer_new_object(ctx->pipe, 0x1000);
 470         state->needs_border = needs_border;
 471
 472         fd6_emit_textures(ctx->pipe, state->stateobj, sb, tex, key.bcolor_offset);
 473
 474         /* NOTE: uses copy of key in state obj, because pointer passed by caller
 475          * is probably on the stack
 476          */
 477         _mesa_hash_table_insert_pre_hashed(fd6_ctx->tex_cache, hash,
 478                         &state->key, state);
 479
 480         return state;
 481 }
 482
 483 static void
 484 fd6_texture_state_destroy(struct fd6_texture_state *state)
 485 {
 486         fd_ringbuffer_del(state->stateobj);
 487         free(state);
 488 }
 489
 490 void
 491 fd6_texture_init(struct pipe_context *pctx)
 492 {
 493         struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
 494
 495         pctx->create_sampler_state = fd6_sampler_state_create;
 496         pctx->delete_sampler_state = fd6_sampler_state_delete;
 497         pctx->bind_sampler_states = fd6_sampler_states_bind;
 498
 499         pctx->create_sampler_view = fd6_sampler_view_create;
 500         pctx->sampler_view_destroy = fd6_sampler_view_destroy;
 501         pctx->set_sampler_views = fd6_set_sampler_views;
 502
 503         fd6_ctx->tex_cache = _mesa_hash_table_create(NULL, key_hash, key_equals);
 504 }
 505
 506 void
 507 fd6_texture_fini(struct pipe_context *pctx)
 508 {
 509         struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
 510
 511         struct hash_entry *entry;
 512         hash_table_foreach(fd6_ctx->tex_cache, entry) {
 513                 fd6_texture_state_destroy(entry->data);
 514         }
 515         ralloc_free(fd6_ctx->tex_cache);
 516 }