2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * Rob Clark <robclark@freedesktop.org>
28 #include "pipe/p_state.h"
29 #include "util/u_string.h"
30 #include "util/u_memory.h"
31 #include "util/u_inlines.h"
32 #include "util/u_format.h"
33 #include "util/hash_table.h"
35 #include "fd6_texture.h"
36 #include "fd6_format.h"
39 static void fd6_texture_state_destroy(struct fd6_texture_state
*state
);
41 static enum a6xx_tex_clamp
42 tex_clamp(unsigned wrap
, bool clamp_to_edge
, bool *needs_border
)
44 /* Hardware does not support _CLAMP, but we emulate it: */
45 if (wrap
== PIPE_TEX_WRAP_CLAMP
) {
46 wrap
= (clamp_to_edge
) ?
47 PIPE_TEX_WRAP_CLAMP_TO_EDGE
: PIPE_TEX_WRAP_CLAMP_TO_BORDER
;
51 case PIPE_TEX_WRAP_REPEAT
:
52 return A6XX_TEX_REPEAT
;
53 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
54 return A6XX_TEX_CLAMP_TO_EDGE
;
55 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
57 return A6XX_TEX_CLAMP_TO_BORDER
;
58 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
:
59 /* only works for PoT.. need to emulate otherwise! */
60 return A6XX_TEX_MIRROR_CLAMP
;
61 case PIPE_TEX_WRAP_MIRROR_REPEAT
:
62 return A6XX_TEX_MIRROR_REPEAT
;
63 case PIPE_TEX_WRAP_MIRROR_CLAMP
:
64 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
:
65 /* these two we could perhaps emulate, but we currently
66 * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
69 DBG("invalid wrap: %u", wrap
);
74 static enum a6xx_tex_filter
75 tex_filter(unsigned filter
, bool aniso
)
78 case PIPE_TEX_FILTER_NEAREST
:
79 return A6XX_TEX_NEAREST
;
80 case PIPE_TEX_FILTER_LINEAR
:
81 return aniso
? A6XX_TEX_ANISO
: A6XX_TEX_LINEAR
;
83 DBG("invalid filter: %u", filter
);
89 fd6_sampler_state_create(struct pipe_context
*pctx
,
90 const struct pipe_sampler_state
*cso
)
92 struct fd6_sampler_stateobj
*so
= CALLOC_STRUCT(fd6_sampler_stateobj
);
93 unsigned aniso
= util_last_bit(MIN2(cso
->max_anisotropy
>> 1, 8));
94 bool miplinear
= false;
101 so
->seqno
= ++fd6_context(fd_context(pctx
))->tex_seqno
;
103 if (cso
->min_mip_filter
== PIPE_TEX_MIPFILTER_LINEAR
)
107 * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE; for linear
108 * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally
109 * clamping the texture coordinates to [0.0, 1.0].
111 * The clamping will be taken care of in the shaders. There are two
112 * filters here, but let the minification one has a say.
114 clamp_to_edge
= (cso
->min_img_filter
== PIPE_TEX_FILTER_NEAREST
);
115 if (!clamp_to_edge
) {
116 so
->saturate_s
= (cso
->wrap_s
== PIPE_TEX_WRAP_CLAMP
);
117 so
->saturate_t
= (cso
->wrap_t
== PIPE_TEX_WRAP_CLAMP
);
118 so
->saturate_r
= (cso
->wrap_r
== PIPE_TEX_WRAP_CLAMP
);
121 so
->needs_border
= false;
123 COND(miplinear
, A6XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR
) |
124 A6XX_TEX_SAMP_0_XY_MAG(tex_filter(cso
->mag_img_filter
, aniso
)) |
125 A6XX_TEX_SAMP_0_XY_MIN(tex_filter(cso
->min_img_filter
, aniso
)) |
126 A6XX_TEX_SAMP_0_ANISO(aniso
) |
127 A6XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso
->wrap_s
, clamp_to_edge
, &so
->needs_border
)) |
128 A6XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso
->wrap_t
, clamp_to_edge
, &so
->needs_border
)) |
129 A6XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso
->wrap_r
, clamp_to_edge
, &so
->needs_border
));
132 COND(!cso
->seamless_cube_map
, A6XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF
) |
133 COND(!cso
->normalized_coords
, A6XX_TEX_SAMP_1_UNNORM_COORDS
);
135 if (cso
->min_mip_filter
!= PIPE_TEX_MIPFILTER_NONE
) {
136 so
->texsamp0
|= A6XX_TEX_SAMP_0_LOD_BIAS(cso
->lod_bias
);
138 A6XX_TEX_SAMP_1_MIN_LOD(cso
->min_lod
) |
139 A6XX_TEX_SAMP_1_MAX_LOD(cso
->max_lod
);
142 if (cso
->compare_mode
)
143 so
->texsamp1
|= A6XX_TEX_SAMP_1_COMPARE_FUNC(cso
->compare_func
); /* maps 1:1 */
149 fd6_sampler_state_delete(struct pipe_context
*pctx
, void *hwcso
)
151 struct fd6_context
*fd6_ctx
= fd6_context(fd_context(pctx
));
152 struct fd6_sampler_stateobj
*samp
= hwcso
;
154 hash_table_foreach(fd6_ctx
->tex_cache
, entry
) {
155 struct fd6_texture_state
*state
= entry
->data
;
157 for (unsigned i
= 0; i
< ARRAY_SIZE(state
->key
.samp
); i
++) {
158 if (samp
->seqno
== state
->key
.samp
[i
].seqno
) {
159 fd6_texture_state_destroy(entry
->data
);
160 _mesa_hash_table_remove(fd6_ctx
->tex_cache
, entry
);
170 fd6_sampler_states_bind(struct pipe_context
*pctx
,
171 enum pipe_shader_type shader
, unsigned start
,
172 unsigned nr
, void **hwcso
)
174 struct fd_context
*ctx
= fd_context(pctx
);
175 struct fd6_context
*fd6_ctx
= fd6_context(ctx
);
176 uint16_t saturate_s
= 0, saturate_t
= 0, saturate_r
= 0;
182 for (i
= 0; i
< nr
; i
++) {
184 struct fd6_sampler_stateobj
*sampler
=
185 fd6_sampler_stateobj(hwcso
[i
]);
186 if (sampler
->saturate_s
)
187 saturate_s
|= (1 << i
);
188 if (sampler
->saturate_t
)
189 saturate_t
|= (1 << i
);
190 if (sampler
->saturate_r
)
191 saturate_r
|= (1 << i
);
195 fd_sampler_states_bind(pctx
, shader
, start
, nr
, hwcso
);
197 if (shader
== PIPE_SHADER_FRAGMENT
) {
202 fd6_ctx
->fsaturate_s
= saturate_s
;
203 fd6_ctx
->fsaturate_t
= saturate_t
;
204 fd6_ctx
->fsaturate_r
= saturate_r
;
205 } else if (shader
== PIPE_SHADER_VERTEX
) {
210 fd6_ctx
->vsaturate_s
= saturate_s
;
211 fd6_ctx
->vsaturate_t
= saturate_t
;
212 fd6_ctx
->vsaturate_r
= saturate_r
;
217 use_astc_srgb_workaround(struct pipe_context
*pctx
, enum pipe_format format
)
219 return false; // TODO check if this is still needed on a5xx
222 static struct pipe_sampler_view
*
223 fd6_sampler_view_create(struct pipe_context
*pctx
, struct pipe_resource
*prsc
,
224 const struct pipe_sampler_view
*cso
)
226 struct fd6_pipe_sampler_view
*so
= CALLOC_STRUCT(fd6_pipe_sampler_view
);
227 struct fd_resource
*rsc
= fd_resource(prsc
);
228 enum pipe_format format
= cso
->format
;
229 unsigned lvl
, layers
;
234 if (format
== PIPE_FORMAT_X32_S8X24_UINT
) {
236 format
= rsc
->base
.format
;
240 pipe_reference(NULL
, &prsc
->reference
);
241 so
->base
.texture
= prsc
;
242 so
->base
.reference
.count
= 1;
243 so
->base
.context
= pctx
;
244 so
->seqno
= ++fd6_context(fd_context(pctx
))->tex_seqno
;
247 A6XX_TEX_CONST_0_FMT(fd6_pipe2tex(format
)) |
248 A6XX_TEX_CONST_0_SAMPLES(fd_msaa_samples(prsc
->nr_samples
)) |
249 fd6_tex_swiz(format
, cso
->swizzle_r
, cso
->swizzle_g
,
250 cso
->swizzle_b
, cso
->swizzle_a
);
252 /* NOTE: since we sample z24s8 using 8888_UINT format, the swizzle
253 * we get isn't quite right. Use SWAP(XYZW) as a cheap and cheerful
254 * way to re-arrange things so stencil component is where the swiz
257 * Note that gallium expects stencil sampler to return (s,s,s,s)
258 * which isn't quite true. To make that happen we'd have to massage
259 * the swizzle. But in practice only the .x component is used.
261 if (format
== PIPE_FORMAT_X24S8_UINT
) {
262 so
->texconst0
|= A6XX_TEX_CONST_0_SWAP(XYZW
);
265 if (util_format_is_srgb(format
)) {
266 if (use_astc_srgb_workaround(pctx
, format
))
267 so
->astc_srgb
= true;
268 so
->texconst0
|= A6XX_TEX_CONST_0_SRGB
;
271 if (cso
->target
== PIPE_BUFFER
) {
272 unsigned elements
= cso
->u
.buf
.size
/ util_format_get_blocksize(format
);
276 A6XX_TEX_CONST_1_WIDTH(elements
) |
277 A6XX_TEX_CONST_1_HEIGHT(1);
279 A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format
)) |
280 A6XX_TEX_CONST_2_PITCH(elements
* rsc
->cpp
);
281 so
->offset
= cso
->u
.buf
.offset
;
284 enum a6xx_tile_mode tile_mode
= TILE6_LINEAR
;
286 lvl
= fd_sampler_first_level(cso
);
287 miplevels
= fd_sampler_last_level(cso
) - lvl
;
288 layers
= cso
->u
.tex
.last_layer
- cso
->u
.tex
.first_layer
+ 1;
290 if (!fd_resource_level_linear(prsc
, lvl
))
291 tile_mode
= fd_resource(prsc
)->tile_mode
;
293 so
->texconst0
|= A6XX_TEX_CONST_0_MIPLVLS(miplevels
) |
294 A6XX_TEX_CONST_0_TILE_MODE(tile_mode
);
296 A6XX_TEX_CONST_1_WIDTH(u_minify(prsc
->width0
, lvl
)) |
297 A6XX_TEX_CONST_1_HEIGHT(u_minify(prsc
->height0
, lvl
));
299 A6XX_TEX_CONST_2_FETCHSIZE(fd6_pipe2fetchsize(format
)) |
300 A6XX_TEX_CONST_2_PITCH(
301 util_format_get_nblocksx(
302 format
, rsc
->slices
[lvl
].pitch
) * rsc
->cpp
);
303 so
->offset
= fd_resource_offset(rsc
, lvl
, cso
->u
.tex
.first_layer
);
306 so
->texconst2
|= A6XX_TEX_CONST_2_TYPE(fd6_tex_type(cso
->target
));
308 switch (cso
->target
) {
309 case PIPE_TEXTURE_RECT
:
310 case PIPE_TEXTURE_1D
:
311 case PIPE_TEXTURE_2D
:
313 A6XX_TEX_CONST_3_ARRAY_PITCH(rsc
->layer_size
);
315 A6XX_TEX_CONST_5_DEPTH(1);
317 case PIPE_TEXTURE_1D_ARRAY
:
318 case PIPE_TEXTURE_2D_ARRAY
:
320 A6XX_TEX_CONST_3_ARRAY_PITCH(rsc
->layer_size
);
322 A6XX_TEX_CONST_5_DEPTH(layers
);
324 case PIPE_TEXTURE_CUBE
:
325 case PIPE_TEXTURE_CUBE_ARRAY
:
327 A6XX_TEX_CONST_3_ARRAY_PITCH(rsc
->layer_size
);
329 A6XX_TEX_CONST_5_DEPTH(layers
/ 6);
331 case PIPE_TEXTURE_3D
:
333 A6XX_TEX_CONST_3_MIN_LAYERSZ(rsc
->slices
[prsc
->last_level
].size0
) |
334 A6XX_TEX_CONST_3_ARRAY_PITCH(rsc
->slices
[lvl
].size0
);
336 A6XX_TEX_CONST_5_DEPTH(u_minify(prsc
->depth0
, lvl
));
346 fd6_sampler_view_destroy(struct pipe_context
*pctx
,
347 struct pipe_sampler_view
*_view
)
349 struct fd6_context
*fd6_ctx
= fd6_context(fd_context(pctx
));
350 struct fd6_pipe_sampler_view
*view
= fd6_pipe_sampler_view(_view
);
352 hash_table_foreach(fd6_ctx
->tex_cache
, entry
) {
353 struct fd6_texture_state
*state
= entry
->data
;
355 for (unsigned i
= 0; i
< ARRAY_SIZE(state
->key
.view
); i
++) {
356 if (view
->seqno
== state
->key
.view
[i
].seqno
) {
357 fd6_texture_state_destroy(entry
->data
);
358 _mesa_hash_table_remove(fd6_ctx
->tex_cache
, entry
);
364 pipe_resource_reference(&view
->base
.texture
, NULL
);
370 fd6_set_sampler_views(struct pipe_context
*pctx
, enum pipe_shader_type shader
,
371 unsigned start
, unsigned nr
,
372 struct pipe_sampler_view
**views
)
374 struct fd_context
*ctx
= fd_context(pctx
);
375 struct fd6_context
*fd6_ctx
= fd6_context(ctx
);
376 uint16_t astc_srgb
= 0;
379 for (i
= 0; i
< nr
; i
++) {
381 struct fd6_pipe_sampler_view
*view
=
382 fd6_pipe_sampler_view(views
[i
]);
384 astc_srgb
|= (1 << i
);
388 fd_set_sampler_views(pctx
, shader
, start
, nr
, views
);
390 if (shader
== PIPE_SHADER_FRAGMENT
) {
391 fd6_ctx
->fastc_srgb
= astc_srgb
;
392 } else if (shader
== PIPE_SHADER_VERTEX
) {
393 fd6_ctx
->vastc_srgb
= astc_srgb
;
399 key_hash(const void *_key
)
401 const struct fd6_texture_key
*key
= _key
;
402 uint32_t hash
= _mesa_fnv32_1a_offset_bias
;
403 hash
= _mesa_fnv32_1a_accumulate_block(hash
, key
, sizeof(*key
));
408 key_equals(const void *_a
, const void *_b
)
410 const struct fd6_texture_key
*a
= _a
;
411 const struct fd6_texture_key
*b
= _b
;
412 return memcmp(a
, b
, sizeof(struct fd6_texture_key
)) == 0;
415 struct fd6_texture_state
*
416 fd6_texture_state(struct fd_context
*ctx
, enum a6xx_state_block sb
,
417 struct fd_texture_stateobj
*tex
)
419 struct fd6_context
*fd6_ctx
= fd6_context(ctx
);
420 struct fd6_texture_key key
;
421 bool needs_border
= false;
423 memset(&key
, 0, sizeof(key
));
425 for (unsigned i
= 0; i
< tex
->num_textures
; i
++) {
426 if (!tex
->textures
[i
])
429 struct fd6_pipe_sampler_view
*view
=
430 fd6_pipe_sampler_view(tex
->textures
[i
]);
432 key
.view
[i
].rsc_seqno
= fd_resource(view
->base
.texture
)->seqno
;
433 key
.view
[i
].seqno
= view
->seqno
;
436 for (unsigned i
= 0; i
< tex
->num_samplers
; i
++) {
437 if (!tex
->samplers
[i
])
440 struct fd6_sampler_stateobj
*sampler
=
441 fd6_sampler_stateobj(tex
->samplers
[i
]);
443 key
.samp
[i
].seqno
= sampler
->seqno
;
445 needs_border
|= sampler
->needs_border
;
448 /* This will need update for HS/DS/GS: */
449 if (unlikely(needs_border
&& (sb
== SB6_FS_TEX
))) {
450 /* TODO we could probably use fixed offsets for each shader
451 * stage and avoid the need for # of VS samplers to be part
452 * of the FS tex state.. but I don't think our handling of
453 * BCOLOR_OFFSET is actually correct, and trying to use a
454 * hard coded offset of 16 breaks things.
456 * Note that when this changes, then a corresponding change
457 * in emit_border_color() is also needed.
459 key
.bcolor_offset
= ctx
->tex
[PIPE_SHADER_VERTEX
].num_samplers
;
462 uint32_t hash
= key_hash(&key
);
463 struct hash_entry
*entry
=
464 _mesa_hash_table_search_pre_hashed(fd6_ctx
->tex_cache
, hash
, &key
);
470 struct fd6_texture_state
*state
= CALLOC_STRUCT(fd6_texture_state
);
473 state
->stateobj
= fd_ringbuffer_new_object(ctx
->pipe
, 0x1000);
474 state
->needs_border
= needs_border
;
476 fd6_emit_textures(ctx
->pipe
, state
->stateobj
, sb
, tex
, key
.bcolor_offset
);
478 /* NOTE: uses copy of key in state obj, because pointer passed by caller
479 * is probably on the stack
481 _mesa_hash_table_insert_pre_hashed(fd6_ctx
->tex_cache
, hash
,
488 fd6_texture_state_destroy(struct fd6_texture_state
*state
)
490 fd_ringbuffer_del(state
->stateobj
);
495 fd6_texture_init(struct pipe_context
*pctx
)
497 struct fd6_context
*fd6_ctx
= fd6_context(fd_context(pctx
));
499 pctx
->create_sampler_state
= fd6_sampler_state_create
;
500 pctx
->delete_sampler_state
= fd6_sampler_state_delete
;
501 pctx
->bind_sampler_states
= fd6_sampler_states_bind
;
503 pctx
->create_sampler_view
= fd6_sampler_view_create
;
504 pctx
->sampler_view_destroy
= fd6_sampler_view_destroy
;
505 pctx
->set_sampler_views
= fd6_set_sampler_views
;
507 fd6_ctx
->tex_cache
= _mesa_hash_table_create(NULL
, key_hash
, key_equals
);
511 fd6_texture_fini(struct pipe_context
*pctx
)
513 struct fd6_context
*fd6_ctx
= fd6_context(fd_context(pctx
));
515 hash_table_foreach(fd6_ctx
->tex_cache
, entry
) {
516 fd6_texture_state_destroy(entry
->data
);
518 ralloc_free(fd6_ctx
->tex_cache
);