src/gallium/drivers/freedreno/freedreno_clear.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "pipe/p_state.h"
  30 #include "util/u_string.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_inlines.h"
  33 #include "util/u_pack_color.h"
  34
  35 #include "freedreno_clear.h"
  36 #include "freedreno_context.h"
  37 #include "freedreno_resource.h"
  38 #include "freedreno_state.h"
  39 #include "freedreno_program.h"
  40 #include "freedreno_zsa.h"
  41 #include "freedreno_util.h"
  42
  43 static uint32_t
  44 pack_rgba(enum pipe_format format, const float *rgba)
  45 {
  46         union util_color uc;
  47         util_pack_color(rgba, format, &uc);
  48         return uc.ui;
  49 }
  50
  51 static void
  52 fd_clear(struct pipe_context *pctx, unsigned buffers,
  53                 const union pipe_color_union *color, double depth, unsigned stencil)
  54 {
  55         struct fd_context *ctx = fd_context(pctx);
  56         struct fd_ringbuffer *ring = ctx->ring;
  57         struct pipe_framebuffer_state *fb = &ctx->framebuffer;
  58         uint32_t reg, colr = 0;
  59
  60         ctx->cleared |= buffers;
  61         ctx->resolve |= buffers;
  62         ctx->needs_flush = true;
  63
  64         if (buffers & PIPE_CLEAR_COLOR)
  65                 fd_resource(fb->cbufs[0]->texture)->dirty = true;
  66
  67         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))
  68                 fd_resource(fb->zsbuf->texture)->dirty = true;
  69
  70         DBG("%x depth=%f, stencil=%u (%s/%s)", buffers, depth, stencil,
  71                         util_format_name(fb->cbufs[0]->format),
  72                         fb->zsbuf ? util_format_name(fb->zsbuf->format) : "none");
  73
  74         if ((buffers & PIPE_CLEAR_COLOR) && fb->nr_cbufs)
  75                 colr  = pack_rgba(fb->cbufs[0]->format, color->f);
  76
  77         /* emit generic state now: */
  78         fd_state_emit(pctx, ctx->dirty &
  79                         (FD_DIRTY_BLEND | FD_DIRTY_VIEWPORT |
  80                                         FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR));
  81
  82         fd_emit_vertex_bufs(ring, 0x9c, (struct fd_vertex_buf[]) {
  83                         { .prsc = ctx->solid_vertexbuf, .size = 48 },
  84                 }, 1);
  85
  86         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  87         OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
  88         OUT_RING(ring, 0);
  89
  90         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
  91         OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
  92         OUT_RING(ring, 0x0000028f);
  93
  94         fd_program_emit(ring, &ctx->solid_prog);
  95
  96         OUT_PKT0(ring, REG_A2XX_TC_CNTL_STATUS, 1);
  97         OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE);
  98
  99         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 100         OUT_RING(ring, CP_REG(REG_A2XX_CLEAR_COLOR));
 101         OUT_RING(ring, colr);
 102
 103         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 104         OUT_RING(ring, CP_REG(REG_A2XX_A220_RB_LRZ_VSC_CONTROL));
 105         OUT_RING(ring, 0x00000084);
 106
 107         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 108         OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL));
 109         reg = 0;
 110         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 111                 reg |= A2XX_RB_COPY_CONTROL_DEPTH_CLEAR_ENABLE;
 112                 switch (fd_pipe2depth(fb->zsbuf->format)) {
 113                 case DEPTHX_24_8:
 114                         if (buffers & PIPE_CLEAR_DEPTH)
 115                                 reg |= A2XX_RB_COPY_CONTROL_CLEAR_MASK(0xe);
 116                         if (buffers & PIPE_CLEAR_STENCIL)
 117                                 reg |= A2XX_RB_COPY_CONTROL_CLEAR_MASK(0x1);
 118                         break;
 119                 case DEPTHX_16:
 120                         if (buffers & PIPE_CLEAR_DEPTH)
 121                                 reg |= A2XX_RB_COPY_CONTROL_CLEAR_MASK(0xf);
 122                         break;
 123                 default:
 124                         assert(1);
 125                         break;
 126                 }
 127         }
 128         OUT_RING(ring, reg);
 129
 130         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 131         OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTH_CLEAR));
 132         reg = 0;
 133         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 134                 switch (fd_pipe2depth(fb->zsbuf->format)) {
 135                 case DEPTHX_24_8:
 136                         reg = (((uint32_t)(0xffffff * depth)) << 8) |
 137                                 (stencil & 0xff);
 138                         break;
 139                 case DEPTHX_16:
 140                         reg = (uint32_t)(0xffffffff * depth);
 141                         break;
 142                 }
 143         }
 144         OUT_RING(ring, reg);
 145
 146         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 147         OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL));
 148         reg = 0;
 149         if (buffers & PIPE_CLEAR_DEPTH) {
 150                 reg |= A2XX_RB_DEPTHCONTROL_ZFUNC(FUNC_ALWAYS) |
 151                                 A2XX_RB_DEPTHCONTROL_Z_ENABLE |
 152                                 A2XX_RB_DEPTHCONTROL_Z_WRITE_ENABLE |
 153                                 A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE;
 154         }
 155         if (buffers & PIPE_CLEAR_STENCIL) {
 156                 reg |= A2XX_RB_DEPTHCONTROL_STENCILFUNC(FUNC_ALWAYS) |
 157                                 A2XX_RB_DEPTHCONTROL_STENCIL_ENABLE |
 158                                 A2XX_RB_DEPTHCONTROL_STENCILZPASS(STENCIL_REPLACE);
 159         }
 160         OUT_RING(ring, reg);
 161
 162         OUT_PKT3(ring, CP_SET_CONSTANT, 3);
 163         OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF));
 164         OUT_RING(ring, 0xff000000 | A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0xff));
 165         OUT_RING(ring, 0xff000000 | A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
 166
 167         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 168         OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL));
 169         OUT_RING(ring, A2XX_RB_COLORCONTROL_ALPHA_FUNC(FUNC_ALWAYS) |
 170                         A2XX_RB_COLORCONTROL_BLEND_DISABLE |
 171                         A2XX_RB_COLORCONTROL_ROP_CODE(12) |
 172                         A2XX_RB_COLORCONTROL_DITHER_MODE(DITHER_DISABLE) |
 173                         A2XX_RB_COLORCONTROL_DITHER_TYPE(DITHER_PIXEL));
 174
 175         OUT_PKT3(ring, CP_SET_CONSTANT, 3);
 176         OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL));
 177         OUT_RING(ring, 0x00000000);        /* PA_CL_CLIP_CNTL */
 178         OUT_RING(ring, A2XX_PA_SU_SC_MODE_CNTL_PROVOKING_VTX_LAST |  /* PA_SU_SC_MODE_CNTL */
 179                         A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE(PC_DRAW_TRIANGLES) |
 180                         A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE(PC_DRAW_TRIANGLES));
 181
 182         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 183         OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK));
 184         OUT_RING(ring, 0x0000ffff);
 185
 186         OUT_PKT3(ring, CP_SET_CONSTANT, 3);
 187         OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL));
 188         OUT_RING(ring, xy2d(0,0));              /* PA_SC_WINDOW_SCISSOR_TL */
 189         OUT_RING(ring, xy2d(fb->width,      /* PA_SC_WINDOW_SCISSOR_BR */
 190                         fb->height));
 191
 192         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 193         OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
 194         if (buffers & PIPE_CLEAR_COLOR) {
 195                 OUT_RING(ring, A2XX_RB_COLOR_MASK_WRITE_RED |
 196                                 A2XX_RB_COLOR_MASK_WRITE_GREEN |
 197                                 A2XX_RB_COLOR_MASK_WRITE_BLUE |
 198                                 A2XX_RB_COLOR_MASK_WRITE_ALPHA);
 199         } else {
 200                 OUT_RING(ring, 0x0);
 201         }
 202
 203         OUT_PKT3(ring, CP_DRAW_INDX, 3);
 204         OUT_RING(ring, 0x00000000);
 205         OUT_RING(ring, DRAW(DI_PT_RECTLIST, DI_SRC_SEL_AUTO_INDEX,
 206                         INDEX_SIZE_IGN, IGNORE_VISIBILITY));
 207         OUT_RING(ring, 3);                                      /* NumIndices */
 208
 209         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 210         OUT_RING(ring, CP_REG(REG_A2XX_A220_RB_LRZ_VSC_CONTROL));
 211         OUT_RING(ring, 0x00000000);
 212
 213         OUT_PKT3(ring, CP_SET_CONSTANT, 2);
 214         OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL));
 215         OUT_RING(ring, 0x00000000);
 216
 217         ctx->dirty |= FD_DIRTY_ZSA |
 218                         FD_DIRTY_RASTERIZER |
 219                         FD_DIRTY_SAMPLE_MASK |
 220                         FD_DIRTY_PROG |
 221                         FD_DIRTY_CONSTBUF |
 222                         FD_DIRTY_BLEND;
 223
 224         if (fd_mesa_debug & FD_DBG_DCLEAR)
 225                 ctx->dirty = 0xffffffff;
 226 }
 227
 228 static void
 229 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
 230                 const union pipe_color_union *color,
 231                 unsigned x, unsigned y, unsigned w, unsigned h)
 232 {
 233         DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
 234 }
 235
 236 static void
 237 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
 238                 unsigned buffers, double depth, unsigned stencil,
 239                 unsigned x, unsigned y, unsigned w, unsigned h)
 240 {
 241         DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
 242                         buffers, depth, stencil, x, y, w, h);
 243 }
 244
 245 void
 246 fd_clear_init(struct pipe_context *pctx)
 247 {
 248         pctx->clear = fd_clear;
 249         pctx->clear_render_target = fd_clear_render_target;
 250         pctx->clear_depth_stencil = fd_clear_depth_stencil;
 251 }