freedreno: ctx should hold ref to dev
[mesa.git] / src / gallium / drivers / freedreno / freedreno_context.h
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef FREEDRENO_CONTEXT_H_
30 #define FREEDRENO_CONTEXT_H_
31
32 #include "draw/draw_context.h"
33 #include "pipe/p_context.h"
34 #include "indices/u_primconvert.h"
35 #include "util/u_blitter.h"
36 #include "util/u_slab.h"
37 #include "util/u_string.h"
38
39 #include "freedreno_screen.h"
40 #include "freedreno_gmem.h"
41 #include "freedreno_util.h"
42
43 struct fd_vertex_stateobj;
44
45 struct fd_texture_stateobj {
46 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
47 unsigned num_textures;
48 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
49 unsigned num_samplers;
50 unsigned dirty_samplers;
51 };
52
53 struct fd_program_stateobj {
54 void *vp, *fp;
55 enum {
56 FD_SHADER_DIRTY_VP = (1 << 0),
57 FD_SHADER_DIRTY_FP = (1 << 1),
58 } dirty;
59 uint8_t num_exports;
60 /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
61 * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
62 * size) are not included in this
63 */
64 uint8_t export_linkage[63];
65 };
66
67 struct fd_constbuf_stateobj {
68 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
69 uint32_t enabled_mask;
70 uint32_t dirty_mask;
71 };
72
73 struct fd_vertexbuf_stateobj {
74 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
75 unsigned count;
76 uint32_t enabled_mask;
77 uint32_t dirty_mask;
78 };
79
80 struct fd_vertex_stateobj {
81 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
82 unsigned num_elements;
83 };
84
85 struct fd_context {
86 struct pipe_context base;
87
88 struct fd_device *dev;
89 struct fd_screen *screen;
90 struct blitter_context *blitter;
91 struct primconvert_context *primconvert;
92
93 struct util_slab_mempool transfer_pool;
94
95 /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
96 * DI_PT_x value to use for draw initiator. There are some
97 * slight differences between generation:
98 */
99 const uint8_t *primtypes;
100 uint32_t primtype_mask;
101
102 /* shaders used by clear, and gmem->mem blits: */
103 struct fd_program_stateobj solid_prog; // TODO move to screen?
104
105 /* shaders used by mem->gmem blits: */
106 struct fd_program_stateobj blit_prog; // TODO move to screen?
107
108 /* do we need to mem2gmem before rendering. We don't, if for example,
109 * there was a glClear() that invalidated the entire previous buffer
110 * contents. Keep track of which buffer(s) are cleared, or needs
111 * restore. Masks of PIPE_CLEAR_*
112 */
113 enum {
114 /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */
115 FD_BUFFER_COLOR = PIPE_CLEAR_COLOR0,
116 FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH,
117 FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL,
118 FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL,
119 } cleared, restore, resolve;
120
121 bool needs_flush;
122
123 /* To decide whether to render to system memory, keep track of the
124 * number of draws, and whether any of them require multisample,
125 * depth_test (or depth write), stencil_test, blending, and
126 * color_logic_Op (since those functions are disabled when by-
127 * passing GMEM.
128 */
129 enum {
130 FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01,
131 FD_GMEM_DEPTH_ENABLED = 0x02,
132 FD_GMEM_STENCIL_ENABLED = 0x04,
133
134 FD_GMEM_MSAA_ENABLED = 0x08,
135 FD_GMEM_BLEND_ENABLED = 0x10,
136 FD_GMEM_LOGICOP_ENABLED = 0x20,
137 } gmem_reason;
138 unsigned num_draws; /* number of draws in current batch */
139
140 /* Stats/counters:
141 */
142 struct {
143 uint64_t prims_emitted;
144 uint64_t draw_calls;
145 uint64_t batch_total, batch_sysmem, batch_gmem, batch_restore;
146 } stats;
147
148 /* we can't really sanely deal with wraparound point in ringbuffer
149 * and because of the way tiling works we can't really flush at
150 * arbitrary points (without a big performance hit). When we get
151 * too close to the end of the current ringbuffer, cycle to the next
152 * one (and wait for pending rendering from next rb to complete).
153 * We want the # of ringbuffers to be high enough that we don't
154 * normally have to wait before resetting to the start of the next
155 * rb.
156 */
157 struct fd_ringbuffer *rings[4];
158 unsigned rings_idx;
159
160 /* normal draw/clear cmds: */
161 struct fd_ringbuffer *ring;
162 struct fd_ringmarker *draw_start, *draw_end;
163
164 /* binning pass draw/clear cmds: */
165 struct fd_ringbuffer *binning_ring;
166 struct fd_ringmarker *binning_start, *binning_end;
167
168 /* Keep track if WAIT_FOR_IDLE is needed for registers we need
169 * to update via RMW:
170 */
171 bool rmw_needs_wfi;
172
173 /* Keep track of DRAW initiators that need to be patched up depending
174 * on whether we using binning or not:
175 */
176 struct util_dynarray draw_patches;
177
178 struct pipe_scissor_state scissor;
179
180 /* we don't have a disable/enable bit for scissor, so instead we keep
181 * a disabled-scissor state which matches the entire bound framebuffer
182 * and use that when scissor is not enabled.
183 */
184 struct pipe_scissor_state disabled_scissor;
185
186 /* Track the maximal bounds of the scissor of all the draws within a
187 * batch. Used at the tile rendering step (fd_gmem_render_tiles(),
188 * mem2gmem/gmem2mem) to avoid needlessly moving data in/out of gmem.
189 */
190 struct pipe_scissor_state max_scissor;
191
192 /* Current gmem/tiling configuration.. gets updated on render_tiles()
193 * if out of date with current maximal-scissor/cpp:
194 */
195 struct fd_gmem_stateobj gmem;
196 struct fd_vsc_pipe pipe[8];
197 struct fd_tile tile[64];
198
199 /* which state objects need to be re-emit'd: */
200 enum {
201 FD_DIRTY_BLEND = (1 << 0),
202 FD_DIRTY_RASTERIZER = (1 << 1),
203 FD_DIRTY_ZSA = (1 << 2),
204 FD_DIRTY_FRAGTEX = (1 << 3),
205 FD_DIRTY_VERTTEX = (1 << 4),
206 FD_DIRTY_TEXSTATE = (1 << 5),
207 FD_DIRTY_PROG = (1 << 6),
208 FD_DIRTY_BLEND_COLOR = (1 << 7),
209 FD_DIRTY_STENCIL_REF = (1 << 8),
210 FD_DIRTY_SAMPLE_MASK = (1 << 9),
211 FD_DIRTY_FRAMEBUFFER = (1 << 10),
212 FD_DIRTY_STIPPLE = (1 << 11),
213 FD_DIRTY_VIEWPORT = (1 << 12),
214 FD_DIRTY_CONSTBUF = (1 << 13),
215 FD_DIRTY_VTXSTATE = (1 << 14),
216 FD_DIRTY_VTXBUF = (1 << 15),
217 FD_DIRTY_INDEXBUF = (1 << 16),
218 FD_DIRTY_SCISSOR = (1 << 17),
219 } dirty;
220
221 struct pipe_blend_state *blend;
222 struct pipe_rasterizer_state *rasterizer;
223 struct pipe_depth_stencil_alpha_state *zsa;
224
225 struct fd_texture_stateobj verttex, fragtex;
226
227 struct fd_program_stateobj prog;
228
229 struct fd_vertex_stateobj *vtx;
230
231 struct pipe_blend_color blend_color;
232 struct pipe_stencil_ref stencil_ref;
233 unsigned sample_mask;
234 struct pipe_framebuffer_state framebuffer;
235 struct pipe_poly_stipple stipple;
236 struct pipe_viewport_state viewport;
237 struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
238 struct fd_vertexbuf_stateobj vertexbuf;
239 struct pipe_index_buffer indexbuf;
240
241 /* GMEM/tile handling fxns: */
242 void (*emit_tile_init)(struct fd_context *ctx);
243 void (*emit_tile_prep)(struct fd_context *ctx, struct fd_tile *tile);
244 void (*emit_tile_mem2gmem)(struct fd_context *ctx, struct fd_tile *tile);
245 void (*emit_tile_renderprep)(struct fd_context *ctx, struct fd_tile *tile);
246 void (*emit_tile_gmem2mem)(struct fd_context *ctx, struct fd_tile *tile);
247
248 /* optional, for GMEM bypass: */
249 void (*emit_sysmem_prep)(struct fd_context *ctx);
250
251 /* draw: */
252 void (*draw)(struct fd_context *pctx, const struct pipe_draw_info *info);
253 void (*clear)(struct fd_context *ctx, unsigned buffers,
254 const union pipe_color_union *color, double depth, unsigned stencil);
255 };
256
257 static INLINE struct fd_context *
258 fd_context(struct pipe_context *pctx)
259 {
260 return (struct fd_context *)pctx;
261 }
262
263 static INLINE struct pipe_scissor_state *
264 fd_context_get_scissor(struct fd_context *ctx)
265 {
266 if (ctx->rasterizer && ctx->rasterizer->scissor)
267 return &ctx->scissor;
268 return &ctx->disabled_scissor;
269 }
270
271 static INLINE bool
272 fd_supported_prim(struct fd_context *ctx, unsigned prim)
273 {
274 return (1 << prim) & ctx->primtype_mask;
275 }
276
277 static INLINE void
278 fd_reset_rmw_state(struct fd_context *ctx)
279 {
280 ctx->rmw_needs_wfi = true;
281 }
282
283 /* emit before a RMW a WAIT_FOR_IDLE only if needed: */
284 static inline void
285 fd_rmw_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
286 {
287 if (ctx->rmw_needs_wfi) {
288 OUT_WFI(ring);
289 ctx->rmw_needs_wfi = false;
290 }
291 }
292
293 struct pipe_context * fd_context_init(struct fd_context *ctx,
294 struct pipe_screen *pscreen, const uint8_t *primtypes,
295 void *priv);
296
297 void fd_context_render(struct pipe_context *pctx);
298
299 void fd_context_destroy(struct pipe_context *pctx);
300
301 #endif /* FREEDRENO_CONTEXT_H_ */