src/gallium/drivers/freedreno/freedreno_context.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_CONTEXT_H_
  30 #define FREEDRENO_CONTEXT_H_
  31
  32 #include "draw/draw_context.h"
  33 #include "pipe/p_context.h"
  34 #include "indices/u_primconvert.h"
  35 #include "util/u_blitter.h"
  36 #include "util/u_double_list.h"
  37 #include "util/u_slab.h"
  38 #include "util/u_string.h"
  39
  40 #include "freedreno_screen.h"
  41 #include "freedreno_gmem.h"
  42 #include "freedreno_util.h"
  43
  44 struct fd_vertex_stateobj;
  45
  46 struct fd_texture_stateobj {
  47         struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
  48         unsigned num_textures;
  49         struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  50         unsigned num_samplers;
  51         unsigned dirty_samplers;
  52 };
  53
  54 struct fd_program_stateobj {
  55         void *vp, *fp;
  56         enum {
  57                 FD_SHADER_DIRTY_VP = (1 << 0),
  58                 FD_SHADER_DIRTY_FP = (1 << 1),
  59         } dirty;
  60         uint8_t num_exports;
  61         /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
  62          * for TGSI_SEMANTIC_GENERIC.  Special vs exports (position and point-
  63          * size) are not included in this
  64          */
  65         uint8_t export_linkage[63];
  66 };
  67
  68 struct fd_constbuf_stateobj {
  69         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
  70         uint32_t enabled_mask;
  71         uint32_t dirty_mask;
  72 };
  73
  74 struct fd_vertexbuf_stateobj {
  75         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
  76         unsigned count;
  77         uint32_t enabled_mask;
  78         uint32_t dirty_mask;
  79 };
  80
  81 struct fd_vertex_stateobj {
  82         struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
  83         unsigned num_elements;
  84 };
  85
  86 /* Bitmask of stages in rendering that a particular query query is
  87  * active.  Queries will be automatically started/stopped (generating
  88  * additional fd_hw_sample_period's) on entrance/exit from stages that
  89  * are applicable to the query.
  90  *
  91  * NOTE: set the stage to NULL at end of IB to ensure no query is still
  92  * active.  Things aren't going to work out the way you want if a query
  93  * is active across IB's (or between tile IB and draw IB)
  94  */
  95 enum fd_render_stage {
  96         FD_STAGE_NULL     = 0x00,
  97         FD_STAGE_DRAW     = 0x01,
  98         FD_STAGE_CLEAR    = 0x02,
  99         /* TODO before queries which include MEM2GMEM or GMEM2MEM will
 100          * work we will need to call fd_hw_query_prepare() from somewhere
 101          * appropriate so that queries in the tiling IB get backed with
 102          * memory to write results to.
 103          */
 104         FD_STAGE_MEM2GMEM = 0x04,
 105         FD_STAGE_GMEM2MEM = 0x08,
 106         /* used for driver internal draws (ie. util_blitter_blit()): */
 107         FD_STAGE_BLIT     = 0x10,
 108 };
 109
 110 #define MAX_HW_SAMPLE_PROVIDERS 4
 111 struct fd_hw_sample_provider;
 112 struct fd_hw_sample;
 113
 114 struct fd_context {
 115         struct pipe_context base;
 116
 117         struct fd_device *dev;
 118         struct fd_screen *screen;
 119
 120         struct blitter_context *blitter;
 121         struct primconvert_context *primconvert;
 122
 123         /* slab for pipe_transfer allocations: */
 124         struct util_slab_mempool transfer_pool;
 125
 126         /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
 127         struct util_slab_mempool sample_pool;
 128         struct util_slab_mempool sample_period_pool;
 129
 130         /* next sample offset.. incremented for each sample in the batch/
 131          * submit, reset to zero on next submit.
 132          */
 133         uint32_t next_sample_offset;
 134
 135         /* sample-providers for hw queries: */
 136         const struct fd_hw_sample_provider *sample_providers[MAX_HW_SAMPLE_PROVIDERS];
 137
 138         /* cached samples (in case multiple queries need to reference
 139          * the same sample snapshot)
 140          */
 141         struct fd_hw_sample *sample_cache[MAX_HW_SAMPLE_PROVIDERS];
 142
 143         /* tracking for current stage, to know when to start/stop
 144          * any active queries:
 145          */
 146         enum fd_render_stage stage;
 147
 148         /* list of active queries: */
 149         struct list_head active_queries;
 150
 151         /* list of queries that are not active, but were active in the
 152          * current submit:
 153          */
 154         struct list_head current_queries;
 155
 156         /* current query result bo and tile stride: */
 157         struct fd_bo *query_bo;
 158         uint32_t query_tile_stride;
 159
 160         /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
 161          * DI_PT_x value to use for draw initiator.  There are some
 162          * slight differences between generation:
 163          */
 164         const uint8_t *primtypes;
 165         uint32_t primtype_mask;
 166
 167         /* shaders used by clear, and gmem->mem blits: */
 168         struct fd_program_stateobj solid_prog; // TODO move to screen?
 169
 170         /* shaders used by mem->gmem blits: */
 171         struct fd_program_stateobj blit_prog; // TODO move to screen?
 172
 173         /* do we need to mem2gmem before rendering.  We don't, if for example,
 174          * there was a glClear() that invalidated the entire previous buffer
 175          * contents.  Keep track of which buffer(s) are cleared, or needs
 176          * restore.  Masks of PIPE_CLEAR_*
 177          */
 178         enum {
 179                 /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */
 180                 FD_BUFFER_COLOR   = PIPE_CLEAR_COLOR0,
 181                 FD_BUFFER_DEPTH   = PIPE_CLEAR_DEPTH,
 182                 FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL,
 183                 FD_BUFFER_ALL     = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL,
 184         } cleared, restore, resolve;
 185
 186         bool needs_flush;
 187
 188         /* To decide whether to render to system memory, keep track of the
 189          * number of draws, and whether any of them require multisample,
 190          * depth_test (or depth write), stencil_test, blending, and
 191          * color_logic_Op (since those functions are disabled when by-
 192          * passing GMEM.
 193          */
 194         enum {
 195                 FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01,
 196                 FD_GMEM_DEPTH_ENABLED        = 0x02,
 197                 FD_GMEM_STENCIL_ENABLED      = 0x04,
 198
 199                 FD_GMEM_MSAA_ENABLED         = 0x08,
 200                 FD_GMEM_BLEND_ENABLED        = 0x10,
 201                 FD_GMEM_LOGICOP_ENABLED      = 0x20,
 202         } gmem_reason;
 203         unsigned num_draws;   /* number of draws in current batch */
 204
 205         /* Stats/counters:
 206          */
 207         struct {
 208                 uint64_t prims_emitted;
 209                 uint64_t draw_calls;
 210                 uint64_t batch_total, batch_sysmem, batch_gmem, batch_restore;
 211         } stats;
 212
 213         /* we can't really sanely deal with wraparound point in ringbuffer
 214          * and because of the way tiling works we can't really flush at
 215          * arbitrary points (without a big performance hit).  When we get
 216          * too close to the end of the current ringbuffer, cycle to the next
 217          * one (and wait for pending rendering from next rb to complete).
 218          * We want the # of ringbuffers to be high enough that we don't
 219          * normally have to wait before resetting to the start of the next
 220          * rb.
 221          */
 222         struct fd_ringbuffer *rings[8];
 223         unsigned rings_idx;
 224
 225         /* normal draw/clear cmds: */
 226         struct fd_ringbuffer *ring;
 227         struct fd_ringmarker *draw_start, *draw_end;
 228
 229         /* binning pass draw/clear cmds: */
 230         struct fd_ringbuffer *binning_ring;
 231         struct fd_ringmarker *binning_start, *binning_end;
 232
 233         /* Keep track if WAIT_FOR_IDLE is needed for registers we need
 234          * to update via RMW:
 235          */
 236         bool needs_wfi;
 237
 238         /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION?  At least on a3xx
 239          * it is not a banked context register, so it needs a WFI to update.
 240          * Keep track if it has actually changed, to avoid unneeded WFI.
 241          * */
 242         bool needs_rb_fbd;
 243
 244         /* Keep track of DRAW initiators that need to be patched up depending
 245          * on whether we using binning or not:
 246          */
 247         struct util_dynarray draw_patches;
 248
 249         struct pipe_scissor_state scissor;
 250
 251         /* we don't have a disable/enable bit for scissor, so instead we keep
 252          * a disabled-scissor state which matches the entire bound framebuffer
 253          * and use that when scissor is not enabled.
 254          */
 255         struct pipe_scissor_state disabled_scissor;
 256
 257         /* Track the maximal bounds of the scissor of all the draws within a
 258          * batch.  Used at the tile rendering step (fd_gmem_render_tiles(),
 259          * mem2gmem/gmem2mem) to avoid needlessly moving data in/out of gmem.
 260          */
 261         struct pipe_scissor_state max_scissor;
 262
 263         /* Current gmem/tiling configuration.. gets updated on render_tiles()
 264          * if out of date with current maximal-scissor/cpp:
 265          */
 266         struct fd_gmem_stateobj gmem;
 267         struct fd_vsc_pipe      pipe[8];
 268         struct fd_tile          tile[64];
 269
 270         /* which state objects need to be re-emit'd: */
 271         enum {
 272                 FD_DIRTY_BLEND       = (1 <<  0),
 273                 FD_DIRTY_RASTERIZER  = (1 <<  1),
 274                 FD_DIRTY_ZSA         = (1 <<  2),
 275                 FD_DIRTY_FRAGTEX     = (1 <<  3),
 276                 FD_DIRTY_VERTTEX     = (1 <<  4),
 277                 FD_DIRTY_TEXSTATE    = (1 <<  5),
 278                 FD_DIRTY_PROG        = (1 <<  6),
 279                 FD_DIRTY_BLEND_COLOR = (1 <<  7),
 280                 FD_DIRTY_STENCIL_REF = (1 <<  8),
 281                 FD_DIRTY_SAMPLE_MASK = (1 <<  9),
 282                 FD_DIRTY_FRAMEBUFFER = (1 << 10),
 283                 FD_DIRTY_STIPPLE     = (1 << 11),
 284                 FD_DIRTY_VIEWPORT    = (1 << 12),
 285                 FD_DIRTY_CONSTBUF    = (1 << 13),
 286                 FD_DIRTY_VTXSTATE    = (1 << 14),
 287                 FD_DIRTY_VTXBUF      = (1 << 15),
 288                 FD_DIRTY_INDEXBUF    = (1 << 16),
 289                 FD_DIRTY_SCISSOR     = (1 << 17),
 290         } dirty;
 291
 292         struct pipe_blend_state *blend;
 293         struct pipe_rasterizer_state *rasterizer;
 294         struct pipe_depth_stencil_alpha_state *zsa;
 295
 296         struct fd_texture_stateobj verttex, fragtex;
 297
 298         struct fd_program_stateobj prog;
 299
 300         struct fd_vertex_stateobj *vtx;
 301
 302         struct pipe_blend_color blend_color;
 303         struct pipe_stencil_ref stencil_ref;
 304         unsigned sample_mask;
 305         struct pipe_framebuffer_state framebuffer;
 306         struct pipe_poly_stipple stipple;
 307         struct pipe_viewport_state viewport;
 308         struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 309         struct fd_vertexbuf_stateobj vertexbuf;
 310         struct pipe_index_buffer indexbuf;
 311
 312         /* GMEM/tile handling fxns: */
 313         void (*emit_tile_init)(struct fd_context *ctx);
 314         void (*emit_tile_prep)(struct fd_context *ctx, struct fd_tile *tile);
 315         void (*emit_tile_mem2gmem)(struct fd_context *ctx, struct fd_tile *tile);
 316         void (*emit_tile_renderprep)(struct fd_context *ctx, struct fd_tile *tile);
 317         void (*emit_tile_gmem2mem)(struct fd_context *ctx, struct fd_tile *tile);
 318
 319         /* optional, for GMEM bypass: */
 320         void (*emit_sysmem_prep)(struct fd_context *ctx);
 321
 322         /* draw: */
 323         void (*draw)(struct fd_context *pctx, const struct pipe_draw_info *info);
 324         void (*clear)(struct fd_context *ctx, unsigned buffers,
 325                         const union pipe_color_union *color, double depth, unsigned stencil);
 326 };
 327
 328 static INLINE struct fd_context *
 329 fd_context(struct pipe_context *pctx)
 330 {
 331         return (struct fd_context *)pctx;
 332 }
 333
 334 static INLINE struct pipe_scissor_state *
 335 fd_context_get_scissor(struct fd_context *ctx)
 336 {
 337         if (ctx->rasterizer && ctx->rasterizer->scissor)
 338                 return &ctx->scissor;
 339         return &ctx->disabled_scissor;
 340 }
 341
 342 static INLINE bool
 343 fd_supported_prim(struct fd_context *ctx, unsigned prim)
 344 {
 345         return (1 << prim) & ctx->primtype_mask;
 346 }
 347
 348 static INLINE void
 349 fd_reset_wfi(struct fd_context *ctx)
 350 {
 351         ctx->needs_wfi = true;
 352 }
 353
 354 /* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already
 355  * been one since last draw:
 356  */
 357 static inline void
 358 fd_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
 359 {
 360         if (ctx->needs_wfi) {
 361                 OUT_WFI(ring);
 362                 ctx->needs_wfi = false;
 363         }
 364 }
 365
 366 struct pipe_context * fd_context_init(struct fd_context *ctx,
 367                 struct pipe_screen *pscreen, const uint8_t *primtypes,
 368                 void *priv);
 369
 370 void fd_context_render(struct pipe_context *pctx);
 371
 372 void fd_context_destroy(struct pipe_context *pctx);
 373
 374 #endif /* FREEDRENO_CONTEXT_H_ */