src/gallium/drivers/freedreno/freedreno_context.h

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #ifndef FREEDRENO_CONTEXT_H_
  28 #define FREEDRENO_CONTEXT_H_
  29
  30 #include "pipe/p_context.h"
  31 #include "indices/u_primconvert.h"
  32 #include "util/u_blitter.h"
  33 #include "util/list.h"
  34 #include "util/slab.h"
  35 #include "util/u_string.h"
  36
  37 #include "freedreno_batch.h"
  38 #include "freedreno_screen.h"
  39 #include "freedreno_gmem.h"
  40 #include "freedreno_util.h"
  41
  42 #define BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE)
  43
  44 struct fd_vertex_stateobj;
  45
  46 struct fd_texture_stateobj {
  47         struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
  48         unsigned num_textures;
  49         unsigned valid_textures;
  50         struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  51         unsigned num_samplers;
  52         unsigned valid_samplers;
  53         /* number of samples per sampler, 2 bits per sampler: */
  54         uint32_t samples;
  55 };
  56
  57 struct fd_program_stateobj {
  58         void *vp, *fp;
  59 };
  60
  61 struct fd_constbuf_stateobj {
  62         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
  63         uint32_t enabled_mask;
  64 };
  65
  66 struct fd_shaderbuf_stateobj {
  67         struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
  68         uint32_t enabled_mask;
  69 };
  70
  71 struct fd_shaderimg_stateobj {
  72         struct pipe_image_view si[PIPE_MAX_SHADER_IMAGES];
  73         uint32_t enabled_mask;
  74 };
  75
  76 struct fd_vertexbuf_stateobj {
  77         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
  78         unsigned count;
  79         uint32_t enabled_mask;
  80 };
  81
  82 struct fd_vertex_stateobj {
  83         struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
  84         unsigned num_elements;
  85 };
  86
  87 struct fd_streamout_stateobj {
  88         struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
  89         unsigned num_targets;
  90         /* Track offset from vtxcnt for streamout data.  This counter
  91          * is just incremented by # of vertices on each draw until
  92          * reset or new streamout buffer bound.
  93          *
  94          * When we eventually have GS, the CPU won't actually know the
  95          * number of vertices per draw, so I think we'll have to do
  96          * something more clever.
  97          */
  98         unsigned offsets[PIPE_MAX_SO_BUFFERS];
  99 };
 100
 101 #define MAX_GLOBAL_BUFFERS 16
 102 struct fd_global_bindings_stateobj {
 103         struct pipe_resource *buf[MAX_GLOBAL_BUFFERS];
 104         uint32_t enabled_mask;
 105 };
 106
 107 /* group together the vertex and vertexbuf state.. for ease of passing
 108  * around, and because various internal operations (gmem<->mem, etc)
 109  * need their own vertex state:
 110  */
 111 struct fd_vertex_state {
 112         struct fd_vertex_stateobj *vtx;
 113         struct fd_vertexbuf_stateobj vertexbuf;
 114 };
 115
 116 /* global 3d pipeline dirty state: */
 117 enum fd_dirty_3d_state {
 118         FD_DIRTY_BLEND       = BIT(0),
 119         FD_DIRTY_RASTERIZER  = BIT(1),
 120         FD_DIRTY_ZSA         = BIT(2),
 121         FD_DIRTY_BLEND_COLOR = BIT(3),
 122         FD_DIRTY_STENCIL_REF = BIT(4),
 123         FD_DIRTY_SAMPLE_MASK = BIT(5),
 124         FD_DIRTY_FRAMEBUFFER = BIT(6),
 125         FD_DIRTY_STIPPLE     = BIT(7),
 126         FD_DIRTY_VIEWPORT    = BIT(8),
 127         FD_DIRTY_VTXSTATE    = BIT(9),
 128         FD_DIRTY_VTXBUF      = BIT(10),
 129
 130         FD_DIRTY_SCISSOR     = BIT(12),
 131         FD_DIRTY_STREAMOUT   = BIT(13),
 132         FD_DIRTY_UCP         = BIT(14),
 133         FD_DIRTY_BLEND_DUAL  = BIT(15),
 134
 135         /* These are a bit redundent with fd_dirty_shader_state, and possibly
 136          * should be removed.  (But OTOH kinda convenient in some places)
 137          */
 138         FD_DIRTY_PROG        = BIT(16),
 139         FD_DIRTY_CONST       = BIT(17),
 140         FD_DIRTY_TEX         = BIT(18),
 141
 142         /* only used by a2xx.. possibly can be removed.. */
 143         FD_DIRTY_TEXSTATE    = BIT(19),
 144 };
 145
 146 /* per shader-stage dirty state: */
 147 enum fd_dirty_shader_state {
 148         FD_DIRTY_SHADER_PROG  = BIT(0),
 149         FD_DIRTY_SHADER_CONST = BIT(1),
 150         FD_DIRTY_SHADER_TEX   = BIT(2),
 151         FD_DIRTY_SHADER_SSBO  = BIT(3),
 152         FD_DIRTY_SHADER_IMAGE = BIT(4),
 153 };
 154
 155 struct fd_context {
 156         struct pipe_context base;
 157
 158         struct fd_device *dev;
 159         struct fd_screen *screen;
 160         struct fd_pipe *pipe;
 161
 162         struct util_queue flush_queue;
 163
 164         struct blitter_context *blitter;
 165         void *clear_rs_state;
 166         struct primconvert_context *primconvert;
 167
 168         /* slab for pipe_transfer allocations: */
 169         struct slab_child_pool transfer_pool;
 170
 171         /**
 172          * query related state:
 173          */
 174         /*@{*/
 175         /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
 176         struct slab_mempool sample_pool;
 177         struct slab_mempool sample_period_pool;
 178
 179         /* sample-providers for hw queries: */
 180         const struct fd_hw_sample_provider *hw_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
 181
 182         /* list of active queries: */
 183         struct list_head hw_active_queries;
 184
 185         /* sample-providers for accumulating hw queries: */
 186         const struct fd_acc_sample_provider *acc_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
 187
 188         /* list of active accumulating queries: */
 189         struct list_head acc_active_queries;
 190         /*@}*/
 191
 192         /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
 193          * DI_PT_x value to use for draw initiator.  There are some
 194          * slight differences between generation:
 195          */
 196         const uint8_t *primtypes;
 197         uint32_t primtype_mask;
 198
 199         /* shaders used by clear, and gmem->mem blits: */
 200         struct fd_program_stateobj solid_prog; // TODO move to screen?
 201
 202         /* shaders used by mem->gmem blits: */
 203         struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
 204         struct fd_program_stateobj blit_z, blit_zs;
 205
 206         /* Stats/counters:
 207          */
 208         struct {
 209                 uint64_t prims_emitted;
 210                 uint64_t prims_generated;
 211                 uint64_t draw_calls;
 212                 uint64_t batch_total, batch_sysmem, batch_gmem, batch_nondraw, batch_restore;
 213                 uint64_t staging_uploads, shadow_uploads;
 214                 uint64_t vs_regs, fs_regs;
 215         } stats;
 216
 217         /* Current batch.. the rule here is that you can deref ctx->batch
 218          * in codepaths from pipe_context entrypoints.  But not in code-
 219          * paths from fd_batch_flush() (basically, the stuff that gets
 220          * called from GMEM code), since in those code-paths the batch
 221          * you care about is not necessarily the same as ctx->batch.
 222          */
 223         struct fd_batch *batch;
 224
 225         /* NULL if there has been rendering since last flush.  Otherwise
 226          * keeps a reference to the last fence so we can re-use it rather
 227          * than having to flush no-op batch.
 228          */
 229         struct pipe_fence_handle *last_fence;
 230
 231         /* Are we in process of shadowing a resource? Used to detect recursion
 232          * in transfer_map, and skip unneeded synchronization.
 233          */
 234         bool in_shadow : 1;
 235
 236         /* Ie. in blit situation where we no longer care about previous framebuffer
 237          * contents.  Main point is to eliminate blits from fd_try_shadow_resource().
 238          * For example, in case of texture upload + gen-mipmaps.
 239          */
 240         bool in_blit : 1;
 241
 242         struct pipe_scissor_state scissor;
 243
 244         /* we don't have a disable/enable bit for scissor, so instead we keep
 245          * a disabled-scissor state which matches the entire bound framebuffer
 246          * and use that when scissor is not enabled.
 247          */
 248         struct pipe_scissor_state disabled_scissor;
 249
 250         /* Current gmem/tiling configuration.. gets updated on render_tiles()
 251          * if out of date with current maximal-scissor/cpp:
 252          *
 253          * (NOTE: this is kind of related to the batch, but moving it there
 254          * means we'd always have to recalc tiles ever batch)
 255          */
 256         struct fd_gmem_stateobj gmem;
 257         struct fd_vsc_pipe      vsc_pipe[32];
 258         struct fd_tile          tile[512];
 259
 260         /* which state objects need to be re-emit'd: */
 261         enum fd_dirty_3d_state dirty;
 262
 263         /* per shader-stage dirty status: */
 264         enum fd_dirty_shader_state dirty_shader[PIPE_SHADER_TYPES];
 265
 266         void *compute;
 267         struct pipe_blend_state *blend;
 268         struct pipe_rasterizer_state *rasterizer;
 269         struct pipe_depth_stencil_alpha_state *zsa;
 270
 271         struct fd_texture_stateobj tex[PIPE_SHADER_TYPES];
 272
 273         struct fd_program_stateobj prog;
 274
 275         struct fd_vertex_state vtx;
 276
 277         struct pipe_blend_color blend_color;
 278         struct pipe_stencil_ref stencil_ref;
 279         unsigned sample_mask;
 280         /* local context fb state, for when ctx->batch is null: */
 281         struct pipe_framebuffer_state framebuffer;
 282         struct pipe_poly_stipple stipple;
 283         struct pipe_viewport_state viewport;
 284         struct pipe_scissor_state viewport_scissor;
 285         struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 286         struct fd_shaderbuf_stateobj shaderbuf[PIPE_SHADER_TYPES];
 287         struct fd_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
 288         struct fd_streamout_stateobj streamout;
 289         struct fd_global_bindings_stateobj global_bindings;
 290         struct pipe_clip_state ucp;
 291
 292         struct pipe_query *cond_query;
 293         bool cond_cond; /* inverted rendering condition */
 294         uint cond_mode;
 295
 296         struct pipe_debug_callback debug;
 297
 298         /* GMEM/tile handling fxns: */
 299         void (*emit_tile_init)(struct fd_batch *batch);
 300         void (*emit_tile_prep)(struct fd_batch *batch, struct fd_tile *tile);
 301         void (*emit_tile_mem2gmem)(struct fd_batch *batch, struct fd_tile *tile);
 302         void (*emit_tile_renderprep)(struct fd_batch *batch, struct fd_tile *tile);
 303         void (*emit_tile_gmem2mem)(struct fd_batch *batch, struct fd_tile *tile);
 304         void (*emit_tile_fini)(struct fd_batch *batch);   /* optional */
 305
 306         /* optional, for GMEM bypass: */
 307         void (*emit_sysmem_prep)(struct fd_batch *batch);
 308         void (*emit_sysmem_fini)(struct fd_batch *batch);
 309
 310         /* draw: */
 311         bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info,
 312                         unsigned index_offset);
 313         bool (*clear)(struct fd_context *ctx, unsigned buffers,
 314                         const union pipe_color_union *color, double depth, unsigned stencil);
 315
 316         /* compute: */
 317         void (*launch_grid)(struct fd_context *ctx, const struct pipe_grid_info *info);
 318
 319         /* constant emit:  (note currently not used/needed for a2xx) */
 320         void (*emit_const)(struct fd_ringbuffer *ring, gl_shader_stage type,
 321                         uint32_t regid, uint32_t offset, uint32_t sizedwords,
 322                         const uint32_t *dwords, struct pipe_resource *prsc);
 323         /* emit bo addresses as constant: */
 324         void (*emit_const_bo)(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
 325                         uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
 326
 327         /* indirect-branch emit: */
 328         void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
 329
 330         /* query: */
 331         struct fd_query * (*create_query)(struct fd_context *ctx, unsigned query_type);
 332         void (*query_prepare)(struct fd_batch *batch, uint32_t num_tiles);
 333         void (*query_prepare_tile)(struct fd_batch *batch, uint32_t n,
 334                         struct fd_ringbuffer *ring);
 335         void (*query_set_stage)(struct fd_batch *batch, enum fd_render_stage stage);
 336
 337         /* blitter: */
 338         bool (*blit)(struct fd_context *ctx, const struct pipe_blit_info *info);
 339
 340         /* simple gpu "memcpy": */
 341         void (*mem_to_mem)(struct fd_ringbuffer *ring, struct pipe_resource *dst,
 342                         unsigned dst_off, struct pipe_resource *src, unsigned src_off,
 343                         unsigned sizedwords);
 344
 345         /*
 346          * Common pre-cooked VBO state (used for a3xx and later):
 347          */
 348
 349         /* for clear/gmem->mem vertices, and mem->gmem */
 350         struct pipe_resource *solid_vbuf;
 351
 352         /* for mem->gmem tex coords: */
 353         struct pipe_resource *blit_texcoord_vbuf;
 354
 355         /* vertex state for solid_vbuf:
 356          *    - solid_vbuf / 12 / R32G32B32_FLOAT
 357          */
 358         struct fd_vertex_state solid_vbuf_state;
 359
 360         /* vertex state for blit_prog:
 361          *    - blit_texcoord_vbuf / 8 / R32G32_FLOAT
 362          *    - solid_vbuf / 12 / R32G32B32_FLOAT
 363          */
 364         struct fd_vertex_state blit_vbuf_state;
 365 };
 366
 367 static inline struct fd_context *
 368 fd_context(struct pipe_context *pctx)
 369 {
 370         return (struct fd_context *)pctx;
 371 }
 372
 373 static inline void
 374 fd_context_assert_locked(struct fd_context *ctx)
 375 {
 376         pipe_mutex_assert_locked(ctx->screen->lock);
 377 }
 378
 379 static inline void
 380 fd_context_lock(struct fd_context *ctx)
 381 {
 382         mtx_lock(&ctx->screen->lock);
 383 }
 384
 385 static inline void
 386 fd_context_unlock(struct fd_context *ctx)
 387 {
 388         mtx_unlock(&ctx->screen->lock);
 389 }
 390
 391 /* mark all state dirty: */
 392 static inline void
 393 fd_context_all_dirty(struct fd_context *ctx)
 394 {
 395         ctx->dirty = ~0;
 396         for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++)
 397                 ctx->dirty_shader[i] = ~0;
 398 }
 399
 400 static inline void
 401 fd_context_all_clean(struct fd_context *ctx)
 402 {
 403         ctx->dirty = 0;
 404         for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
 405                 /* don't mark compute state as clean, since it is not emitted
 406                  * during normal draw call.  The places that call _all_dirty(),
 407                  * it is safe to mark compute state dirty as well, but the
 408                  * inverse is not true.
 409                  */
 410                 if (i == PIPE_SHADER_COMPUTE)
 411                         continue;
 412                 ctx->dirty_shader[i] = 0;
 413         }
 414 }
 415
 416 static inline struct pipe_scissor_state *
 417 fd_context_get_scissor(struct fd_context *ctx)
 418 {
 419         if (ctx->rasterizer && ctx->rasterizer->scissor)
 420                 return &ctx->scissor;
 421         return &ctx->disabled_scissor;
 422 }
 423
 424 static inline bool
 425 fd_supported_prim(struct fd_context *ctx, unsigned prim)
 426 {
 427         return (1 << prim) & ctx->primtype_mask;
 428 }
 429
 430 static inline struct fd_batch *
 431 fd_context_batch(struct fd_context *ctx)
 432 {
 433         if (unlikely(!ctx->batch)) {
 434                 struct fd_batch *batch =
 435                         fd_batch_from_fb(&ctx->screen->batch_cache, ctx, &ctx->framebuffer);
 436                 util_copy_framebuffer_state(&batch->framebuffer, &ctx->framebuffer);
 437                 ctx->batch = batch;
 438                 fd_context_all_dirty(ctx);
 439         }
 440         return ctx->batch;
 441 }
 442
 443 static inline void
 444 fd_batch_set_stage(struct fd_batch *batch, enum fd_render_stage stage)
 445 {
 446         struct fd_context *ctx = batch->ctx;
 447
 448         /* special case: internal blits (like mipmap level generation)
 449          * go through normal draw path (via util_blitter_blit()).. but
 450          * we need to ignore the FD_STAGE_DRAW which will be set, so we
 451          * don't enable queries which should be paused during internal
 452          * blits:
 453          */
 454         if ((batch->stage == FD_STAGE_BLIT) &&
 455                         (stage != FD_STAGE_NULL))
 456                 return;
 457
 458         if (ctx->query_set_stage)
 459                 ctx->query_set_stage(batch, stage);
 460
 461         batch->stage = stage;
 462 }
 463
 464 void fd_context_setup_common_vbos(struct fd_context *ctx);
 465 void fd_context_cleanup_common_vbos(struct fd_context *ctx);
 466
 467 struct pipe_context * fd_context_init(struct fd_context *ctx,
 468                 struct pipe_screen *pscreen, const uint8_t *primtypes,
 469                 void *priv, unsigned flags);
 470
 471 void fd_context_destroy(struct pipe_context *pctx);
 472
 473 #endif /* FREEDRENO_CONTEXT_H_ */