freedreno: re-order support for hw queries
[mesa.git] / src / gallium / drivers / freedreno / freedreno_context.h
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef FREEDRENO_CONTEXT_H_
30 #define FREEDRENO_CONTEXT_H_
31
32 #include "pipe/p_context.h"
33 #include "indices/u_primconvert.h"
34 #include "util/u_blitter.h"
35 #include "util/list.h"
36 #include "util/u_slab.h"
37 #include "util/u_string.h"
38
39 #include "freedreno_batch.h"
40 #include "freedreno_screen.h"
41 #include "freedreno_gmem.h"
42 #include "freedreno_util.h"
43
44 #define BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE)
45
46 struct fd_vertex_stateobj;
47
48 struct fd_texture_stateobj {
49 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
50 unsigned num_textures;
51 unsigned valid_textures;
52 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
53 unsigned num_samplers;
54 unsigned valid_samplers;
55 };
56
57 struct fd_program_stateobj {
58 void *vp, *fp;
59
60 /* rest only used by fd2.. split out: */
61 uint8_t num_exports;
62 /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
63 * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
64 * size) are not included in this
65 */
66 uint8_t export_linkage[63];
67 };
68
69 struct fd_constbuf_stateobj {
70 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
71 uint32_t enabled_mask;
72 uint32_t dirty_mask;
73 };
74
75 struct fd_vertexbuf_stateobj {
76 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
77 unsigned count;
78 uint32_t enabled_mask;
79 uint32_t dirty_mask;
80 };
81
82 struct fd_vertex_stateobj {
83 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
84 unsigned num_elements;
85 };
86
87 struct fd_streamout_stateobj {
88 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
89 unsigned num_targets;
90 /* Track offset from vtxcnt for streamout data. This counter
91 * is just incremented by # of vertices on each draw until
92 * reset or new streamout buffer bound.
93 *
94 * When we eventually have GS, the CPU won't actually know the
95 * number of vertices per draw, so I think we'll have to do
96 * something more clever.
97 */
98 unsigned offsets[PIPE_MAX_SO_BUFFERS];
99 };
100
101 /* group together the vertex and vertexbuf state.. for ease of passing
102 * around, and because various internal operations (gmem<->mem, etc)
103 * need their own vertex state:
104 */
105 struct fd_vertex_state {
106 struct fd_vertex_stateobj *vtx;
107 struct fd_vertexbuf_stateobj vertexbuf;
108 };
109
110
111 struct fd_context {
112 struct pipe_context base;
113
114 struct fd_device *dev;
115 struct fd_screen *screen;
116
117 struct blitter_context *blitter;
118 struct primconvert_context *primconvert;
119
120 /* slab for pipe_transfer allocations: */
121 struct util_slab_mempool transfer_pool;
122
123 /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
124 struct util_slab_mempool sample_pool;
125 struct util_slab_mempool sample_period_pool;
126
127 /* sample-providers for hw queries: */
128 const struct fd_hw_sample_provider *sample_providers[MAX_HW_SAMPLE_PROVIDERS];
129
130 /* list of active queries: */
131 struct list_head active_queries;
132
133 /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
134 * DI_PT_x value to use for draw initiator. There are some
135 * slight differences between generation:
136 */
137 const uint8_t *primtypes;
138 uint32_t primtype_mask;
139
140 /* shaders used by clear, and gmem->mem blits: */
141 struct fd_program_stateobj solid_prog; // TODO move to screen?
142
143 /* shaders used by mem->gmem blits: */
144 struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
145 struct fd_program_stateobj blit_z, blit_zs;
146
147 /* Stats/counters:
148 */
149 struct {
150 uint64_t prims_emitted;
151 uint64_t prims_generated;
152 uint64_t draw_calls;
153 uint64_t batch_total, batch_sysmem, batch_gmem, batch_restore;
154 } stats;
155
156 /* Current batch.. the rule here is that you can deref ctx->batch
157 * in codepaths from pipe_context entrypoints. But not in code-
158 * paths from fd_batch_flush() (basically, the stuff that gets
159 * called from GMEM code), since in those code-paths the batch
160 * you care about is not necessarily the same as ctx->batch.
161 */
162 struct fd_batch *batch;
163
164 /* Keep track if WAIT_FOR_IDLE is needed for registers we need
165 * to update via RMW:
166 */
167 bool needs_wfi;
168
169 /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION? At least on a3xx
170 * it is not a banked context register, so it needs a WFI to update.
171 * Keep track if it has actually changed, to avoid unneeded WFI.
172 * */
173 bool needs_rb_fbd;
174
175 struct pipe_scissor_state scissor;
176
177 /* we don't have a disable/enable bit for scissor, so instead we keep
178 * a disabled-scissor state which matches the entire bound framebuffer
179 * and use that when scissor is not enabled.
180 */
181 struct pipe_scissor_state disabled_scissor;
182
183 /* Current gmem/tiling configuration.. gets updated on render_tiles()
184 * if out of date with current maximal-scissor/cpp:
185 *
186 * (NOTE: this is kind of related to the batch, but moving it there
187 * means we'd always have to recalc tiles ever batch)
188 */
189 struct fd_gmem_stateobj gmem;
190 struct fd_vsc_pipe pipe[8];
191 struct fd_tile tile[512];
192
193 /* which state objects need to be re-emit'd: */
194 enum {
195 FD_DIRTY_BLEND = (1 << 0),
196 FD_DIRTY_RASTERIZER = (1 << 1),
197 FD_DIRTY_ZSA = (1 << 2),
198 FD_DIRTY_FRAGTEX = (1 << 3),
199 FD_DIRTY_VERTTEX = (1 << 4),
200 FD_DIRTY_TEXSTATE = (1 << 5),
201
202 FD_SHADER_DIRTY_VP = (1 << 6),
203 FD_SHADER_DIRTY_FP = (1 << 7),
204 /* skip geom/tcs/tes/compute */
205 FD_DIRTY_PROG = FD_SHADER_DIRTY_FP | FD_SHADER_DIRTY_VP,
206
207 FD_DIRTY_BLEND_COLOR = (1 << 12),
208 FD_DIRTY_STENCIL_REF = (1 << 13),
209 FD_DIRTY_SAMPLE_MASK = (1 << 14),
210 FD_DIRTY_FRAMEBUFFER = (1 << 15),
211 FD_DIRTY_STIPPLE = (1 << 16),
212 FD_DIRTY_VIEWPORT = (1 << 17),
213 FD_DIRTY_CONSTBUF = (1 << 18),
214 FD_DIRTY_VTXSTATE = (1 << 19),
215 FD_DIRTY_VTXBUF = (1 << 20),
216 FD_DIRTY_INDEXBUF = (1 << 21),
217 FD_DIRTY_SCISSOR = (1 << 22),
218 FD_DIRTY_STREAMOUT = (1 << 23),
219 FD_DIRTY_UCP = (1 << 24),
220 FD_DIRTY_BLEND_DUAL = (1 << 25),
221 } dirty;
222
223 struct pipe_blend_state *blend;
224 struct pipe_rasterizer_state *rasterizer;
225 struct pipe_depth_stencil_alpha_state *zsa;
226
227 struct fd_texture_stateobj verttex, fragtex;
228
229 struct fd_program_stateobj prog;
230
231 struct fd_vertex_state vtx;
232
233 struct pipe_blend_color blend_color;
234 struct pipe_stencil_ref stencil_ref;
235 unsigned sample_mask;
236 struct pipe_poly_stipple stipple;
237 struct pipe_viewport_state viewport;
238 struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
239 struct pipe_index_buffer indexbuf;
240 struct fd_streamout_stateobj streamout;
241 struct pipe_clip_state ucp;
242
243 struct pipe_query *cond_query;
244 bool cond_cond; /* inverted rendering condition */
245 uint cond_mode;
246
247 /* Are we in process of shadowing a resource? Used to detect recursion
248 * in transfer_map, and skip unneeded synchronization.
249 */
250 bool in_shadow;
251
252 /* Ie. in blit situation where we no longer care about previous framebuffer
253 * contents. Main point is to eliminate blits from fd_try_shadow_resource().
254 * For example, in case of texture upload + gen-mipmaps.
255 */
256 bool discard;
257
258 struct pipe_debug_callback debug;
259
260 /* GMEM/tile handling fxns: */
261 void (*emit_tile_init)(struct fd_batch *batch);
262 void (*emit_tile_prep)(struct fd_batch *batch, struct fd_tile *tile);
263 void (*emit_tile_mem2gmem)(struct fd_batch *batch, struct fd_tile *tile);
264 void (*emit_tile_renderprep)(struct fd_batch *batch, struct fd_tile *tile);
265 void (*emit_tile_gmem2mem)(struct fd_batch *batch, struct fd_tile *tile);
266
267 /* optional, for GMEM bypass: */
268 void (*emit_sysmem_prep)(struct fd_batch *batch);
269
270 /* draw: */
271 bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info);
272 void (*clear)(struct fd_context *ctx, unsigned buffers,
273 const union pipe_color_union *color, double depth, unsigned stencil);
274
275 /* constant emit: (note currently not used/needed for a2xx) */
276 void (*emit_const)(struct fd_ringbuffer *ring, enum shader_t type,
277 uint32_t regid, uint32_t offset, uint32_t sizedwords,
278 const uint32_t *dwords, struct pipe_resource *prsc);
279 /* emit bo addresses as constant: */
280 void (*emit_const_bo)(struct fd_ringbuffer *ring, enum shader_t type, boolean write,
281 uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
282
283 /* indirect-branch emit: */
284 void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
285 };
286
287 static inline struct fd_context *
288 fd_context(struct pipe_context *pctx)
289 {
290 return (struct fd_context *)pctx;
291 }
292
293 static inline struct pipe_scissor_state *
294 fd_context_get_scissor(struct fd_context *ctx)
295 {
296 if (ctx->rasterizer && ctx->rasterizer->scissor)
297 return &ctx->scissor;
298 return &ctx->disabled_scissor;
299 }
300
301 static inline bool
302 fd_supported_prim(struct fd_context *ctx, unsigned prim)
303 {
304 return (1 << prim) & ctx->primtype_mask;
305 }
306
307 static inline void
308 fd_reset_wfi(struct fd_context *ctx)
309 {
310 ctx->needs_wfi = true;
311 }
312
313 /* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already
314 * been one since last draw:
315 */
316 static inline void
317 fd_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
318 {
319 if (ctx->needs_wfi) {
320 OUT_WFI(ring);
321 ctx->needs_wfi = false;
322 }
323 }
324
325 /* emit a CP_EVENT_WRITE:
326 */
327 static inline void
328 fd_event_write(struct fd_context *ctx, struct fd_ringbuffer *ring,
329 enum vgt_event_type evt)
330 {
331 OUT_PKT3(ring, CP_EVENT_WRITE, 1);
332 OUT_RING(ring, evt);
333 fd_reset_wfi(ctx);
334 }
335
336 struct pipe_context * fd_context_init(struct fd_context *ctx,
337 struct pipe_screen *pscreen, const uint8_t *primtypes,
338 void *priv);
339
340 void fd_context_destroy(struct pipe_context *pctx);
341
342 #endif /* FREEDRENO_CONTEXT_H_ */