src/gallium/drivers/freedreno/freedreno_context.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_CONTEXT_H_
  30 #define FREEDRENO_CONTEXT_H_
  31
  32 #include "pipe/p_context.h"
  33 #include "indices/u_primconvert.h"
  34 #include "util/u_blitter.h"
  35 #include "util/list.h"
  36 #include "util/u_slab.h"
  37 #include "util/u_string.h"
  38
  39 #include "freedreno_batch.h"
  40 #include "freedreno_screen.h"
  41 #include "freedreno_gmem.h"
  42 #include "freedreno_util.h"
  43
  44 #define BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE)
  45
  46 struct fd_vertex_stateobj;
  47
  48 struct fd_texture_stateobj {
  49         struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
  50         unsigned num_textures;
  51         unsigned valid_textures;
  52         struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  53         unsigned num_samplers;
  54         unsigned valid_samplers;
  55 };
  56
  57 struct fd_program_stateobj {
  58         void *vp, *fp;
  59
  60         /* rest only used by fd2.. split out: */
  61         uint8_t num_exports;
  62         /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
  63          * for TGSI_SEMANTIC_GENERIC.  Special vs exports (position and point-
  64          * size) are not included in this
  65          */
  66         uint8_t export_linkage[63];
  67 };
  68
  69 struct fd_constbuf_stateobj {
  70         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
  71         uint32_t enabled_mask;
  72         uint32_t dirty_mask;
  73 };
  74
  75 struct fd_vertexbuf_stateobj {
  76         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
  77         unsigned count;
  78         uint32_t enabled_mask;
  79         uint32_t dirty_mask;
  80 };
  81
  82 struct fd_vertex_stateobj {
  83         struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
  84         unsigned num_elements;
  85 };
  86
  87 struct fd_streamout_stateobj {
  88         struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
  89         unsigned num_targets;
  90         /* Track offset from vtxcnt for streamout data.  This counter
  91          * is just incremented by # of vertices on each draw until
  92          * reset or new streamout buffer bound.
  93          *
  94          * When we eventually have GS, the CPU won't actually know the
  95          * number of vertices per draw, so I think we'll have to do
  96          * something more clever.
  97          */
  98         unsigned offsets[PIPE_MAX_SO_BUFFERS];
  99 };
 100
 101 /* group together the vertex and vertexbuf state.. for ease of passing
 102  * around, and because various internal operations (gmem<->mem, etc)
 103  * need their own vertex state:
 104  */
 105 struct fd_vertex_state {
 106         struct fd_vertex_stateobj *vtx;
 107         struct fd_vertexbuf_stateobj vertexbuf;
 108 };
 109
 110 /* Bitmask of stages in rendering that a particular query query is
 111  * active.  Queries will be automatically started/stopped (generating
 112  * additional fd_hw_sample_period's) on entrance/exit from stages that
 113  * are applicable to the query.
 114  *
 115  * NOTE: set the stage to NULL at end of IB to ensure no query is still
 116  * active.  Things aren't going to work out the way you want if a query
 117  * is active across IB's (or between tile IB and draw IB)
 118  */
 119 enum fd_render_stage {
 120         FD_STAGE_NULL     = 0x01,
 121         FD_STAGE_DRAW     = 0x02,
 122         FD_STAGE_CLEAR    = 0x04,
 123         /* TODO before queries which include MEM2GMEM or GMEM2MEM will
 124          * work we will need to call fd_hw_query_prepare() from somewhere
 125          * appropriate so that queries in the tiling IB get backed with
 126          * memory to write results to.
 127          */
 128         FD_STAGE_MEM2GMEM = 0x08,
 129         FD_STAGE_GMEM2MEM = 0x10,
 130         /* used for driver internal draws (ie. util_blitter_blit()): */
 131         FD_STAGE_BLIT     = 0x20,
 132         FD_STAGE_ALL      = 0xff,
 133 };
 134
 135 #define MAX_HW_SAMPLE_PROVIDERS 4
 136 struct fd_hw_sample_provider;
 137 struct fd_hw_sample;
 138
 139 struct fd_context {
 140         struct pipe_context base;
 141
 142         struct fd_device *dev;
 143         struct fd_screen *screen;
 144
 145         struct blitter_context *blitter;
 146         struct primconvert_context *primconvert;
 147
 148         /* slab for pipe_transfer allocations: */
 149         struct util_slab_mempool transfer_pool;
 150
 151         /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
 152         struct util_slab_mempool sample_pool;
 153         struct util_slab_mempool sample_period_pool;
 154
 155         /* next sample offset.. incremented for each sample in the batch/
 156          * submit, reset to zero on next submit.
 157          */
 158         uint32_t next_sample_offset;
 159
 160         /* sample-providers for hw queries: */
 161         const struct fd_hw_sample_provider *sample_providers[MAX_HW_SAMPLE_PROVIDERS];
 162
 163         /* cached samples (in case multiple queries need to reference
 164          * the same sample snapshot)
 165          */
 166         struct fd_hw_sample *sample_cache[MAX_HW_SAMPLE_PROVIDERS];
 167
 168         /* which sample providers were active in the current batch: */
 169         uint32_t active_providers;
 170
 171         /* tracking for current stage, to know when to start/stop
 172          * any active queries:
 173          */
 174         enum fd_render_stage stage;
 175
 176         /* list of active queries: */
 177         struct list_head active_queries;
 178
 179         /* list of queries that are not active, but were active in the
 180          * current submit:
 181          */
 182         struct list_head current_queries;
 183
 184         /* current query result bo and tile stride: */
 185         struct fd_bo *query_bo;
 186         uint32_t query_tile_stride;
 187
 188         /* list of resources used by currently-unsubmitted renders */
 189         struct list_head used_resources;
 190
 191         /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
 192          * DI_PT_x value to use for draw initiator.  There are some
 193          * slight differences between generation:
 194          */
 195         const uint8_t *primtypes;
 196         uint32_t primtype_mask;
 197
 198         /* shaders used by clear, and gmem->mem blits: */
 199         struct fd_program_stateobj solid_prog; // TODO move to screen?
 200
 201         /* shaders used by mem->gmem blits: */
 202         struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
 203         struct fd_program_stateobj blit_z, blit_zs;
 204
 205         /* do we need to mem2gmem before rendering.  We don't, if for example,
 206          * there was a glClear() that invalidated the entire previous buffer
 207          * contents.  Keep track of which buffer(s) are cleared, or needs
 208          * restore.  Masks of PIPE_CLEAR_*
 209          *
 210          * The 'cleared' bits will be set for buffers which are *entirely*
 211          * cleared, and 'partial_cleared' bits will be set if you must
 212          * check cleared_scissor.
 213          */
 214         enum {
 215                 /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */
 216                 FD_BUFFER_COLOR   = PIPE_CLEAR_COLOR,
 217                 FD_BUFFER_DEPTH   = PIPE_CLEAR_DEPTH,
 218                 FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL,
 219                 FD_BUFFER_ALL     = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL,
 220         } cleared, partial_cleared, restore, resolve;
 221
 222         bool needs_flush;
 223
 224         /* To decide whether to render to system memory, keep track of the
 225          * number of draws, and whether any of them require multisample,
 226          * depth_test (or depth write), stencil_test, blending, and
 227          * color_logic_Op (since those functions are disabled when by-
 228          * passing GMEM.
 229          */
 230         enum {
 231                 FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01,
 232                 FD_GMEM_DEPTH_ENABLED        = 0x02,
 233                 FD_GMEM_STENCIL_ENABLED      = 0x04,
 234
 235                 FD_GMEM_MSAA_ENABLED         = 0x08,
 236                 FD_GMEM_BLEND_ENABLED        = 0x10,
 237                 FD_GMEM_LOGICOP_ENABLED      = 0x20,
 238         } gmem_reason;
 239         unsigned num_draws;   /* number of draws in current batch */
 240
 241         /* Stats/counters:
 242          */
 243         struct {
 244                 uint64_t prims_emitted;
 245                 uint64_t prims_generated;
 246                 uint64_t draw_calls;
 247                 uint64_t batch_total, batch_sysmem, batch_gmem, batch_restore;
 248         } stats;
 249
 250         /* TODO get rid of this.. only used in gmem/tiling code paths (and
 251          * NULL the rest of the time).  Just leaving for now to reduce some
 252          * churn..
 253          */
 254         struct fd_ringbuffer *ring;
 255
 256         /* Current batch.. the rule here is that you can deref ctx->batch
 257          * in codepaths from pipe_context entrypoints.  But not in code-
 258          * paths from fd_batch_flush() (basically, the stuff that gets
 259          * called from GMEM code), since in those code-paths the batch
 260          * you care about is not necessarily the same as ctx->batch.
 261          */
 262         struct fd_batch *batch;
 263
 264         /* Keep track if WAIT_FOR_IDLE is needed for registers we need
 265          * to update via RMW:
 266          */
 267         bool needs_wfi;
 268
 269         /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION?  At least on a3xx
 270          * it is not a banked context register, so it needs a WFI to update.
 271          * Keep track if it has actually changed, to avoid unneeded WFI.
 272          * */
 273         bool needs_rb_fbd;
 274
 275         /* Keep track of DRAW initiators that need to be patched up depending
 276          * on whether we using binning or not:
 277          */
 278         struct util_dynarray draw_patches;
 279
 280         struct pipe_scissor_state scissor;
 281
 282         /* we don't have a disable/enable bit for scissor, so instead we keep
 283          * a disabled-scissor state which matches the entire bound framebuffer
 284          * and use that when scissor is not enabled.
 285          */
 286         struct pipe_scissor_state disabled_scissor;
 287
 288         /* Track the maximal bounds of the scissor of all the draws within a
 289          * batch.  Used at the tile rendering step (fd_gmem_render_tiles(),
 290          * mem2gmem/gmem2mem) to avoid needlessly moving data in/out of gmem.
 291          */
 292         struct pipe_scissor_state max_scissor;
 293
 294         /* Track the cleared scissor for color/depth/stencil, so we know
 295          * which, if any, tiles need to be restored (mem2gmem).  Only valid
 296          * if the corresponding bit in ctx->cleared is set.
 297          */
 298         struct {
 299                 struct pipe_scissor_state color, depth, stencil;
 300         } cleared_scissor;
 301
 302         /* Current gmem/tiling configuration.. gets updated on render_tiles()
 303          * if out of date with current maximal-scissor/cpp:
 304          */
 305         struct fd_gmem_stateobj gmem;
 306         struct fd_vsc_pipe      pipe[8];
 307         struct fd_tile          tile[512];
 308
 309         /* which state objects need to be re-emit'd: */
 310         enum {
 311                 FD_DIRTY_BLEND       = (1 <<  0),
 312                 FD_DIRTY_RASTERIZER  = (1 <<  1),
 313                 FD_DIRTY_ZSA         = (1 <<  2),
 314                 FD_DIRTY_FRAGTEX     = (1 <<  3),
 315                 FD_DIRTY_VERTTEX     = (1 <<  4),
 316                 FD_DIRTY_TEXSTATE    = (1 <<  5),
 317
 318                 FD_SHADER_DIRTY_VP   = (1 <<  6),
 319                 FD_SHADER_DIRTY_FP   = (1 <<  7),
 320                 /* skip geom/tcs/tes/compute */
 321                 FD_DIRTY_PROG        = FD_SHADER_DIRTY_FP | FD_SHADER_DIRTY_VP,
 322
 323                 FD_DIRTY_BLEND_COLOR = (1 << 12),
 324                 FD_DIRTY_STENCIL_REF = (1 << 13),
 325                 FD_DIRTY_SAMPLE_MASK = (1 << 14),
 326                 FD_DIRTY_FRAMEBUFFER = (1 << 15),
 327                 FD_DIRTY_STIPPLE     = (1 << 16),
 328                 FD_DIRTY_VIEWPORT    = (1 << 17),
 329                 FD_DIRTY_CONSTBUF    = (1 << 18),
 330                 FD_DIRTY_VTXSTATE    = (1 << 19),
 331                 FD_DIRTY_VTXBUF      = (1 << 20),
 332                 FD_DIRTY_INDEXBUF    = (1 << 21),
 333                 FD_DIRTY_SCISSOR     = (1 << 22),
 334                 FD_DIRTY_STREAMOUT   = (1 << 23),
 335                 FD_DIRTY_UCP         = (1 << 24),
 336                 FD_DIRTY_BLEND_DUAL  = (1 << 25),
 337         } dirty;
 338
 339         struct pipe_blend_state *blend;
 340         struct pipe_rasterizer_state *rasterizer;
 341         struct pipe_depth_stencil_alpha_state *zsa;
 342
 343         struct fd_texture_stateobj verttex, fragtex;
 344
 345         struct fd_program_stateobj prog;
 346
 347         struct fd_vertex_state vtx;
 348
 349         struct pipe_blend_color blend_color;
 350         struct pipe_stencil_ref stencil_ref;
 351         unsigned sample_mask;
 352         struct pipe_framebuffer_state framebuffer;
 353         struct pipe_poly_stipple stipple;
 354         struct pipe_viewport_state viewport;
 355         struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 356         struct pipe_index_buffer indexbuf;
 357         struct fd_streamout_stateobj streamout;
 358         struct pipe_clip_state ucp;
 359
 360         struct pipe_query *cond_query;
 361         bool cond_cond; /* inverted rendering condition */
 362         uint cond_mode;
 363
 364         struct pipe_debug_callback debug;
 365
 366         /* GMEM/tile handling fxns: */
 367         void (*emit_tile_init)(struct fd_context *ctx);
 368         void (*emit_tile_prep)(struct fd_context *ctx, struct fd_tile *tile);
 369         void (*emit_tile_mem2gmem)(struct fd_context *ctx, struct fd_tile *tile);
 370         void (*emit_tile_renderprep)(struct fd_context *ctx, struct fd_tile *tile);
 371         void (*emit_tile_gmem2mem)(struct fd_context *ctx, struct fd_tile *tile);
 372
 373         /* optional, for GMEM bypass: */
 374         void (*emit_sysmem_prep)(struct fd_context *ctx);
 375
 376         /* draw: */
 377         bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info);
 378         void (*clear)(struct fd_context *ctx, unsigned buffers,
 379                         const union pipe_color_union *color, double depth, unsigned stencil);
 380
 381         /* constant emit:  (note currently not used/needed for a2xx) */
 382         void (*emit_const)(struct fd_ringbuffer *ring, enum shader_t type,
 383                         uint32_t regid, uint32_t offset, uint32_t sizedwords,
 384                         const uint32_t *dwords, struct pipe_resource *prsc);
 385         /* emit bo addresses as constant: */
 386         void (*emit_const_bo)(struct fd_ringbuffer *ring, enum shader_t type, boolean write,
 387                         uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
 388
 389         /* indirect-branch emit: */
 390         void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
 391 };
 392
 393 static inline struct fd_context *
 394 fd_context(struct pipe_context *pctx)
 395 {
 396         return (struct fd_context *)pctx;
 397 }
 398
 399 static inline struct pipe_scissor_state *
 400 fd_context_get_scissor(struct fd_context *ctx)
 401 {
 402         if (ctx->rasterizer && ctx->rasterizer->scissor)
 403                 return &ctx->scissor;
 404         return &ctx->disabled_scissor;
 405 }
 406
 407 static inline bool
 408 fd_supported_prim(struct fd_context *ctx, unsigned prim)
 409 {
 410         return (1 << prim) & ctx->primtype_mask;
 411 }
 412
 413 static inline void
 414 fd_reset_wfi(struct fd_context *ctx)
 415 {
 416         ctx->needs_wfi = true;
 417 }
 418
 419 /* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already
 420  * been one since last draw:
 421  */
 422 static inline void
 423 fd_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring)
 424 {
 425         if (ctx->needs_wfi) {
 426                 OUT_WFI(ring);
 427                 ctx->needs_wfi = false;
 428         }
 429 }
 430
 431 /* emit a CP_EVENT_WRITE:
 432  */
 433 static inline void
 434 fd_event_write(struct fd_context *ctx, struct fd_ringbuffer *ring,
 435                 enum vgt_event_type evt)
 436 {
 437         OUT_PKT3(ring, CP_EVENT_WRITE, 1);
 438         OUT_RING(ring, evt);
 439         fd_reset_wfi(ctx);
 440 }
 441
 442 struct pipe_context * fd_context_init(struct fd_context *ctx,
 443                 struct pipe_screen *pscreen, const uint8_t *primtypes,
 444                 void *priv);
 445
 446 void fd_context_render(struct pipe_context *pctx);
 447
 448 void fd_context_destroy(struct pipe_context *pctx);
 449
 450 #endif /* FREEDRENO_CONTEXT_H_ */