1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
29 #include "pipe/p_state.h"
30 #include "util/u_draw.h"
31 #include "util/u_string.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34 #include "util/u_format.h"
35 #include "util/u_helpers.h"
37 #include "freedreno_draw.h"
38 #include "freedreno_context.h"
39 #include "freedreno_state.h"
40 #include "freedreno_resource.h"
41 #include "freedreno_query_acc.h"
42 #include "freedreno_query_hw.h"
43 #include "freedreno_util.h"
46 resource_read(struct fd_batch
*batch
, struct pipe_resource
*prsc
)
50 fd_batch_resource_used(batch
, fd_resource(prsc
), false);
54 resource_written(struct fd_batch
*batch
, struct pipe_resource
*prsc
)
58 fd_batch_resource_used(batch
, fd_resource(prsc
), true);
62 fd_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
64 struct fd_context
*ctx
= fd_context(pctx
);
65 struct fd_batch
*batch
= ctx
->batch
;
66 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
67 struct pipe_scissor_state
*scissor
= fd_context_get_scissor(ctx
);
68 unsigned i
, prims
, buffers
= 0, restore_buffers
= 0;
70 /* for debugging problems with indirect draw, it is convenient
71 * to be able to emulate it, to determine if game is feeding us
74 if (info
->indirect
&& (fd_mesa_debug
& FD_DBG_NOINDR
)) {
75 util_draw_indirect(pctx
, info
);
79 if (!info
->count_from_stream_output
&& !info
->indirect
&&
80 !info
->primitive_restart
&&
81 !u_trim_pipe_prim(info
->mode
, (unsigned*)&info
->count
))
84 /* if we supported transform feedback, we'd have to disable this: */
85 if (((scissor
->maxx
- scissor
->minx
) *
86 (scissor
->maxy
- scissor
->miny
)) == 0) {
90 /* TODO: push down the region versions into the tiles */
91 if (!fd_render_condition_check(pctx
))
94 /* emulate unsupported primitives: */
95 if (!fd_supported_prim(ctx
, info
->mode
)) {
96 if (ctx
->streamout
.num_targets
> 0)
97 debug_error("stream-out with emulated prims");
98 util_primconvert_save_rasterizer_state(ctx
->primconvert
, ctx
->rasterizer
);
99 util_primconvert_draw_vbo(ctx
->primconvert
, info
);
103 /* Upload a user index buffer. */
104 struct pipe_resource
*indexbuf
= NULL
;
105 unsigned index_offset
= 0;
106 struct pipe_draw_info new_info
;
107 if (info
->index_size
) {
108 if (info
->has_user_indices
) {
109 if (!util_upload_index_buffer(pctx
, info
, &indexbuf
, &index_offset
))
112 new_info
.index
.resource
= indexbuf
;
113 new_info
.has_user_indices
= false;
116 indexbuf
= info
->index
.resource
;
121 fd_batch_reset(batch
);
122 fd_context_all_dirty(ctx
);
125 batch
->blit
= ctx
->in_blit
;
126 batch
->back_blit
= ctx
->in_shadow
;
128 /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
129 * query_buf may not be created yet.
131 fd_batch_set_stage(batch
, FD_STAGE_DRAW
);
134 * Figure out the buffers/features we need:
137 mtx_lock(&ctx
->screen
->lock
);
139 if (fd_depth_enabled(ctx
)) {
140 if (fd_resource(pfb
->zsbuf
->texture
)->valid
)
141 restore_buffers
|= FD_BUFFER_DEPTH
;
142 buffers
|= FD_BUFFER_DEPTH
;
143 resource_written(batch
, pfb
->zsbuf
->texture
);
144 batch
->gmem_reason
|= FD_GMEM_DEPTH_ENABLED
;
147 if (fd_stencil_enabled(ctx
)) {
148 if (fd_resource(pfb
->zsbuf
->texture
)->valid
)
149 restore_buffers
|= FD_BUFFER_STENCIL
;
150 buffers
|= FD_BUFFER_STENCIL
;
151 resource_written(batch
, pfb
->zsbuf
->texture
);
152 batch
->gmem_reason
|= FD_GMEM_STENCIL_ENABLED
;
155 if (fd_logicop_enabled(ctx
))
156 batch
->gmem_reason
|= FD_GMEM_LOGICOP_ENABLED
;
158 for (i
= 0; i
< pfb
->nr_cbufs
; i
++) {
159 struct pipe_resource
*surf
;
164 surf
= pfb
->cbufs
[i
]->texture
;
166 resource_written(batch
, surf
);
168 if (fd_resource(surf
)->valid
)
169 restore_buffers
|= PIPE_CLEAR_COLOR0
<< i
;
171 buffers
|= PIPE_CLEAR_COLOR0
<< i
;
173 if (fd_blend_enabled(ctx
, i
))
174 batch
->gmem_reason
|= FD_GMEM_BLEND_ENABLED
;
177 /* Mark SSBOs as being written.. we don't actually know which ones are
178 * read vs written, so just assume the worst
180 foreach_bit(i
, ctx
->shaderbuf
[PIPE_SHADER_FRAGMENT
].enabled_mask
)
181 resource_written(batch
, ctx
->shaderbuf
[PIPE_SHADER_FRAGMENT
].sb
[i
].buffer
);
183 foreach_bit(i
, ctx
->shaderimg
[PIPE_SHADER_FRAGMENT
].enabled_mask
) {
184 struct pipe_image_view
*img
=
185 &ctx
->shaderimg
[PIPE_SHADER_FRAGMENT
].si
[i
];
186 if (img
->access
& PIPE_IMAGE_ACCESS_WRITE
)
187 resource_written(batch
, img
->resource
);
189 resource_read(batch
, img
->resource
);
192 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_VERTEX
].enabled_mask
)
193 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_VERTEX
].cb
[i
].buffer
);
194 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].enabled_mask
)
195 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
[i
].buffer
);
197 /* Mark VBOs as being read */
198 foreach_bit(i
, ctx
->vtx
.vertexbuf
.enabled_mask
) {
199 assert(!ctx
->vtx
.vertexbuf
.vb
[i
].is_user_buffer
);
200 resource_read(batch
, ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
);
203 /* Mark index buffer as being read */
204 resource_read(batch
, indexbuf
);
206 /* Mark indirect draw buffer as being read */
208 resource_read(batch
, info
->indirect
->buffer
);
210 /* Mark textures as being read */
211 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_VERTEX
].valid_textures
)
212 resource_read(batch
, ctx
->tex
[PIPE_SHADER_VERTEX
].textures
[i
]->texture
);
213 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_FRAGMENT
].valid_textures
)
214 resource_read(batch
, ctx
->tex
[PIPE_SHADER_FRAGMENT
].textures
[i
]->texture
);
216 /* Mark streamout buffers as being written.. */
217 for (i
= 0; i
< ctx
->streamout
.num_targets
; i
++)
218 if (ctx
->streamout
.targets
[i
])
219 resource_written(batch
, ctx
->streamout
.targets
[i
]->buffer
);
221 resource_written(batch
, batch
->query_buf
);
223 list_for_each_entry(struct fd_acc_query
, aq
, &ctx
->acc_active_queries
, node
)
224 resource_written(batch
, aq
->prsc
);
226 mtx_unlock(&ctx
->screen
->lock
);
230 prims
= u_reduced_prims_for_vertices(info
->mode
, info
->count
);
232 ctx
->stats
.draw_calls
++;
234 /* TODO prims_emitted should be clipped when the stream-out buffer is
235 * not large enough. See max_tf_vtx().. probably need to move that
236 * into common code. Although a bit more annoying since a2xx doesn't
237 * use ir3 so no common way to get at the pipe_stream_output_info
238 * which is needed for this calculation.
240 if (ctx
->streamout
.num_targets
> 0)
241 ctx
->stats
.prims_emitted
+= prims
;
242 ctx
->stats
.prims_generated
+= prims
;
244 /* any buffers that haven't been cleared yet, we need to restore: */
245 batch
->restore
|= restore_buffers
& (FD_BUFFER_ALL
& ~batch
->cleared
);
246 /* and any buffers used, need to be resolved: */
247 batch
->resolve
|= buffers
;
249 DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch
, buffers
,
250 pfb
->width
, pfb
->height
, batch
->num_draws
,
251 util_format_short_name(pipe_surface_format(pfb
->cbufs
[0])),
252 util_format_short_name(pipe_surface_format(pfb
->zsbuf
)));
254 if (ctx
->draw_vbo(ctx
, info
, index_offset
))
255 batch
->needs_flush
= true;
257 for (i
= 0; i
< ctx
->streamout
.num_targets
; i
++)
258 ctx
->streamout
.offsets
[i
] += info
->count
;
260 if (fd_mesa_debug
& FD_DBG_DDRAW
)
261 fd_context_all_dirty(ctx
);
263 fd_batch_check_size(batch
);
265 if (info
== &new_info
)
266 pipe_resource_reference(&indexbuf
, NULL
);
269 /* Generic clear implementation (partially) using u_blitter: */
271 fd_blitter_clear(struct pipe_context
*pctx
, unsigned buffers
,
272 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
274 struct fd_context
*ctx
= fd_context(pctx
);
275 struct pipe_framebuffer_state
*pfb
= &ctx
->batch
->framebuffer
;
276 struct blitter_context
*blitter
= ctx
->blitter
;
278 fd_blitter_pipe_begin(ctx
, false, true, FD_STAGE_CLEAR
);
280 util_blitter_common_clear_setup(blitter
, pfb
->width
, pfb
->height
,
281 buffers
, NULL
, NULL
);
283 struct pipe_stencil_ref sr
= {
284 .ref_value
= { stencil
& 0xff }
286 pctx
->set_stencil_ref(pctx
, &sr
);
288 struct pipe_constant_buffer cb
= {
290 .user_buffer
= &color
->ui
,
292 pctx
->set_constant_buffer(pctx
, PIPE_SHADER_FRAGMENT
, 0, &cb
);
294 if (!ctx
->clear_rs_state
) {
295 const struct pipe_rasterizer_state tmpl
= {
296 .cull_face
= PIPE_FACE_NONE
,
297 .half_pixel_center
= 1,
298 .bottom_edge_rule
= 1,
302 ctx
->clear_rs_state
= pctx
->create_rasterizer_state(pctx
, &tmpl
);
304 pctx
->bind_rasterizer_state(pctx
, ctx
->clear_rs_state
);
306 struct pipe_viewport_state vp
= {
307 .scale
= { 0.5f
* pfb
->width
, -0.5f
* pfb
->height
, depth
},
308 .translate
= { 0.5f
* pfb
->width
, 0.5f
* pfb
->height
, 0.0f
},
310 pctx
->set_viewport_states(pctx
, 0, 1, &vp
);
312 pctx
->bind_vertex_elements_state(pctx
, ctx
->solid_vbuf_state
.vtx
);
313 pctx
->set_vertex_buffers(pctx
, blitter
->vb_slot
, 1,
314 &ctx
->solid_vbuf_state
.vertexbuf
.vb
[0]);
315 pctx
->set_stream_output_targets(pctx
, 0, NULL
, NULL
);
316 pctx
->bind_vs_state(pctx
, ctx
->solid_prog
.vp
);
317 pctx
->bind_fs_state(pctx
, ctx
->solid_prog
.fp
);
319 struct pipe_draw_info info
= {
320 .mode
= PIPE_PRIM_MAX
, /* maps to DI_PT_RECTLIST */
325 ctx
->draw_vbo(ctx
, &info
, 0);
327 util_blitter_restore_constant_buffer_state(blitter
);
328 util_blitter_restore_vertex_states(blitter
);
329 util_blitter_restore_fragment_states(blitter
);
330 util_blitter_restore_textures(blitter
);
331 util_blitter_restore_fb_state(blitter
);
332 util_blitter_restore_render_cond(blitter
);
333 util_blitter_unset_running_flag(blitter
);
335 fd_blitter_pipe_end(ctx
);
338 /* TODO figure out how to make better use of existing state mechanism
339 * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
340 * track of what state really actually changes, and (b) reduce the code
341 * in the a2xx/a3xx parts.
345 fd_clear(struct pipe_context
*pctx
, unsigned buffers
,
346 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
348 struct fd_context
*ctx
= fd_context(pctx
);
349 struct fd_batch
*batch
= ctx
->batch
;
350 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
351 struct pipe_scissor_state
*scissor
= fd_context_get_scissor(ctx
);
352 unsigned cleared_buffers
;
355 /* TODO: push down the region versions into the tiles */
356 if (!fd_render_condition_check(pctx
))
360 fd_batch_reset(batch
);
361 fd_context_all_dirty(ctx
);
364 /* for bookkeeping about which buffers have been cleared (and thus
365 * can fully or partially skip mem2gmem) we need to ignore buffers
366 * that have already had a draw, in case apps do silly things like
367 * clear after draw (ie. if you only clear the color buffer, but
368 * something like alpha-test causes side effects from the draw in
369 * the depth buffer, etc)
371 cleared_buffers
= buffers
& (FD_BUFFER_ALL
& ~batch
->restore
);
373 /* do we have full-screen scissor? */
374 if (!memcmp(scissor
, &ctx
->disabled_scissor
, sizeof(*scissor
))) {
375 batch
->cleared
|= cleared_buffers
;
377 batch
->partial_cleared
|= cleared_buffers
;
378 if (cleared_buffers
& PIPE_CLEAR_COLOR
)
379 batch
->cleared_scissor
.color
= *scissor
;
380 if (cleared_buffers
& PIPE_CLEAR_DEPTH
)
381 batch
->cleared_scissor
.depth
= *scissor
;
382 if (cleared_buffers
& PIPE_CLEAR_STENCIL
)
383 batch
->cleared_scissor
.stencil
= *scissor
;
385 batch
->resolve
|= buffers
;
386 batch
->needs_flush
= true;
388 mtx_lock(&ctx
->screen
->lock
);
390 if (buffers
& PIPE_CLEAR_COLOR
)
391 for (i
= 0; i
< pfb
->nr_cbufs
; i
++)
392 if (buffers
& (PIPE_CLEAR_COLOR0
<< i
))
393 resource_written(batch
, pfb
->cbufs
[i
]->texture
);
395 if (buffers
& (PIPE_CLEAR_DEPTH
| PIPE_CLEAR_STENCIL
)) {
396 resource_written(batch
, pfb
->zsbuf
->texture
);
397 batch
->gmem_reason
|= FD_GMEM_CLEARS_DEPTH_STENCIL
;
400 resource_written(batch
, batch
->query_buf
);
402 list_for_each_entry(struct fd_acc_query
, aq
, &ctx
->acc_active_queries
, node
)
403 resource_written(batch
, aq
->prsc
);
405 mtx_unlock(&ctx
->screen
->lock
);
407 DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch
, buffers
,
408 pfb
->width
, pfb
->height
, depth
, stencil
,
409 util_format_short_name(pipe_surface_format(pfb
->cbufs
[0])),
410 util_format_short_name(pipe_surface_format(pfb
->zsbuf
)));
412 /* if per-gen backend doesn't implement ctx->clear() generic
415 bool fallback
= true;
418 fd_batch_set_stage(batch
, FD_STAGE_CLEAR
);
420 if (ctx
->clear(ctx
, buffers
, color
, depth
, stencil
)) {
421 if (fd_mesa_debug
& FD_DBG_DCLEAR
)
422 fd_context_all_dirty(ctx
);
429 fd_blitter_clear(pctx
, buffers
, color
, depth
, stencil
);
434 fd_clear_render_target(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
435 const union pipe_color_union
*color
,
436 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
437 bool render_condition_enabled
)
439 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x
, y
, w
, h
);
443 fd_clear_depth_stencil(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
444 unsigned buffers
, double depth
, unsigned stencil
,
445 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
446 bool render_condition_enabled
)
448 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
449 buffers
, depth
, stencil
, x
, y
, w
, h
);
453 fd_launch_grid(struct pipe_context
*pctx
, const struct pipe_grid_info
*info
)
455 struct fd_context
*ctx
= fd_context(pctx
);
456 struct fd_batch
*batch
, *save_batch
= NULL
;
459 batch
= fd_batch_create(ctx
, true);
460 fd_batch_reference(&save_batch
, ctx
->batch
);
461 fd_batch_reference(&ctx
->batch
, batch
);
463 mtx_lock(&ctx
->screen
->lock
);
465 /* Mark SSBOs as being written.. we don't actually know which ones are
466 * read vs written, so just assume the worst
468 foreach_bit(i
, ctx
->shaderbuf
[PIPE_SHADER_COMPUTE
].enabled_mask
)
469 resource_read(batch
, ctx
->shaderbuf
[PIPE_SHADER_COMPUTE
].sb
[i
].buffer
);
471 foreach_bit(i
, ctx
->shaderimg
[PIPE_SHADER_COMPUTE
].enabled_mask
) {
472 struct pipe_image_view
*img
=
473 &ctx
->shaderimg
[PIPE_SHADER_COMPUTE
].si
[i
];
474 if (img
->access
& PIPE_IMAGE_ACCESS_WRITE
)
475 resource_written(batch
, img
->resource
);
477 resource_read(batch
, img
->resource
);
481 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_COMPUTE
].enabled_mask
)
482 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_COMPUTE
].cb
[i
].buffer
);
484 /* Mark textures as being read */
485 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_COMPUTE
].valid_textures
)
486 resource_read(batch
, ctx
->tex
[PIPE_SHADER_COMPUTE
].textures
[i
]->texture
);
488 /* For global buffers, we don't really know if read or written, so assume
491 foreach_bit(i
, ctx
->global_bindings
.enabled_mask
)
492 resource_written(batch
, ctx
->global_bindings
.buf
[i
]);
495 resource_read(batch
, info
->indirect
);
497 mtx_unlock(&ctx
->screen
->lock
);
499 batch
->needs_flush
= true;
500 ctx
->launch_grid(ctx
, info
);
502 fd_batch_flush(batch
, false, false);
504 fd_batch_reference(&ctx
->batch
, save_batch
);
505 fd_batch_reference(&save_batch
, NULL
);
509 fd_draw_init(struct pipe_context
*pctx
)
511 pctx
->draw_vbo
= fd_draw_vbo
;
512 pctx
->clear
= fd_clear
;
513 pctx
->clear_render_target
= fd_clear_render_target
;
514 pctx
->clear_depth_stencil
= fd_clear_depth_stencil
;
516 if (has_compute(fd_screen(pctx
->screen
))) {
517 pctx
->launch_grid
= fd_launch_grid
;