src/gallium/drivers/freedreno/freedreno_draw.c

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_draw.h"
  29 #include "util/u_string.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_prim.h"
  32 #include "util/format/u_format.h"
  33 #include "util/u_helpers.h"
  34
  35 #include "freedreno_blitter.h"
  36 #include "freedreno_draw.h"
  37 #include "freedreno_context.h"
  38 #include "freedreno_fence.h"
  39 #include "freedreno_state.h"
  40 #include "freedreno_resource.h"
  41 #include "freedreno_query_acc.h"
  42 #include "freedreno_query_hw.h"
  43 #include "freedreno_util.h"
  44
  45 static void
  46 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
  47 {
  48         if (!prsc)
  49                 return;
  50         fd_batch_resource_read(batch, fd_resource(prsc));
  51 }
  52
  53 static void
  54 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
  55 {
  56         if (!prsc)
  57                 return;
  58         fd_batch_resource_write(batch, fd_resource(prsc));
  59 }
  60
  61 static void
  62 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
  63 {
  64         struct fd_context *ctx = fd_context(pctx);
  65         struct fd_batch *batch = fd_context_batch(ctx);
  66         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
  67         unsigned i, prims, buffers = 0, restore_buffers = 0;
  68
  69         /* for debugging problems with indirect draw, it is convenient
  70          * to be able to emulate it, to determine if game is feeding us
  71          * bogus data:
  72          */
  73         if (info->indirect && (fd_mesa_debug & FD_DBG_NOINDR)) {
  74                 util_draw_indirect(pctx, info);
  75                 return;
  76         }
  77
  78         if (!info->count_from_stream_output && !info->indirect &&
  79             !info->primitive_restart &&
  80             !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
  81                 return;
  82
  83         /* TODO: push down the region versions into the tiles */
  84         if (!fd_render_condition_check(pctx))
  85                 return;
  86
  87         /* emulate unsupported primitives: */
  88         if (!fd_supported_prim(ctx, info->mode)) {
  89                 if (ctx->streamout.num_targets > 0)
  90                         debug_error("stream-out with emulated prims");
  91                 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
  92                 util_primconvert_draw_vbo(ctx->primconvert, info);
  93                 return;
  94         }
  95
  96         fd_fence_ref(&ctx->last_fence, NULL);
  97
  98         /* Upload a user index buffer. */
  99         struct pipe_resource *indexbuf = NULL;
 100         unsigned index_offset = 0;
 101         struct pipe_draw_info new_info;
 102         if (info->index_size) {
 103                 if (info->has_user_indices) {
 104                         if (!util_upload_index_buffer(pctx, info, &indexbuf, &index_offset, 4))
 105                                 return;
 106                         new_info = *info;
 107                         new_info.index.resource = indexbuf;
 108                         new_info.has_user_indices = false;
 109                         info = &new_info;
 110                 } else {
 111                         indexbuf = info->index.resource;
 112                 }
 113         }
 114
 115         if (ctx->in_discard_blit) {
 116                 fd_batch_reset(batch);
 117                 fd_context_all_dirty(ctx);
 118         }
 119
 120         batch->blit = ctx->in_discard_blit;
 121         batch->back_blit = ctx->in_shadow;
 122
 123         /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
 124          * query_buf may not be created yet.
 125          */
 126         fd_batch_set_stage(batch, FD_STAGE_DRAW);
 127
 128         /*
 129          * Figure out the buffers/features we need:
 130          */
 131
 132         fd_screen_lock(ctx->screen);
 133
 134         if (ctx->dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_ZSA)) {
 135                 if (fd_depth_enabled(ctx)) {
 136                         if (fd_resource(pfb->zsbuf->texture)->valid) {
 137                                 restore_buffers |= FD_BUFFER_DEPTH;
 138                         } else {
 139                                 batch->invalidated |= FD_BUFFER_DEPTH;
 140                         }
 141                         batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
 142                         if (fd_depth_write_enabled(ctx)) {
 143                                 buffers |= FD_BUFFER_DEPTH;
 144                                 resource_written(batch, pfb->zsbuf->texture);
 145                         } else {
 146                                 resource_read(batch, pfb->zsbuf->texture);
 147                         }
 148                 }
 149
 150                 if (fd_stencil_enabled(ctx)) {
 151                         if (fd_resource(pfb->zsbuf->texture)->valid) {
 152                                 restore_buffers |= FD_BUFFER_STENCIL;
 153                         } else {
 154                                 batch->invalidated |= FD_BUFFER_STENCIL;
 155                         }
 156                         batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
 157                         buffers |= FD_BUFFER_STENCIL;
 158                         resource_written(batch, pfb->zsbuf->texture);
 159                 }
 160         }
 161
 162         if (fd_logicop_enabled(ctx))
 163                 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
 164
 165         for (i = 0; i < pfb->nr_cbufs; i++) {
 166                 struct pipe_resource *surf;
 167
 168                 if (!pfb->cbufs[i])
 169                         continue;
 170
 171                 surf = pfb->cbufs[i]->texture;
 172
 173                 if (fd_resource(surf)->valid) {
 174                         restore_buffers |= PIPE_CLEAR_COLOR0 << i;
 175                 } else {
 176                         batch->invalidated |= PIPE_CLEAR_COLOR0 << i;
 177                 }
 178
 179                 buffers |= PIPE_CLEAR_COLOR0 << i;
 180
 181                 if (fd_blend_enabled(ctx, i))
 182                         batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
 183
 184                 if (ctx->dirty & FD_DIRTY_FRAMEBUFFER)
 185                         resource_written(batch, pfb->cbufs[i]->texture);
 186         }
 187
 188         /* Mark SSBOs */
 189         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO) {
 190                 const struct fd_shaderbuf_stateobj *so = &ctx->shaderbuf[PIPE_SHADER_FRAGMENT];
 191
 192                 foreach_bit (i, so->enabled_mask & so->writable_mask)
 193                         resource_written(batch, so->sb[i].buffer);
 194
 195                 foreach_bit (i, so->enabled_mask & ~so->writable_mask)
 196                         resource_read(batch, so->sb[i].buffer);
 197         }
 198
 199         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE) {
 200                 foreach_bit(i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) {
 201                         struct pipe_image_view *img =
 202                                         &ctx->shaderimg[PIPE_SHADER_FRAGMENT].si[i];
 203                         if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 204                                 resource_written(batch, img->resource);
 205                         else
 206                                 resource_read(batch, img->resource);
 207                 }
 208         }
 209
 210         if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_CONST) {
 211                 foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
 212                         resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
 213         }
 214
 215         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_CONST) {
 216                 foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 217                         resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
 218         }
 219
 220         /* Mark VBOs as being read */
 221         if (ctx->dirty & FD_DIRTY_VTXBUF) {
 222                 foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
 223                         assert(!ctx->vtx.vertexbuf.vb[i].is_user_buffer);
 224                         resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer.resource);
 225                 }
 226         }
 227
 228         /* Mark index buffer as being read */
 229         resource_read(batch, indexbuf);
 230
 231         /* Mark indirect draw buffer as being read */
 232         if (info->indirect)
 233                 resource_read(batch, info->indirect->buffer);
 234
 235         /* Mark textures as being read */
 236         if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX) {
 237                 foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
 238                         resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
 239         }
 240
 241         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX) {
 242                 foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
 243                         resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
 244         }
 245
 246         /* Mark streamout buffers as being written.. */
 247         if (ctx->dirty & FD_DIRTY_STREAMOUT) {
 248                 for (i = 0; i < ctx->streamout.num_targets; i++)
 249                         if (ctx->streamout.targets[i])
 250                                 resource_written(batch, ctx->streamout.targets[i]->buffer);
 251         }
 252
 253         resource_written(batch, batch->query_buf);
 254
 255         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 256                 resource_written(batch, aq->prsc);
 257
 258         fd_screen_unlock(ctx->screen);
 259
 260         batch->num_draws++;
 261
 262         /* Counting prims in sw doesn't work for GS and tesselation. For older
 263          * gens we don't have those stages and don't have the hw counters enabled,
 264          * so keep the count accurate for non-patch geometry.
 265          */
 266         if (info->mode != PIPE_PRIM_PATCHES)
 267                 prims = u_reduced_prims_for_vertices(info->mode, info->count);
 268         else
 269                 prims = 0;
 270
 271         ctx->stats.draw_calls++;
 272
 273         /* TODO prims_emitted should be clipped when the stream-out buffer is
 274          * not large enough.  See max_tf_vtx().. probably need to move that
 275          * into common code.  Although a bit more annoying since a2xx doesn't
 276          * use ir3 so no common way to get at the pipe_stream_output_info
 277          * which is needed for this calculation.
 278          */
 279         if (ctx->streamout.num_targets > 0)
 280                 ctx->stats.prims_emitted += prims;
 281         ctx->stats.prims_generated += prims;
 282
 283         /* any buffers that haven't been cleared yet, we need to restore: */
 284         batch->restore |= restore_buffers & (FD_BUFFER_ALL & ~batch->invalidated);
 285         /* and any buffers used, need to be resolved: */
 286         batch->resolve |= buffers;
 287
 288         DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
 289                 pfb->width, pfb->height, batch->num_draws,
 290                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 291                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 292
 293         if (ctx->draw_vbo(ctx, info, index_offset))
 294                 batch->needs_flush = true;
 295
 296         batch->num_vertices += info->count * info->instance_count;
 297
 298         for (i = 0; i < ctx->streamout.num_targets; i++)
 299                 ctx->streamout.offsets[i] += info->count;
 300
 301         if (fd_mesa_debug & FD_DBG_DDRAW)
 302                 fd_context_all_dirty(ctx);
 303
 304         fd_batch_check_size(batch);
 305
 306         if (info == &new_info)
 307                 pipe_resource_reference(&indexbuf, NULL);
 308 }
 309
 310 static void
 311 fd_clear(struct pipe_context *pctx, unsigned buffers, const struct pipe_scissor_state *scissor_state,
 312                 const union pipe_color_union *color, double depth, unsigned stencil)
 313 {
 314         struct fd_context *ctx = fd_context(pctx);
 315         struct fd_batch *batch = fd_context_batch(ctx);
 316         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 317         unsigned cleared_buffers;
 318         int i;
 319
 320         /* TODO: push down the region versions into the tiles */
 321         if (!fd_render_condition_check(pctx))
 322                 return;
 323
 324         fd_fence_ref(&ctx->last_fence, NULL);
 325
 326         if (ctx->in_discard_blit) {
 327                 fd_batch_reset(batch);
 328                 fd_context_all_dirty(ctx);
 329         }
 330
 331         /* pctx->clear() is only for full-surface clears, so scissor is
 332          * equivalent to having GL_SCISSOR_TEST disabled:
 333          */
 334         batch->max_scissor.minx = 0;
 335         batch->max_scissor.miny = 0;
 336         batch->max_scissor.maxx = pfb->width;
 337         batch->max_scissor.maxy = pfb->height;
 338
 339         /* for bookkeeping about which buffers have been cleared (and thus
 340          * can fully or partially skip mem2gmem) we need to ignore buffers
 341          * that have already had a draw, in case apps do silly things like
 342          * clear after draw (ie. if you only clear the color buffer, but
 343          * something like alpha-test causes side effects from the draw in
 344          * the depth buffer, etc)
 345          */
 346         cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
 347         batch->cleared |= buffers;
 348         batch->invalidated |= cleared_buffers;
 349
 350         batch->resolve |= buffers;
 351         batch->needs_flush = true;
 352
 353         fd_screen_lock(ctx->screen);
 354
 355         if (buffers & PIPE_CLEAR_COLOR)
 356                 for (i = 0; i < pfb->nr_cbufs; i++)
 357                         if (buffers & (PIPE_CLEAR_COLOR0 << i))
 358                                 resource_written(batch, pfb->cbufs[i]->texture);
 359
 360         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 361                 resource_written(batch, pfb->zsbuf->texture);
 362                 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
 363         }
 364
 365         resource_written(batch, batch->query_buf);
 366
 367         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 368                 resource_written(batch, aq->prsc);
 369
 370         fd_screen_unlock(ctx->screen);
 371
 372         DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
 373                 pfb->width, pfb->height, depth, stencil,
 374                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 375                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 376
 377         /* if per-gen backend doesn't implement ctx->clear() generic
 378          * blitter clear:
 379          */
 380         bool fallback = true;
 381
 382         if (ctx->clear) {
 383                 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
 384
 385                 if (ctx->clear(ctx, buffers, color, depth, stencil)) {
 386                         if (fd_mesa_debug & FD_DBG_DCLEAR)
 387                                 fd_context_all_dirty(ctx);
 388
 389                         fallback = false;
 390                 }
 391         }
 392
 393         if (fallback) {
 394                 fd_blitter_clear(pctx, buffers, color, depth, stencil);
 395         }
 396
 397         fd_batch_check_size(batch);
 398 }
 399
 400 static void
 401 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
 402                 const union pipe_color_union *color,
 403                 unsigned x, unsigned y, unsigned w, unsigned h,
 404                 bool render_condition_enabled)
 405 {
 406         DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
 407 }
 408
 409 static void
 410 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
 411                 unsigned buffers, double depth, unsigned stencil,
 412                 unsigned x, unsigned y, unsigned w, unsigned h,
 413                 bool render_condition_enabled)
 414 {
 415         DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
 416                         buffers, depth, stencil, x, y, w, h);
 417 }
 418
 419 static void
 420 fd_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
 421 {
 422         struct fd_context *ctx = fd_context(pctx);
 423         const struct fd_shaderbuf_stateobj *so = &ctx->shaderbuf[PIPE_SHADER_COMPUTE];
 424         struct fd_batch *batch, *save_batch = NULL;
 425         unsigned i;
 426
 427         batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
 428         fd_batch_reference(&save_batch, ctx->batch);
 429         fd_batch_reference(&ctx->batch, batch);
 430         fd_context_all_dirty(ctx);
 431
 432         fd_screen_lock(ctx->screen);
 433
 434         /* Mark SSBOs */
 435         foreach_bit (i, so->enabled_mask & so->writable_mask)
 436                 resource_written(batch, so->sb[i].buffer);
 437
 438         foreach_bit (i, so->enabled_mask & ~so->writable_mask)
 439                 resource_read(batch, so->sb[i].buffer);
 440
 441         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) {
 442                 struct pipe_image_view *img =
 443                         &ctx->shaderimg[PIPE_SHADER_COMPUTE].si[i];
 444                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 445                         resource_written(batch, img->resource);
 446                 else
 447                         resource_read(batch, img->resource);
 448         }
 449
 450         /* UBO's are read */
 451         foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 452                 resource_read(batch, ctx->constbuf[PIPE_SHADER_COMPUTE].cb[i].buffer);
 453
 454         /* Mark textures as being read */
 455         foreach_bit(i, ctx->tex[PIPE_SHADER_COMPUTE].valid_textures)
 456                 resource_read(batch, ctx->tex[PIPE_SHADER_COMPUTE].textures[i]->texture);
 457
 458         /* For global buffers, we don't really know if read or written, so assume
 459          * the worst:
 460          */
 461         foreach_bit(i, ctx->global_bindings.enabled_mask)
 462                 resource_written(batch, ctx->global_bindings.buf[i]);
 463
 464         if (info->indirect)
 465                 resource_read(batch, info->indirect);
 466
 467         fd_screen_unlock(ctx->screen);
 468
 469         batch->needs_flush = true;
 470         ctx->launch_grid(ctx, info);
 471
 472         fd_batch_flush(batch);
 473
 474         fd_batch_reference(&ctx->batch, save_batch);
 475         fd_context_all_dirty(ctx);
 476         fd_batch_reference(&save_batch, NULL);
 477         fd_batch_reference(&batch, NULL);
 478 }
 479
 480 void
 481 fd_draw_init(struct pipe_context *pctx)
 482 {
 483         pctx->draw_vbo = fd_draw_vbo;
 484         pctx->clear = fd_clear;
 485         pctx->clear_render_target = fd_clear_render_target;
 486         pctx->clear_depth_stencil = fd_clear_depth_stencil;
 487
 488         if (has_compute(fd_screen(pctx->screen))) {
 489                 pctx->launch_grid = fd_launch_grid;
 490         }
 491 }