2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "pipe/p_state.h"
28 #include "util/u_draw.h"
29 #include "util/u_string.h"
30 #include "util/u_memory.h"
31 #include "util/u_prim.h"
32 #include "util/u_format.h"
33 #include "util/u_helpers.h"
35 #include "freedreno_draw.h"
36 #include "freedreno_context.h"
37 #include "freedreno_fence.h"
38 #include "freedreno_state.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_query_acc.h"
41 #include "freedreno_query_hw.h"
42 #include "freedreno_util.h"
45 resource_read(struct fd_batch
*batch
, struct pipe_resource
*prsc
)
49 fd_batch_resource_used(batch
, fd_resource(prsc
), false);
53 resource_written(struct fd_batch
*batch
, struct pipe_resource
*prsc
)
57 fd_batch_resource_used(batch
, fd_resource(prsc
), true);
61 fd_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
63 struct fd_context
*ctx
= fd_context(pctx
);
64 struct fd_batch
*batch
= fd_context_batch(ctx
);
65 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
66 struct pipe_scissor_state
*scissor
= fd_context_get_scissor(ctx
);
67 unsigned i
, prims
, buffers
= 0, restore_buffers
= 0;
69 /* for debugging problems with indirect draw, it is convenient
70 * to be able to emulate it, to determine if game is feeding us
73 if (info
->indirect
&& (fd_mesa_debug
& FD_DBG_NOINDR
)) {
74 util_draw_indirect(pctx
, info
);
78 if (!info
->count_from_stream_output
&& !info
->indirect
&&
79 !info
->primitive_restart
&&
80 !u_trim_pipe_prim(info
->mode
, (unsigned*)&info
->count
))
83 /* if we supported transform feedback, we'd have to disable this: */
84 if (((scissor
->maxx
- scissor
->minx
) *
85 (scissor
->maxy
- scissor
->miny
)) == 0) {
89 /* TODO: push down the region versions into the tiles */
90 if (!fd_render_condition_check(pctx
))
93 /* emulate unsupported primitives: */
94 if (!fd_supported_prim(ctx
, info
->mode
)) {
95 if (ctx
->streamout
.num_targets
> 0)
96 debug_error("stream-out with emulated prims");
97 util_primconvert_save_rasterizer_state(ctx
->primconvert
, ctx
->rasterizer
);
98 util_primconvert_draw_vbo(ctx
->primconvert
, info
);
102 fd_fence_ref(pctx
->screen
, &ctx
->last_fence
, NULL
);
104 /* Upload a user index buffer. */
105 struct pipe_resource
*indexbuf
= NULL
;
106 unsigned index_offset
= 0;
107 struct pipe_draw_info new_info
;
108 if (info
->index_size
) {
109 if (info
->has_user_indices
) {
110 if (!util_upload_index_buffer(pctx
, info
, &indexbuf
, &index_offset
))
113 new_info
.index
.resource
= indexbuf
;
114 new_info
.has_user_indices
= false;
117 indexbuf
= info
->index
.resource
;
122 fd_batch_reset(batch
);
123 fd_context_all_dirty(ctx
);
126 batch
->blit
= ctx
->in_blit
;
127 batch
->back_blit
= ctx
->in_shadow
;
129 /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
130 * query_buf may not be created yet.
132 fd_batch_set_stage(batch
, FD_STAGE_DRAW
);
135 * Figure out the buffers/features we need:
138 mtx_lock(&ctx
->screen
->lock
);
140 if (ctx
->dirty
& (FD_DIRTY_FRAMEBUFFER
| FD_DIRTY_ZSA
)) {
141 if (fd_depth_enabled(ctx
)) {
142 if (fd_resource(pfb
->zsbuf
->texture
)->valid
) {
143 restore_buffers
|= FD_BUFFER_DEPTH
;
145 batch
->invalidated
|= FD_BUFFER_DEPTH
;
147 batch
->gmem_reason
|= FD_GMEM_DEPTH_ENABLED
;
148 if (fd_depth_write_enabled(ctx
)) {
149 buffers
|= FD_BUFFER_DEPTH
;
150 resource_written(batch
, pfb
->zsbuf
->texture
);
152 resource_read(batch
, pfb
->zsbuf
->texture
);
156 if (fd_stencil_enabled(ctx
)) {
157 if (fd_resource(pfb
->zsbuf
->texture
)->valid
) {
158 restore_buffers
|= FD_BUFFER_STENCIL
;
160 batch
->invalidated
|= FD_BUFFER_STENCIL
;
162 batch
->gmem_reason
|= FD_GMEM_STENCIL_ENABLED
;
163 buffers
|= FD_BUFFER_STENCIL
;
164 resource_written(batch
, pfb
->zsbuf
->texture
);
168 if (fd_logicop_enabled(ctx
))
169 batch
->gmem_reason
|= FD_GMEM_LOGICOP_ENABLED
;
171 for (i
= 0; i
< pfb
->nr_cbufs
; i
++) {
172 struct pipe_resource
*surf
;
177 surf
= pfb
->cbufs
[i
]->texture
;
179 if (fd_resource(surf
)->valid
) {
180 restore_buffers
|= PIPE_CLEAR_COLOR0
<< i
;
182 batch
->invalidated
|= PIPE_CLEAR_COLOR0
<< i
;
185 buffers
|= PIPE_CLEAR_COLOR0
<< i
;
187 if (fd_blend_enabled(ctx
, i
))
188 batch
->gmem_reason
|= FD_GMEM_BLEND_ENABLED
;
190 if (ctx
->dirty
& FD_DIRTY_FRAMEBUFFER
)
191 resource_written(batch
, pfb
->cbufs
[i
]->texture
);
194 /* Mark SSBOs as being written.. we don't actually know which ones are
195 * read vs written, so just assume the worst
197 if (ctx
->dirty_shader
[PIPE_SHADER_FRAGMENT
] & FD_DIRTY_SHADER_SSBO
) {
198 foreach_bit(i
, ctx
->shaderbuf
[PIPE_SHADER_FRAGMENT
].enabled_mask
)
199 resource_written(batch
, ctx
->shaderbuf
[PIPE_SHADER_FRAGMENT
].sb
[i
].buffer
);
202 if (ctx
->dirty_shader
[PIPE_SHADER_FRAGMENT
] & FD_DIRTY_SHADER_IMAGE
) {
203 foreach_bit(i
, ctx
->shaderimg
[PIPE_SHADER_FRAGMENT
].enabled_mask
) {
204 struct pipe_image_view
*img
=
205 &ctx
->shaderimg
[PIPE_SHADER_FRAGMENT
].si
[i
];
206 if (img
->access
& PIPE_IMAGE_ACCESS_WRITE
)
207 resource_written(batch
, img
->resource
);
209 resource_read(batch
, img
->resource
);
213 if (ctx
->dirty_shader
[PIPE_SHADER_VERTEX
] & FD_DIRTY_SHADER_CONST
) {
214 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_VERTEX
].enabled_mask
)
215 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_VERTEX
].cb
[i
].buffer
);
218 if (ctx
->dirty_shader
[PIPE_SHADER_FRAGMENT
] & FD_DIRTY_SHADER_CONST
) {
219 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].enabled_mask
)
220 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
[i
].buffer
);
223 /* Mark VBOs as being read */
224 if (ctx
->dirty
& FD_DIRTY_VTXBUF
) {
225 foreach_bit(i
, ctx
->vtx
.vertexbuf
.enabled_mask
) {
226 assert(!ctx
->vtx
.vertexbuf
.vb
[i
].is_user_buffer
);
227 resource_read(batch
, ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
);
231 /* Mark index buffer as being read */
232 resource_read(batch
, indexbuf
);
234 /* Mark indirect draw buffer as being read */
236 resource_read(batch
, info
->indirect
->buffer
);
238 /* Mark textures as being read */
239 if (ctx
->dirty_shader
[PIPE_SHADER_VERTEX
] & FD_DIRTY_SHADER_TEX
) {
240 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_VERTEX
].valid_textures
)
241 resource_read(batch
, ctx
->tex
[PIPE_SHADER_VERTEX
].textures
[i
]->texture
);
244 if (ctx
->dirty_shader
[PIPE_SHADER_FRAGMENT
] & FD_DIRTY_SHADER_TEX
) {
245 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_FRAGMENT
].valid_textures
)
246 resource_read(batch
, ctx
->tex
[PIPE_SHADER_FRAGMENT
].textures
[i
]->texture
);
249 /* Mark streamout buffers as being written.. */
250 if (ctx
->dirty
& FD_DIRTY_STREAMOUT
) {
251 for (i
= 0; i
< ctx
->streamout
.num_targets
; i
++)
252 if (ctx
->streamout
.targets
[i
])
253 resource_written(batch
, ctx
->streamout
.targets
[i
]->buffer
);
256 resource_written(batch
, batch
->query_buf
);
258 list_for_each_entry(struct fd_acc_query
, aq
, &ctx
->acc_active_queries
, node
)
259 resource_written(batch
, aq
->prsc
);
261 mtx_unlock(&ctx
->screen
->lock
);
265 prims
= u_reduced_prims_for_vertices(info
->mode
, info
->count
);
267 ctx
->stats
.draw_calls
++;
269 /* TODO prims_emitted should be clipped when the stream-out buffer is
270 * not large enough. See max_tf_vtx().. probably need to move that
271 * into common code. Although a bit more annoying since a2xx doesn't
272 * use ir3 so no common way to get at the pipe_stream_output_info
273 * which is needed for this calculation.
275 if (ctx
->streamout
.num_targets
> 0)
276 ctx
->stats
.prims_emitted
+= prims
;
277 ctx
->stats
.prims_generated
+= prims
;
279 /* any buffers that haven't been cleared yet, we need to restore: */
280 batch
->restore
|= restore_buffers
& (FD_BUFFER_ALL
& ~batch
->invalidated
);
281 /* and any buffers used, need to be resolved: */
282 batch
->resolve
|= buffers
;
284 DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch
, buffers
,
285 pfb
->width
, pfb
->height
, batch
->num_draws
,
286 util_format_short_name(pipe_surface_format(pfb
->cbufs
[0])),
287 util_format_short_name(pipe_surface_format(pfb
->zsbuf
)));
289 if (ctx
->draw_vbo(ctx
, info
, index_offset
))
290 batch
->needs_flush
= true;
292 batch
->num_vertices
+= info
->count
* info
->instance_count
;
294 for (i
= 0; i
< ctx
->streamout
.num_targets
; i
++)
295 ctx
->streamout
.offsets
[i
] += info
->count
;
297 if (fd_mesa_debug
& FD_DBG_DDRAW
)
298 fd_context_all_dirty(ctx
);
300 fd_batch_check_size(batch
);
302 if (info
== &new_info
)
303 pipe_resource_reference(&indexbuf
, NULL
);
306 /* Generic clear implementation (partially) using u_blitter: */
308 fd_blitter_clear(struct pipe_context
*pctx
, unsigned buffers
,
309 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
311 struct fd_context
*ctx
= fd_context(pctx
);
312 struct pipe_framebuffer_state
*pfb
= &ctx
->batch
->framebuffer
;
313 struct blitter_context
*blitter
= ctx
->blitter
;
315 fd_blitter_pipe_begin(ctx
, false, true, FD_STAGE_CLEAR
);
317 util_blitter_common_clear_setup(blitter
, pfb
->width
, pfb
->height
,
318 buffers
, NULL
, NULL
);
320 struct pipe_stencil_ref sr
= {
321 .ref_value
= { stencil
& 0xff }
323 pctx
->set_stencil_ref(pctx
, &sr
);
325 struct pipe_constant_buffer cb
= {
327 .user_buffer
= &color
->ui
,
329 pctx
->set_constant_buffer(pctx
, PIPE_SHADER_FRAGMENT
, 0, &cb
);
331 if (!ctx
->clear_rs_state
) {
332 const struct pipe_rasterizer_state tmpl
= {
333 .cull_face
= PIPE_FACE_NONE
,
334 .half_pixel_center
= 1,
335 .bottom_edge_rule
= 1,
337 .depth_clip_near
= 1,
340 ctx
->clear_rs_state
= pctx
->create_rasterizer_state(pctx
, &tmpl
);
342 pctx
->bind_rasterizer_state(pctx
, ctx
->clear_rs_state
);
344 struct pipe_viewport_state vp
= {
345 .scale
= { 0.5f
* pfb
->width
, -0.5f
* pfb
->height
, depth
},
346 .translate
= { 0.5f
* pfb
->width
, 0.5f
* pfb
->height
, 0.0f
},
348 pctx
->set_viewport_states(pctx
, 0, 1, &vp
);
350 pctx
->bind_vertex_elements_state(pctx
, ctx
->solid_vbuf_state
.vtx
);
351 pctx
->set_vertex_buffers(pctx
, blitter
->vb_slot
, 1,
352 &ctx
->solid_vbuf_state
.vertexbuf
.vb
[0]);
353 pctx
->set_stream_output_targets(pctx
, 0, NULL
, NULL
);
354 pctx
->bind_vs_state(pctx
, ctx
->solid_prog
.vp
);
355 pctx
->bind_fs_state(pctx
, ctx
->solid_prog
.fp
);
357 struct pipe_draw_info info
= {
358 .mode
= PIPE_PRIM_MAX
, /* maps to DI_PT_RECTLIST */
363 ctx
->draw_vbo(ctx
, &info
, 0);
365 util_blitter_restore_constant_buffer_state(blitter
);
366 util_blitter_restore_vertex_states(blitter
);
367 util_blitter_restore_fragment_states(blitter
);
368 util_blitter_restore_textures(blitter
);
369 util_blitter_restore_fb_state(blitter
);
370 util_blitter_restore_render_cond(blitter
);
371 util_blitter_unset_running_flag(blitter
);
373 fd_blitter_pipe_end(ctx
);
377 fd_clear(struct pipe_context
*pctx
, unsigned buffers
,
378 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
380 struct fd_context
*ctx
= fd_context(pctx
);
381 struct fd_batch
*batch
= fd_context_batch(ctx
);
382 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
383 unsigned cleared_buffers
;
386 /* TODO: push down the region versions into the tiles */
387 if (!fd_render_condition_check(pctx
))
390 fd_fence_ref(pctx
->screen
, &ctx
->last_fence
, NULL
);
393 fd_batch_reset(batch
);
394 fd_context_all_dirty(ctx
);
397 /* pctx->clear() is only for full-surface clears, so scissor is
398 * equivalent to having GL_SCISSOR_TEST disabled:
400 batch
->max_scissor
.minx
= 0;
401 batch
->max_scissor
.miny
= 0;
402 batch
->max_scissor
.maxx
= pfb
->width
;
403 batch
->max_scissor
.maxy
= pfb
->height
;
405 /* for bookkeeping about which buffers have been cleared (and thus
406 * can fully or partially skip mem2gmem) we need to ignore buffers
407 * that have already had a draw, in case apps do silly things like
408 * clear after draw (ie. if you only clear the color buffer, but
409 * something like alpha-test causes side effects from the draw in
410 * the depth buffer, etc)
412 cleared_buffers
= buffers
& (FD_BUFFER_ALL
& ~batch
->restore
);
413 batch
->cleared
|= buffers
;
414 batch
->invalidated
|= cleared_buffers
;
416 batch
->resolve
|= buffers
;
417 batch
->needs_flush
= true;
419 mtx_lock(&ctx
->screen
->lock
);
421 if (buffers
& PIPE_CLEAR_COLOR
)
422 for (i
= 0; i
< pfb
->nr_cbufs
; i
++)
423 if (buffers
& (PIPE_CLEAR_COLOR0
<< i
))
424 resource_written(batch
, pfb
->cbufs
[i
]->texture
);
426 if (buffers
& (PIPE_CLEAR_DEPTH
| PIPE_CLEAR_STENCIL
)) {
427 resource_written(batch
, pfb
->zsbuf
->texture
);
428 batch
->gmem_reason
|= FD_GMEM_CLEARS_DEPTH_STENCIL
;
431 resource_written(batch
, batch
->query_buf
);
433 list_for_each_entry(struct fd_acc_query
, aq
, &ctx
->acc_active_queries
, node
)
434 resource_written(batch
, aq
->prsc
);
436 mtx_unlock(&ctx
->screen
->lock
);
438 DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch
, buffers
,
439 pfb
->width
, pfb
->height
, depth
, stencil
,
440 util_format_short_name(pipe_surface_format(pfb
->cbufs
[0])),
441 util_format_short_name(pipe_surface_format(pfb
->zsbuf
)));
443 /* if per-gen backend doesn't implement ctx->clear() generic
446 bool fallback
= true;
449 fd_batch_set_stage(batch
, FD_STAGE_CLEAR
);
451 if (ctx
->clear(ctx
, buffers
, color
, depth
, stencil
)) {
452 if (fd_mesa_debug
& FD_DBG_DCLEAR
)
453 fd_context_all_dirty(ctx
);
460 fd_blitter_clear(pctx
, buffers
, color
, depth
, stencil
);
463 fd_batch_check_size(batch
);
467 fd_clear_render_target(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
468 const union pipe_color_union
*color
,
469 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
470 bool render_condition_enabled
)
472 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x
, y
, w
, h
);
476 fd_clear_depth_stencil(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
477 unsigned buffers
, double depth
, unsigned stencil
,
478 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
479 bool render_condition_enabled
)
481 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
482 buffers
, depth
, stencil
, x
, y
, w
, h
);
486 fd_launch_grid(struct pipe_context
*pctx
, const struct pipe_grid_info
*info
)
488 struct fd_context
*ctx
= fd_context(pctx
);
489 struct fd_batch
*batch
, *save_batch
= NULL
;
492 batch
= fd_bc_alloc_batch(&ctx
->screen
->batch_cache
, ctx
, true);
493 fd_batch_reference(&save_batch
, ctx
->batch
);
494 fd_batch_reference(&ctx
->batch
, batch
);
495 fd_context_all_dirty(ctx
);
497 mtx_lock(&ctx
->screen
->lock
);
499 /* Mark SSBOs as being written.. we don't actually know which ones are
500 * read vs written, so just assume the worst
502 foreach_bit(i
, ctx
->shaderbuf
[PIPE_SHADER_COMPUTE
].enabled_mask
)
503 resource_written(batch
, ctx
->shaderbuf
[PIPE_SHADER_COMPUTE
].sb
[i
].buffer
);
505 foreach_bit(i
, ctx
->shaderimg
[PIPE_SHADER_COMPUTE
].enabled_mask
) {
506 struct pipe_image_view
*img
=
507 &ctx
->shaderimg
[PIPE_SHADER_COMPUTE
].si
[i
];
508 if (img
->access
& PIPE_IMAGE_ACCESS_WRITE
)
509 resource_written(batch
, img
->resource
);
511 resource_read(batch
, img
->resource
);
515 foreach_bit(i
, ctx
->constbuf
[PIPE_SHADER_COMPUTE
].enabled_mask
)
516 resource_read(batch
, ctx
->constbuf
[PIPE_SHADER_COMPUTE
].cb
[i
].buffer
);
518 /* Mark textures as being read */
519 foreach_bit(i
, ctx
->tex
[PIPE_SHADER_COMPUTE
].valid_textures
)
520 resource_read(batch
, ctx
->tex
[PIPE_SHADER_COMPUTE
].textures
[i
]->texture
);
522 /* For global buffers, we don't really know if read or written, so assume
525 foreach_bit(i
, ctx
->global_bindings
.enabled_mask
)
526 resource_written(batch
, ctx
->global_bindings
.buf
[i
]);
529 resource_read(batch
, info
->indirect
);
531 mtx_unlock(&ctx
->screen
->lock
);
533 batch
->needs_flush
= true;
534 ctx
->launch_grid(ctx
, info
);
536 fd_batch_flush(batch
, false, false);
538 fd_batch_reference(&ctx
->batch
, save_batch
);
539 fd_context_all_dirty(ctx
);
540 fd_batch_reference(&save_batch
, NULL
);
541 fd_batch_reference(&batch
, NULL
);
545 fd_draw_init(struct pipe_context
*pctx
)
547 pctx
->draw_vbo
= fd_draw_vbo
;
548 pctx
->clear
= fd_clear
;
549 pctx
->clear_render_target
= fd_clear_render_target
;
550 pctx
->clear_depth_stencil
= fd_clear_depth_stencil
;
552 if (has_compute(fd_screen(pctx
->screen
))) {
553 pctx
->launch_grid
= fd_launch_grid
;