src/gallium/drivers/freedreno/freedreno_draw.c

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_draw.h"
  29 #include "util/u_string.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_prim.h"
  32 #include "util/u_format.h"
  33 #include "util/u_helpers.h"
  34
  35 #include "freedreno_draw.h"
  36 #include "freedreno_context.h"
  37 #include "freedreno_fence.h"
  38 #include "freedreno_state.h"
  39 #include "freedreno_resource.h"
  40 #include "freedreno_query_acc.h"
  41 #include "freedreno_query_hw.h"
  42 #include "freedreno_util.h"
  43
  44 static void
  45 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
  46 {
  47         if (!prsc)
  48                 return;
  49         fd_batch_resource_used(batch, fd_resource(prsc), false);
  50 }
  51
  52 static void
  53 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
  54 {
  55         if (!prsc)
  56                 return;
  57         fd_batch_resource_used(batch, fd_resource(prsc), true);
  58 }
  59
  60 static void
  61 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
  62 {
  63         struct fd_context *ctx = fd_context(pctx);
  64         struct fd_batch *batch = fd_context_batch(ctx);
  65         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
  66         struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
  67         unsigned i, prims, buffers = 0, restore_buffers = 0;
  68
  69         /* for debugging problems with indirect draw, it is convenient
  70          * to be able to emulate it, to determine if game is feeding us
  71          * bogus data:
  72          */
  73         if (info->indirect && (fd_mesa_debug & FD_DBG_NOINDR)) {
  74                 util_draw_indirect(pctx, info);
  75                 return;
  76         }
  77
  78         if (!info->count_from_stream_output && !info->indirect &&
  79             !info->primitive_restart &&
  80             !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
  81                 return;
  82
  83         /* if we supported transform feedback, we'd have to disable this: */
  84         if (((scissor->maxx - scissor->minx) *
  85                         (scissor->maxy - scissor->miny)) == 0) {
  86                 return;
  87         }
  88
  89         /* TODO: push down the region versions into the tiles */
  90         if (!fd_render_condition_check(pctx))
  91                 return;
  92
  93         /* emulate unsupported primitives: */
  94         if (!fd_supported_prim(ctx, info->mode)) {
  95                 if (ctx->streamout.num_targets > 0)
  96                         debug_error("stream-out with emulated prims");
  97                 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
  98                 util_primconvert_draw_vbo(ctx->primconvert, info);
  99                 return;
 100         }
 101
 102         fd_fence_ref(pctx->screen, &ctx->last_fence, NULL);
 103
 104         /* Upload a user index buffer. */
 105         struct pipe_resource *indexbuf = NULL;
 106         unsigned index_offset = 0;
 107         struct pipe_draw_info new_info;
 108         if (info->index_size) {
 109                 if (info->has_user_indices) {
 110                         if (!util_upload_index_buffer(pctx, info, &indexbuf, &index_offset))
 111                                 return;
 112                         new_info = *info;
 113                         new_info.index.resource = indexbuf;
 114                         new_info.has_user_indices = false;
 115                         info = &new_info;
 116                 } else {
 117                         indexbuf = info->index.resource;
 118                 }
 119         }
 120
 121         if (ctx->in_blit) {
 122                 fd_batch_reset(batch);
 123                 fd_context_all_dirty(ctx);
 124         }
 125
 126         batch->blit = ctx->in_blit;
 127         batch->back_blit = ctx->in_shadow;
 128
 129         /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
 130          * query_buf may not be created yet.
 131          */
 132         fd_batch_set_stage(batch, FD_STAGE_DRAW);
 133
 134         /*
 135          * Figure out the buffers/features we need:
 136          */
 137
 138         mtx_lock(&ctx->screen->lock);
 139
 140         if (ctx->dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_ZSA)) {
 141                 if (fd_depth_enabled(ctx)) {
 142                         if (fd_resource(pfb->zsbuf->texture)->valid) {
 143                                 restore_buffers |= FD_BUFFER_DEPTH;
 144                         } else {
 145                                 batch->invalidated |= FD_BUFFER_DEPTH;
 146                         }
 147                         buffers |= FD_BUFFER_DEPTH;
 148                         resource_written(batch, pfb->zsbuf->texture);
 149                         batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
 150                 }
 151
 152                 if (fd_stencil_enabled(ctx)) {
 153                         if (fd_resource(pfb->zsbuf->texture)->valid) {
 154                                 restore_buffers |= FD_BUFFER_STENCIL;
 155                         } else {
 156                                 batch->invalidated |= FD_BUFFER_STENCIL;
 157                         }
 158                         buffers |= FD_BUFFER_STENCIL;
 159                         resource_written(batch, pfb->zsbuf->texture);
 160                         batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
 161                 }
 162         }
 163
 164         if (ctx->dirty & FD_DIRTY_FRAMEBUFFER) {
 165                 for (i = 0; i < pfb->nr_cbufs; i++) {
 166                         if (!pfb->cbufs[i])
 167                                 continue;
 168
 169                         resource_written(batch, pfb->cbufs[i]->texture);
 170                 }
 171         }
 172
 173         if (fd_logicop_enabled(ctx))
 174                 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
 175
 176         for (i = 0; i < pfb->nr_cbufs; i++) {
 177                 struct pipe_resource *surf;
 178
 179                 if (!pfb->cbufs[i])
 180                         continue;
 181
 182                 surf = pfb->cbufs[i]->texture;
 183
 184                 if (fd_resource(surf)->valid) {
 185                         restore_buffers |= PIPE_CLEAR_COLOR0 << i;
 186                 } else {
 187                         batch->invalidated |= PIPE_CLEAR_COLOR0 << i;
 188                 }
 189
 190                 buffers |= PIPE_CLEAR_COLOR0 << i;
 191
 192                 if (fd_blend_enabled(ctx, i))
 193                         batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
 194         }
 195
 196         /* Mark SSBOs as being written.. we don't actually know which ones are
 197          * read vs written, so just assume the worst
 198          */
 199         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO) {
 200                 foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 201                                 resource_written(batch, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].sb[i].buffer);
 202         }
 203
 204         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE) {
 205                 foreach_bit(i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) {
 206                         struct pipe_image_view *img =
 207                                         &ctx->shaderimg[PIPE_SHADER_FRAGMENT].si[i];
 208                         if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 209                                 resource_written(batch, img->resource);
 210                         else
 211                                 resource_read(batch, img->resource);
 212                 }
 213         }
 214
 215         if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_CONST) {
 216                 foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
 217                         resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
 218         }
 219
 220         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_CONST) {
 221                 foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 222                         resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
 223         }
 224
 225         /* Mark VBOs as being read */
 226         if (ctx->dirty & FD_DIRTY_VTXBUF) {
 227                 foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
 228                         assert(!ctx->vtx.vertexbuf.vb[i].is_user_buffer);
 229                         resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer.resource);
 230                 }
 231         }
 232
 233         /* Mark index buffer as being read */
 234         resource_read(batch, indexbuf);
 235
 236         /* Mark indirect draw buffer as being read */
 237         if (info->indirect)
 238                 resource_read(batch, info->indirect->buffer);
 239
 240         /* Mark textures as being read */
 241         if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX) {
 242                 foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
 243                         resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
 244         }
 245
 246         if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX) {
 247                 foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
 248                         resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
 249         }
 250
 251         /* Mark streamout buffers as being written.. */
 252         if (ctx->dirty & FD_DIRTY_STREAMOUT) {
 253                 for (i = 0; i < ctx->streamout.num_targets; i++)
 254                         if (ctx->streamout.targets[i])
 255                                 resource_written(batch, ctx->streamout.targets[i]->buffer);
 256         }
 257
 258         resource_written(batch, batch->query_buf);
 259
 260         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 261                 resource_written(batch, aq->prsc);
 262
 263         mtx_unlock(&ctx->screen->lock);
 264
 265         batch->num_draws++;
 266
 267         prims = u_reduced_prims_for_vertices(info->mode, info->count);
 268
 269         ctx->stats.draw_calls++;
 270
 271         /* TODO prims_emitted should be clipped when the stream-out buffer is
 272          * not large enough.  See max_tf_vtx().. probably need to move that
 273          * into common code.  Although a bit more annoying since a2xx doesn't
 274          * use ir3 so no common way to get at the pipe_stream_output_info
 275          * which is needed for this calculation.
 276          */
 277         if (ctx->streamout.num_targets > 0)
 278                 ctx->stats.prims_emitted += prims;
 279         ctx->stats.prims_generated += prims;
 280
 281         /* any buffers that haven't been cleared yet, we need to restore: */
 282         batch->restore |= restore_buffers & (FD_BUFFER_ALL & ~batch->invalidated);
 283         /* and any buffers used, need to be resolved: */
 284         batch->resolve |= buffers;
 285
 286         DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
 287                 pfb->width, pfb->height, batch->num_draws,
 288                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 289                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 290
 291         if (ctx->draw_vbo(ctx, info, index_offset))
 292                 batch->needs_flush = true;
 293
 294         for (i = 0; i < ctx->streamout.num_targets; i++)
 295                 ctx->streamout.offsets[i] += info->count;
 296
 297         if (fd_mesa_debug & FD_DBG_DDRAW)
 298                 fd_context_all_dirty(ctx);
 299
 300         fd_batch_check_size(batch);
 301
 302         if (info == &new_info)
 303                 pipe_resource_reference(&indexbuf, NULL);
 304 }
 305
 306 /* Generic clear implementation (partially) using u_blitter: */
 307 static void
 308 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
 309                 const union pipe_color_union *color, double depth, unsigned stencil)
 310 {
 311         struct fd_context *ctx = fd_context(pctx);
 312         struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
 313         struct blitter_context *blitter = ctx->blitter;
 314
 315         fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
 316
 317         util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
 318                         buffers, NULL, NULL);
 319
 320         struct pipe_stencil_ref sr = {
 321                 .ref_value = { stencil & 0xff }
 322         };
 323         pctx->set_stencil_ref(pctx, &sr);
 324
 325         struct pipe_constant_buffer cb = {
 326                 .buffer_size = 16,
 327                 .user_buffer = &color->ui,
 328         };
 329         pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
 330
 331         if (!ctx->clear_rs_state) {
 332                 const struct pipe_rasterizer_state tmpl = {
 333                         .cull_face = PIPE_FACE_NONE,
 334                         .half_pixel_center = 1,
 335                         .bottom_edge_rule = 1,
 336                         .flatshade = 1,
 337                         .depth_clip_near = 1,
 338                         .depth_clip_far = 1,
 339                 };
 340                 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
 341         }
 342         pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
 343
 344         struct pipe_viewport_state vp = {
 345                 .scale     = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
 346                 .translate = { 0.5f * pfb->width,  0.5f * pfb->height, 0.0f },
 347         };
 348         pctx->set_viewport_states(pctx, 0, 1, &vp);
 349
 350         pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
 351         pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
 352                         &ctx->solid_vbuf_state.vertexbuf.vb[0]);
 353         pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
 354         pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
 355         pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
 356
 357         struct pipe_draw_info info = {
 358                 .mode = PIPE_PRIM_MAX,    /* maps to DI_PT_RECTLIST */
 359                 .count = 2,
 360                 .max_index = 1,
 361                 .instance_count = 1,
 362         };
 363         ctx->draw_vbo(ctx, &info, 0);
 364
 365         util_blitter_restore_constant_buffer_state(blitter);
 366         util_blitter_restore_vertex_states(blitter);
 367         util_blitter_restore_fragment_states(blitter);
 368         util_blitter_restore_textures(blitter);
 369         util_blitter_restore_fb_state(blitter);
 370         util_blitter_restore_render_cond(blitter);
 371         util_blitter_unset_running_flag(blitter);
 372
 373         fd_blitter_pipe_end(ctx);
 374 }
 375
 376 static void
 377 fd_clear(struct pipe_context *pctx, unsigned buffers,
 378                 const union pipe_color_union *color, double depth, unsigned stencil)
 379 {
 380         struct fd_context *ctx = fd_context(pctx);
 381         struct fd_batch *batch = fd_context_batch(ctx);
 382         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 383         unsigned cleared_buffers;
 384         int i;
 385
 386         /* TODO: push down the region versions into the tiles */
 387         if (!fd_render_condition_check(pctx))
 388                 return;
 389
 390         fd_fence_ref(pctx->screen, &ctx->last_fence, NULL);
 391
 392         if (ctx->in_blit) {
 393                 fd_batch_reset(batch);
 394                 fd_context_all_dirty(ctx);
 395         }
 396
 397         /* pctx->clear() is only for full-surface clears, so scissor is
 398          * equivalent to having GL_SCISSOR_TEST disabled:
 399          */
 400         batch->max_scissor.minx = 0;
 401         batch->max_scissor.miny = 0;
 402         batch->max_scissor.maxx = pfb->width;
 403         batch->max_scissor.maxy = pfb->height;
 404
 405         /* for bookkeeping about which buffers have been cleared (and thus
 406          * can fully or partially skip mem2gmem) we need to ignore buffers
 407          * that have already had a draw, in case apps do silly things like
 408          * clear after draw (ie. if you only clear the color buffer, but
 409          * something like alpha-test causes side effects from the draw in
 410          * the depth buffer, etc)
 411          */
 412         cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
 413         batch->cleared |= cleared_buffers;
 414         batch->invalidated |= cleared_buffers;
 415
 416         batch->resolve |= buffers;
 417         batch->needs_flush = true;
 418
 419         mtx_lock(&ctx->screen->lock);
 420
 421         if (buffers & PIPE_CLEAR_COLOR)
 422                 for (i = 0; i < pfb->nr_cbufs; i++)
 423                         if (buffers & (PIPE_CLEAR_COLOR0 << i))
 424                                 resource_written(batch, pfb->cbufs[i]->texture);
 425
 426         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 427                 resource_written(batch, pfb->zsbuf->texture);
 428                 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
 429         }
 430
 431         resource_written(batch, batch->query_buf);
 432
 433         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 434                 resource_written(batch, aq->prsc);
 435
 436         mtx_unlock(&ctx->screen->lock);
 437
 438         DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
 439                 pfb->width, pfb->height, depth, stencil,
 440                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 441                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 442
 443         /* if per-gen backend doesn't implement ctx->clear() generic
 444          * blitter clear:
 445          */
 446         bool fallback = true;
 447
 448         if (ctx->clear) {
 449                 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
 450
 451                 if (ctx->clear(ctx, buffers, color, depth, stencil)) {
 452                         if (fd_mesa_debug & FD_DBG_DCLEAR)
 453                                 fd_context_all_dirty(ctx);
 454
 455                         fallback = false;
 456                 }
 457         }
 458
 459         if (fallback) {
 460                 fd_blitter_clear(pctx, buffers, color, depth, stencil);
 461         }
 462
 463         fd_batch_check_size(batch);
 464 }
 465
 466 static void
 467 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
 468                 const union pipe_color_union *color,
 469                 unsigned x, unsigned y, unsigned w, unsigned h,
 470                 bool render_condition_enabled)
 471 {
 472         DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
 473 }
 474
 475 static void
 476 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
 477                 unsigned buffers, double depth, unsigned stencil,
 478                 unsigned x, unsigned y, unsigned w, unsigned h,
 479                 bool render_condition_enabled)
 480 {
 481         DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
 482                         buffers, depth, stencil, x, y, w, h);
 483 }
 484
 485 static void
 486 fd_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
 487 {
 488         struct fd_context *ctx = fd_context(pctx);
 489         struct fd_batch *batch, *save_batch = NULL;
 490         unsigned i;
 491
 492         batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
 493         fd_batch_reference(&save_batch, ctx->batch);
 494         fd_batch_reference(&ctx->batch, batch);
 495         fd_context_all_dirty(ctx);
 496
 497         mtx_lock(&ctx->screen->lock);
 498
 499         /* Mark SSBOs as being written.. we don't actually know which ones are
 500          * read vs written, so just assume the worst
 501          */
 502         foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 503                 resource_written(batch, ctx->shaderbuf[PIPE_SHADER_COMPUTE].sb[i].buffer);
 504
 505         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) {
 506                 struct pipe_image_view *img =
 507                         &ctx->shaderimg[PIPE_SHADER_COMPUTE].si[i];
 508                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 509                         resource_written(batch, img->resource);
 510                 else
 511                         resource_read(batch, img->resource);
 512         }
 513
 514         /* UBO's are read */
 515         foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 516                 resource_read(batch, ctx->constbuf[PIPE_SHADER_COMPUTE].cb[i].buffer);
 517
 518         /* Mark textures as being read */
 519         foreach_bit(i, ctx->tex[PIPE_SHADER_COMPUTE].valid_textures)
 520                 resource_read(batch, ctx->tex[PIPE_SHADER_COMPUTE].textures[i]->texture);
 521
 522         /* For global buffers, we don't really know if read or written, so assume
 523          * the worst:
 524          */
 525         foreach_bit(i, ctx->global_bindings.enabled_mask)
 526                 resource_written(batch, ctx->global_bindings.buf[i]);
 527
 528         if (info->indirect)
 529                 resource_read(batch, info->indirect);
 530
 531         mtx_unlock(&ctx->screen->lock);
 532
 533         batch->needs_flush = true;
 534         ctx->launch_grid(ctx, info);
 535
 536         fd_batch_flush(batch, false, false);
 537
 538         fd_batch_reference(&ctx->batch, save_batch);
 539         fd_context_all_dirty(ctx);
 540         fd_batch_reference(&save_batch, NULL);
 541         fd_batch_reference(&batch, NULL);
 542 }
 543
 544 void
 545 fd_draw_init(struct pipe_context *pctx)
 546 {
 547         pctx->draw_vbo = fd_draw_vbo;
 548         pctx->clear = fd_clear;
 549         pctx->clear_render_target = fd_clear_render_target;
 550         pctx->clear_depth_stencil = fd_clear_depth_stencil;
 551
 552         if (has_compute(fd_screen(pctx->screen))) {
 553                 pctx->launch_grid = fd_launch_grid;
 554         }
 555 }