freedreno: drop ring arg from _set_stage()
[mesa.git] / src / gallium / drivers / freedreno / freedreno_draw.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33 #include "util/u_format.h"
34 #include "util/u_helpers.h"
35
36 #include "freedreno_draw.h"
37 #include "freedreno_context.h"
38 #include "freedreno_state.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_query_acc.h"
41 #include "freedreno_query_hw.h"
42 #include "freedreno_util.h"
43
44 static void
45 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
46 {
47 if (!prsc)
48 return;
49 fd_batch_resource_used(batch, fd_resource(prsc), false);
50 }
51
52 static void
53 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
54 {
55 if (!prsc)
56 return;
57 fd_batch_resource_used(batch, fd_resource(prsc), true);
58 }
59
60 static void
61 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
62 {
63 struct fd_context *ctx = fd_context(pctx);
64 struct fd_batch *batch = ctx->batch;
65 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
66 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
67 unsigned i, prims, buffers = 0;
68
69 if (!info->count_from_stream_output && !info->indirect &&
70 !info->primitive_restart &&
71 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
72 return;
73
74 /* if we supported transform feedback, we'd have to disable this: */
75 if (((scissor->maxx - scissor->minx) *
76 (scissor->maxy - scissor->miny)) == 0) {
77 return;
78 }
79
80 /* TODO: push down the region versions into the tiles */
81 if (!fd_render_condition_check(pctx))
82 return;
83
84 /* emulate unsupported primitives: */
85 if (!fd_supported_prim(ctx, info->mode)) {
86 if (ctx->streamout.num_targets > 0)
87 debug_error("stream-out with emulated prims");
88 util_primconvert_save_index_buffer(ctx->primconvert, &ctx->indexbuf);
89 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
90 util_primconvert_draw_vbo(ctx->primconvert, info);
91 return;
92 }
93
94 /* Upload a user index buffer. */
95 struct pipe_index_buffer ibuffer_saved = {};
96 if (info->indexed && ctx->indexbuf.user_buffer &&
97 !util_save_and_upload_index_buffer(pctx, info, &ctx->indexbuf,
98 &ibuffer_saved)) {
99 return;
100 }
101
102 if (ctx->in_blit) {
103 fd_batch_reset(batch);
104 fd_context_all_dirty(ctx);
105 }
106
107 batch->blit = ctx->in_blit;
108 batch->back_blit = ctx->in_shadow;
109
110 /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
111 * query_buf may not be created yet.
112 */
113 fd_batch_set_stage(batch, FD_STAGE_DRAW);
114
115 /*
116 * Figure out the buffers/features we need:
117 */
118
119 mtx_lock(&ctx->screen->lock);
120
121 if (fd_depth_enabled(ctx)) {
122 buffers |= FD_BUFFER_DEPTH;
123 resource_written(batch, pfb->zsbuf->texture);
124 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
125 }
126
127 if (fd_stencil_enabled(ctx)) {
128 buffers |= FD_BUFFER_STENCIL;
129 resource_written(batch, pfb->zsbuf->texture);
130 batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
131 }
132
133 if (fd_logicop_enabled(ctx))
134 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
135
136 for (i = 0; i < pfb->nr_cbufs; i++) {
137 struct pipe_resource *surf;
138
139 if (!pfb->cbufs[i])
140 continue;
141
142 surf = pfb->cbufs[i]->texture;
143
144 resource_written(batch, surf);
145 buffers |= PIPE_CLEAR_COLOR0 << i;
146
147 if (surf->nr_samples > 1)
148 batch->gmem_reason |= FD_GMEM_MSAA_ENABLED;
149
150 if (fd_blend_enabled(ctx, i))
151 batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
152 }
153
154 foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
155 resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
156 foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
157 resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
158
159 /* Mark VBOs as being read */
160 foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
161 assert(!ctx->vtx.vertexbuf.vb[i].user_buffer);
162 resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer);
163 }
164
165 /* Mark index buffer as being read */
166 resource_read(batch, ctx->indexbuf.buffer);
167
168 /* Mark textures as being read */
169 foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
170 resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
171 foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
172 resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
173
174 /* Mark streamout buffers as being written.. */
175 for (i = 0; i < ctx->streamout.num_targets; i++)
176 if (ctx->streamout.targets[i])
177 resource_written(batch, ctx->streamout.targets[i]->buffer);
178
179 resource_written(batch, batch->query_buf);
180
181 list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
182 resource_written(batch, aq->prsc);
183
184 mtx_unlock(&ctx->screen->lock);
185
186 batch->num_draws++;
187
188 prims = u_reduced_prims_for_vertices(info->mode, info->count);
189
190 ctx->stats.draw_calls++;
191
192 /* TODO prims_emitted should be clipped when the stream-out buffer is
193 * not large enough. See max_tf_vtx().. probably need to move that
194 * into common code. Although a bit more annoying since a2xx doesn't
195 * use ir3 so no common way to get at the pipe_stream_output_info
196 * which is needed for this calculation.
197 */
198 if (ctx->streamout.num_targets > 0)
199 ctx->stats.prims_emitted += prims;
200 ctx->stats.prims_generated += prims;
201
202 /* any buffers that haven't been cleared yet, we need to restore: */
203 batch->restore |= buffers & (FD_BUFFER_ALL & ~batch->cleared);
204 /* and any buffers used, need to be resolved: */
205 batch->resolve |= buffers;
206
207 DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
208 pfb->width, pfb->height, batch->num_draws,
209 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
210 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
211
212 if (ctx->draw_vbo(ctx, info))
213 batch->needs_flush = true;
214
215 for (i = 0; i < ctx->streamout.num_targets; i++)
216 ctx->streamout.offsets[i] += info->count;
217
218 if (fd_mesa_debug & FD_DBG_DDRAW)
219 fd_context_all_dirty(ctx);
220
221 fd_batch_check_size(batch);
222
223 if (info->indexed && ibuffer_saved.user_buffer)
224 pctx->set_index_buffer(pctx, &ibuffer_saved);
225 }
226
227 /* Generic clear implementation (partially) using u_blitter: */
228 static void
229 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
230 const union pipe_color_union *color, double depth, unsigned stencil)
231 {
232 struct fd_context *ctx = fd_context(pctx);
233 struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
234 struct blitter_context *blitter = ctx->blitter;
235
236 fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
237
238 util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
239 buffers, NULL, NULL);
240
241 struct pipe_stencil_ref sr = {
242 .ref_value = { stencil & 0xff }
243 };
244 pctx->set_stencil_ref(pctx, &sr);
245
246 struct pipe_constant_buffer cb = {
247 .buffer_size = 16,
248 .user_buffer = &color->ui,
249 };
250 pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
251
252 if (!ctx->clear_rs_state) {
253 const struct pipe_rasterizer_state tmpl = {
254 .cull_face = PIPE_FACE_NONE,
255 .half_pixel_center = 1,
256 .bottom_edge_rule = 1,
257 .flatshade = 1,
258 .depth_clip = 1,
259 };
260 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
261 }
262 pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
263
264 struct pipe_viewport_state vp = {
265 .scale = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
266 .translate = { 0.5f * pfb->width, 0.5f * pfb->height, 0.0f },
267 };
268 pctx->set_viewport_states(pctx, 0, 1, &vp);
269
270 pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
271 pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
272 &ctx->solid_vbuf_state.vertexbuf.vb[0]);
273 pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
274 pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
275 pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
276
277 struct pipe_draw_info info = {
278 .mode = PIPE_PRIM_MAX, /* maps to DI_PT_RECTLIST */
279 .count = 2,
280 .max_index = 1,
281 .instance_count = 1,
282 };
283 ctx->draw_vbo(ctx, &info);
284
285 util_blitter_restore_constant_buffer_state(blitter);
286 util_blitter_restore_vertex_states(blitter);
287 util_blitter_restore_fragment_states(blitter);
288 util_blitter_restore_textures(blitter);
289 util_blitter_restore_fb_state(blitter);
290 util_blitter_restore_render_cond(blitter);
291 util_blitter_unset_running_flag(blitter);
292
293 fd_blitter_pipe_end(ctx);
294 }
295
296 /* TODO figure out how to make better use of existing state mechanism
297 * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
298 * track of what state really actually changes, and (b) reduce the code
299 * in the a2xx/a3xx parts.
300 */
301
302 static void
303 fd_clear(struct pipe_context *pctx, unsigned buffers,
304 const union pipe_color_union *color, double depth, unsigned stencil)
305 {
306 struct fd_context *ctx = fd_context(pctx);
307 struct fd_batch *batch = ctx->batch;
308 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
309 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
310 unsigned cleared_buffers;
311 int i;
312
313 /* TODO: push down the region versions into the tiles */
314 if (!fd_render_condition_check(pctx))
315 return;
316
317 if (ctx->in_blit) {
318 fd_batch_reset(batch);
319 fd_context_all_dirty(ctx);
320 }
321
322 /* for bookkeeping about which buffers have been cleared (and thus
323 * can fully or partially skip mem2gmem) we need to ignore buffers
324 * that have already had a draw, in case apps do silly things like
325 * clear after draw (ie. if you only clear the color buffer, but
326 * something like alpha-test causes side effects from the draw in
327 * the depth buffer, etc)
328 */
329 cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
330
331 /* do we have full-screen scissor? */
332 if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) {
333 batch->cleared |= cleared_buffers;
334 } else {
335 batch->partial_cleared |= cleared_buffers;
336 if (cleared_buffers & PIPE_CLEAR_COLOR)
337 batch->cleared_scissor.color = *scissor;
338 if (cleared_buffers & PIPE_CLEAR_DEPTH)
339 batch->cleared_scissor.depth = *scissor;
340 if (cleared_buffers & PIPE_CLEAR_STENCIL)
341 batch->cleared_scissor.stencil = *scissor;
342 }
343 batch->resolve |= buffers;
344 batch->needs_flush = true;
345
346 mtx_lock(&ctx->screen->lock);
347
348 if (buffers & PIPE_CLEAR_COLOR)
349 for (i = 0; i < pfb->nr_cbufs; i++)
350 if (buffers & (PIPE_CLEAR_COLOR0 << i))
351 resource_written(batch, pfb->cbufs[i]->texture);
352
353 if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
354 resource_written(batch, pfb->zsbuf->texture);
355 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
356 }
357
358 resource_written(batch, batch->query_buf);
359
360 list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
361 resource_written(batch, aq->prsc);
362
363 mtx_unlock(&ctx->screen->lock);
364
365 DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
366 pfb->width, pfb->height, depth, stencil,
367 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
368 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
369
370 /* if per-gen backend doesn't implement ctx->clear() generic
371 * blitter clear:
372 */
373 if (!ctx->clear) {
374 fd_blitter_clear(pctx, buffers, color, depth, stencil);
375 return;
376 }
377
378 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
379
380 ctx->clear(ctx, buffers, color, depth, stencil);
381
382 if (fd_mesa_debug & FD_DBG_DCLEAR)
383 fd_context_all_dirty(ctx);
384 }
385
386 static void
387 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
388 const union pipe_color_union *color,
389 unsigned x, unsigned y, unsigned w, unsigned h,
390 bool render_condition_enabled)
391 {
392 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
393 }
394
395 static void
396 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
397 unsigned buffers, double depth, unsigned stencil,
398 unsigned x, unsigned y, unsigned w, unsigned h,
399 bool render_condition_enabled)
400 {
401 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
402 buffers, depth, stencil, x, y, w, h);
403 }
404
405 void
406 fd_draw_init(struct pipe_context *pctx)
407 {
408 pctx->draw_vbo = fd_draw_vbo;
409 pctx->clear = fd_clear;
410 pctx->clear_render_target = fd_clear_render_target;
411 pctx->clear_depth_stencil = fd_clear_depth_stencil;
412 }