src/gallium/drivers/freedreno/freedreno_draw.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "pipe/p_state.h"
  30 #include "util/u_draw.h"
  31 #include "util/u_string.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_prim.h"
  34 #include "util/u_format.h"
  35 #include "util/u_helpers.h"
  36
  37 #include "freedreno_draw.h"
  38 #include "freedreno_context.h"
  39 #include "freedreno_state.h"
  40 #include "freedreno_resource.h"
  41 #include "freedreno_query_acc.h"
  42 #include "freedreno_query_hw.h"
  43 #include "freedreno_util.h"
  44
  45 static void
  46 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
  47 {
  48         if (!prsc)
  49                 return;
  50         fd_batch_resource_used(batch, fd_resource(prsc), false);
  51 }
  52
  53 static void
  54 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
  55 {
  56         if (!prsc)
  57                 return;
  58         fd_batch_resource_used(batch, fd_resource(prsc), true);
  59 }
  60
  61 static void
  62 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
  63 {
  64         struct fd_context *ctx = fd_context(pctx);
  65         struct fd_batch *batch = fd_context_batch(ctx);
  66         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
  67         struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
  68         unsigned i, prims, buffers = 0, restore_buffers = 0;
  69
  70         /* for debugging problems with indirect draw, it is convenient
  71          * to be able to emulate it, to determine if game is feeding us
  72          * bogus data:
  73          */
  74         if (info->indirect && (fd_mesa_debug & FD_DBG_NOINDR)) {
  75                 util_draw_indirect(pctx, info);
  76                 return;
  77         }
  78
  79         if (!info->count_from_stream_output && !info->indirect &&
  80             !info->primitive_restart &&
  81             !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
  82                 return;
  83
  84         /* if we supported transform feedback, we'd have to disable this: */
  85         if (((scissor->maxx - scissor->minx) *
  86                         (scissor->maxy - scissor->miny)) == 0) {
  87                 return;
  88         }
  89
  90         /* TODO: push down the region versions into the tiles */
  91         if (!fd_render_condition_check(pctx))
  92                 return;
  93
  94         /* emulate unsupported primitives: */
  95         if (!fd_supported_prim(ctx, info->mode)) {
  96                 if (ctx->streamout.num_targets > 0)
  97                         debug_error("stream-out with emulated prims");
  98                 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
  99                 util_primconvert_draw_vbo(ctx->primconvert, info);
 100                 return;
 101         }
 102
 103         /* Upload a user index buffer. */
 104         struct pipe_resource *indexbuf = NULL;
 105         unsigned index_offset = 0;
 106         struct pipe_draw_info new_info;
 107         if (info->index_size) {
 108                 if (info->has_user_indices) {
 109                         if (!util_upload_index_buffer(pctx, info, &indexbuf, &index_offset))
 110                                 return;
 111                         new_info = *info;
 112                         new_info.index.resource = indexbuf;
 113                         new_info.has_user_indices = false;
 114                         info = &new_info;
 115                 } else {
 116                         indexbuf = info->index.resource;
 117                 }
 118         }
 119
 120         if (ctx->in_blit) {
 121                 fd_batch_reset(batch);
 122                 fd_context_all_dirty(ctx);
 123         }
 124
 125         batch->blit = ctx->in_blit;
 126         batch->back_blit = ctx->in_shadow;
 127
 128         /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
 129          * query_buf may not be created yet.
 130          */
 131         fd_batch_set_stage(batch, FD_STAGE_DRAW);
 132
 133         /*
 134          * Figure out the buffers/features we need:
 135          */
 136
 137         mtx_lock(&ctx->screen->lock);
 138
 139         if (fd_depth_enabled(ctx)) {
 140                 if (fd_resource(pfb->zsbuf->texture)->valid)
 141                         restore_buffers |= FD_BUFFER_DEPTH;
 142                 buffers |= FD_BUFFER_DEPTH;
 143                 resource_written(batch, pfb->zsbuf->texture);
 144                 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
 145         }
 146
 147         if (fd_stencil_enabled(ctx)) {
 148                 if (fd_resource(pfb->zsbuf->texture)->valid)
 149                         restore_buffers |= FD_BUFFER_STENCIL;
 150                 buffers |= FD_BUFFER_STENCIL;
 151                 resource_written(batch, pfb->zsbuf->texture);
 152                 batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
 153         }
 154
 155         if (fd_logicop_enabled(ctx))
 156                 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
 157
 158         for (i = 0; i < pfb->nr_cbufs; i++) {
 159                 struct pipe_resource *surf;
 160
 161                 if (!pfb->cbufs[i])
 162                         continue;
 163
 164                 surf = pfb->cbufs[i]->texture;
 165
 166                 resource_written(batch, surf);
 167
 168                 if (fd_resource(surf)->valid)
 169                         restore_buffers |= PIPE_CLEAR_COLOR0 << i;
 170
 171                 buffers |= PIPE_CLEAR_COLOR0 << i;
 172
 173                 if (fd_blend_enabled(ctx, i))
 174                         batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
 175         }
 176
 177         /* Mark SSBOs as being written.. we don't actually know which ones are
 178          * read vs written, so just assume the worst
 179          */
 180         foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 181                 resource_written(batch, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].sb[i].buffer);
 182
 183         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) {
 184                 struct pipe_image_view *img =
 185                         &ctx->shaderimg[PIPE_SHADER_FRAGMENT].si[i];
 186                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 187                         resource_written(batch, img->resource);
 188                 else
 189                         resource_read(batch, img->resource);
 190         }
 191
 192         foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
 193                 resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
 194         foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 195                 resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
 196
 197         /* Mark VBOs as being read */
 198         foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
 199                 assert(!ctx->vtx.vertexbuf.vb[i].is_user_buffer);
 200                 resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer.resource);
 201         }
 202
 203         /* Mark index buffer as being read */
 204         resource_read(batch, indexbuf);
 205
 206         /* Mark indirect draw buffer as being read */
 207         if (info->indirect)
 208                 resource_read(batch, info->indirect->buffer);
 209
 210         /* Mark textures as being read */
 211         foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
 212                 resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
 213         foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
 214                 resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
 215
 216         /* Mark streamout buffers as being written.. */
 217         for (i = 0; i < ctx->streamout.num_targets; i++)
 218                 if (ctx->streamout.targets[i])
 219                         resource_written(batch, ctx->streamout.targets[i]->buffer);
 220
 221         resource_written(batch, batch->query_buf);
 222
 223         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 224                 resource_written(batch, aq->prsc);
 225
 226         mtx_unlock(&ctx->screen->lock);
 227
 228         batch->num_draws++;
 229
 230         prims = u_reduced_prims_for_vertices(info->mode, info->count);
 231
 232         ctx->stats.draw_calls++;
 233
 234         /* TODO prims_emitted should be clipped when the stream-out buffer is
 235          * not large enough.  See max_tf_vtx().. probably need to move that
 236          * into common code.  Although a bit more annoying since a2xx doesn't
 237          * use ir3 so no common way to get at the pipe_stream_output_info
 238          * which is needed for this calculation.
 239          */
 240         if (ctx->streamout.num_targets > 0)
 241                 ctx->stats.prims_emitted += prims;
 242         ctx->stats.prims_generated += prims;
 243
 244         /* any buffers that haven't been cleared yet, we need to restore: */
 245         batch->restore |= restore_buffers & (FD_BUFFER_ALL & ~batch->cleared);
 246         /* and any buffers used, need to be resolved: */
 247         batch->resolve |= buffers;
 248
 249         DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
 250                 pfb->width, pfb->height, batch->num_draws,
 251                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 252                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 253
 254         if (ctx->draw_vbo(ctx, info, index_offset))
 255                 batch->needs_flush = true;
 256
 257         for (i = 0; i < ctx->streamout.num_targets; i++)
 258                 ctx->streamout.offsets[i] += info->count;
 259
 260         if (fd_mesa_debug & FD_DBG_DDRAW)
 261                 fd_context_all_dirty(ctx);
 262
 263         fd_batch_check_size(batch);
 264
 265         if (info == &new_info)
 266                 pipe_resource_reference(&indexbuf, NULL);
 267 }
 268
 269 /* Generic clear implementation (partially) using u_blitter: */
 270 static void
 271 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
 272                 const union pipe_color_union *color, double depth, unsigned stencil)
 273 {
 274         struct fd_context *ctx = fd_context(pctx);
 275         struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
 276         struct blitter_context *blitter = ctx->blitter;
 277
 278         fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
 279
 280         util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
 281                         buffers, NULL, NULL);
 282
 283         struct pipe_stencil_ref sr = {
 284                 .ref_value = { stencil & 0xff }
 285         };
 286         pctx->set_stencil_ref(pctx, &sr);
 287
 288         struct pipe_constant_buffer cb = {
 289                 .buffer_size = 16,
 290                 .user_buffer = &color->ui,
 291         };
 292         pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
 293
 294         if (!ctx->clear_rs_state) {
 295                 const struct pipe_rasterizer_state tmpl = {
 296                         .cull_face = PIPE_FACE_NONE,
 297                         .half_pixel_center = 1,
 298                         .bottom_edge_rule = 1,
 299                         .flatshade = 1,
 300                         .depth_clip_near = 1,
 301                         .depth_clip_far = 1,
 302                 };
 303                 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
 304         }
 305         pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
 306
 307         struct pipe_viewport_state vp = {
 308                 .scale     = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
 309                 .translate = { 0.5f * pfb->width,  0.5f * pfb->height, 0.0f },
 310         };
 311         pctx->set_viewport_states(pctx, 0, 1, &vp);
 312
 313         pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
 314         pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
 315                         &ctx->solid_vbuf_state.vertexbuf.vb[0]);
 316         pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
 317         pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
 318         pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
 319
 320         struct pipe_draw_info info = {
 321                 .mode = PIPE_PRIM_MAX,    /* maps to DI_PT_RECTLIST */
 322                 .count = 2,
 323                 .max_index = 1,
 324                 .instance_count = 1,
 325         };
 326         ctx->draw_vbo(ctx, &info, 0);
 327
 328         util_blitter_restore_constant_buffer_state(blitter);
 329         util_blitter_restore_vertex_states(blitter);
 330         util_blitter_restore_fragment_states(blitter);
 331         util_blitter_restore_textures(blitter);
 332         util_blitter_restore_fb_state(blitter);
 333         util_blitter_restore_render_cond(blitter);
 334         util_blitter_unset_running_flag(blitter);
 335
 336         fd_blitter_pipe_end(ctx);
 337 }
 338
 339 static void
 340 fd_clear(struct pipe_context *pctx, unsigned buffers,
 341                 const union pipe_color_union *color, double depth, unsigned stencil)
 342 {
 343         struct fd_context *ctx = fd_context(pctx);
 344         struct fd_batch *batch = fd_context_batch(ctx);
 345         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 346         unsigned cleared_buffers;
 347         int i;
 348
 349         /* TODO: push down the region versions into the tiles */
 350         if (!fd_render_condition_check(pctx))
 351                 return;
 352
 353         if (ctx->in_blit) {
 354                 fd_batch_reset(batch);
 355                 fd_context_all_dirty(ctx);
 356         }
 357
 358         /* pctx->clear() is only for full-surface clears, so scissor is
 359          * equivalent to having GL_SCISSOR_TEST disabled:
 360          */
 361         batch->max_scissor.minx = 0;
 362         batch->max_scissor.miny = 0;
 363         batch->max_scissor.maxx = pfb->width;
 364         batch->max_scissor.maxy = pfb->height;
 365
 366         /* for bookkeeping about which buffers have been cleared (and thus
 367          * can fully or partially skip mem2gmem) we need to ignore buffers
 368          * that have already had a draw, in case apps do silly things like
 369          * clear after draw (ie. if you only clear the color buffer, but
 370          * something like alpha-test causes side effects from the draw in
 371          * the depth buffer, etc)
 372          */
 373         cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
 374         batch->cleared |= cleared_buffers;
 375
 376         batch->resolve |= buffers;
 377         batch->needs_flush = true;
 378
 379         mtx_lock(&ctx->screen->lock);
 380
 381         if (buffers & PIPE_CLEAR_COLOR)
 382                 for (i = 0; i < pfb->nr_cbufs; i++)
 383                         if (buffers & (PIPE_CLEAR_COLOR0 << i))
 384                                 resource_written(batch, pfb->cbufs[i]->texture);
 385
 386         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 387                 resource_written(batch, pfb->zsbuf->texture);
 388                 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
 389         }
 390
 391         resource_written(batch, batch->query_buf);
 392
 393         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 394                 resource_written(batch, aq->prsc);
 395
 396         mtx_unlock(&ctx->screen->lock);
 397
 398         DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
 399                 pfb->width, pfb->height, depth, stencil,
 400                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 401                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 402
 403         /* if per-gen backend doesn't implement ctx->clear() generic
 404          * blitter clear:
 405          */
 406         bool fallback = true;
 407
 408         if (ctx->clear) {
 409                 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
 410
 411                 if (ctx->clear(ctx, buffers, color, depth, stencil)) {
 412                         if (fd_mesa_debug & FD_DBG_DCLEAR)
 413                                 fd_context_all_dirty(ctx);
 414
 415                         fallback = false;
 416                 }
 417         }
 418
 419         if (fallback) {
 420                 fd_blitter_clear(pctx, buffers, color, depth, stencil);
 421         }
 422
 423         fd_batch_check_size(batch);
 424 }
 425
 426 static void
 427 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
 428                 const union pipe_color_union *color,
 429                 unsigned x, unsigned y, unsigned w, unsigned h,
 430                 bool render_condition_enabled)
 431 {
 432         DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
 433 }
 434
 435 static void
 436 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
 437                 unsigned buffers, double depth, unsigned stencil,
 438                 unsigned x, unsigned y, unsigned w, unsigned h,
 439                 bool render_condition_enabled)
 440 {
 441         DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
 442                         buffers, depth, stencil, x, y, w, h);
 443 }
 444
 445 static void
 446 fd_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
 447 {
 448         struct fd_context *ctx = fd_context(pctx);
 449         struct fd_batch *batch, *save_batch = NULL;
 450         unsigned i;
 451
 452         batch = fd_batch_create(ctx, true);
 453         fd_batch_reference(&save_batch, ctx->batch);
 454         fd_batch_reference(&ctx->batch, batch);
 455
 456         mtx_lock(&ctx->screen->lock);
 457
 458         /* Mark SSBOs as being written.. we don't actually know which ones are
 459          * read vs written, so just assume the worst
 460          */
 461         foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 462                 resource_read(batch, ctx->shaderbuf[PIPE_SHADER_COMPUTE].sb[i].buffer);
 463
 464         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) {
 465                 struct pipe_image_view *img =
 466                         &ctx->shaderimg[PIPE_SHADER_COMPUTE].si[i];
 467                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 468                         resource_written(batch, img->resource);
 469                 else
 470                         resource_read(batch, img->resource);
 471         }
 472
 473         /* UBO's are read */
 474         foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 475                 resource_read(batch, ctx->constbuf[PIPE_SHADER_COMPUTE].cb[i].buffer);
 476
 477         /* Mark textures as being read */
 478         foreach_bit(i, ctx->tex[PIPE_SHADER_COMPUTE].valid_textures)
 479                 resource_read(batch, ctx->tex[PIPE_SHADER_COMPUTE].textures[i]->texture);
 480
 481         /* For global buffers, we don't really know if read or written, so assume
 482          * the worst:
 483          */
 484         foreach_bit(i, ctx->global_bindings.enabled_mask)
 485                 resource_written(batch, ctx->global_bindings.buf[i]);
 486
 487         if (info->indirect)
 488                 resource_read(batch, info->indirect);
 489
 490         mtx_unlock(&ctx->screen->lock);
 491
 492         batch->needs_flush = true;
 493         ctx->launch_grid(ctx, info);
 494
 495         fd_batch_flush(batch, false, false);
 496
 497         fd_batch_reference(&ctx->batch, save_batch);
 498         fd_batch_reference(&save_batch, NULL);
 499 }
 500
 501 void
 502 fd_draw_init(struct pipe_context *pctx)
 503 {
 504         pctx->draw_vbo = fd_draw_vbo;
 505         pctx->clear = fd_clear;
 506         pctx->clear_render_target = fd_clear_render_target;
 507         pctx->clear_depth_stencil = fd_clear_depth_stencil;
 508
 509         if (has_compute(fd_screen(pctx->screen))) {
 510                 pctx->launch_grid = fd_launch_grid;
 511         }
 512 }