gallium: fold u_trim_pipe_prim call from st/mesa to drivers
[mesa.git] / src / gallium / drivers / freedreno / freedreno_draw.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33 #include "util/u_format.h"
34 #include "util/u_helpers.h"
35
36 #include "freedreno_draw.h"
37 #include "freedreno_context.h"
38 #include "freedreno_state.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_query_hw.h"
41 #include "freedreno_util.h"
42
43 static void
44 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
45 {
46 if (!prsc)
47 return;
48 fd_batch_resource_used(batch, fd_resource(prsc), false);
49 }
50
51 static void
52 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
53 {
54 if (!prsc)
55 return;
56 fd_batch_resource_used(batch, fd_resource(prsc), true);
57 }
58
59 static void
60 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
61 {
62 struct fd_context *ctx = fd_context(pctx);
63 struct fd_batch *batch = ctx->batch;
64 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
65 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
66 unsigned i, prims, buffers = 0;
67
68 if (!info->count_from_stream_output && !info->indirect &&
69 !info->primitive_restart &&
70 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
71 return;
72
73 /* if we supported transform feedback, we'd have to disable this: */
74 if (((scissor->maxx - scissor->minx) *
75 (scissor->maxy - scissor->miny)) == 0) {
76 return;
77 }
78
79 /* TODO: push down the region versions into the tiles */
80 if (!fd_render_condition_check(pctx))
81 return;
82
83 /* emulate unsupported primitives: */
84 if (!fd_supported_prim(ctx, info->mode)) {
85 if (ctx->streamout.num_targets > 0)
86 debug_error("stream-out with emulated prims");
87 util_primconvert_save_index_buffer(ctx->primconvert, &ctx->indexbuf);
88 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
89 util_primconvert_draw_vbo(ctx->primconvert, info);
90 return;
91 }
92
93 /* Upload a user index buffer. */
94 struct pipe_index_buffer ibuffer_saved = {};
95 if (info->indexed && ctx->indexbuf.user_buffer &&
96 !util_save_and_upload_index_buffer(pctx, info, &ctx->indexbuf,
97 &ibuffer_saved)) {
98 return;
99 }
100
101 if (ctx->in_blit) {
102 fd_batch_reset(batch);
103 fd_context_all_dirty(ctx);
104 }
105
106 batch->blit = ctx->in_blit;
107 batch->back_blit = ctx->in_shadow;
108
109 /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
110 * query_buf may not be created yet.
111 */
112 fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_DRAW);
113
114 /*
115 * Figure out the buffers/features we need:
116 */
117
118 mtx_lock(&ctx->screen->lock);
119
120 if (fd_depth_enabled(ctx)) {
121 buffers |= FD_BUFFER_DEPTH;
122 resource_written(batch, pfb->zsbuf->texture);
123 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
124 }
125
126 if (fd_stencil_enabled(ctx)) {
127 buffers |= FD_BUFFER_STENCIL;
128 resource_written(batch, pfb->zsbuf->texture);
129 batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
130 }
131
132 if (fd_logicop_enabled(ctx))
133 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
134
135 for (i = 0; i < pfb->nr_cbufs; i++) {
136 struct pipe_resource *surf;
137
138 if (!pfb->cbufs[i])
139 continue;
140
141 surf = pfb->cbufs[i]->texture;
142
143 resource_written(batch, surf);
144 buffers |= PIPE_CLEAR_COLOR0 << i;
145
146 if (surf->nr_samples > 1)
147 batch->gmem_reason |= FD_GMEM_MSAA_ENABLED;
148
149 if (fd_blend_enabled(ctx, i))
150 batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
151 }
152
153 foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
154 resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
155 foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
156 resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
157
158 /* Mark VBOs as being read */
159 foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
160 assert(!ctx->vtx.vertexbuf.vb[i].user_buffer);
161 resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer);
162 }
163
164 /* Mark index buffer as being read */
165 resource_read(batch, ctx->indexbuf.buffer);
166
167 /* Mark textures as being read */
168 foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
169 resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
170 foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
171 resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
172
173 /* Mark streamout buffers as being written.. */
174 for (i = 0; i < ctx->streamout.num_targets; i++)
175 if (ctx->streamout.targets[i])
176 resource_written(batch, ctx->streamout.targets[i]->buffer);
177
178 resource_written(batch, batch->query_buf);
179
180 mtx_unlock(&ctx->screen->lock);
181
182 batch->num_draws++;
183
184 prims = u_reduced_prims_for_vertices(info->mode, info->count);
185
186 ctx->stats.draw_calls++;
187
188 /* TODO prims_emitted should be clipped when the stream-out buffer is
189 * not large enough. See max_tf_vtx().. probably need to move that
190 * into common code. Although a bit more annoying since a2xx doesn't
191 * use ir3 so no common way to get at the pipe_stream_output_info
192 * which is needed for this calculation.
193 */
194 if (ctx->streamout.num_targets > 0)
195 ctx->stats.prims_emitted += prims;
196 ctx->stats.prims_generated += prims;
197
198 /* any buffers that haven't been cleared yet, we need to restore: */
199 batch->restore |= buffers & (FD_BUFFER_ALL & ~batch->cleared);
200 /* and any buffers used, need to be resolved: */
201 batch->resolve |= buffers;
202
203 DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
204 pfb->width, pfb->height, batch->num_draws,
205 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
206 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
207
208 if (ctx->draw_vbo(ctx, info))
209 batch->needs_flush = true;
210
211 for (i = 0; i < ctx->streamout.num_targets; i++)
212 ctx->streamout.offsets[i] += info->count;
213
214 if (fd_mesa_debug & FD_DBG_DDRAW)
215 fd_context_all_dirty(ctx);
216
217 fd_batch_check_size(batch);
218
219 if (info->indexed && ibuffer_saved.user_buffer)
220 pctx->set_index_buffer(pctx, &ibuffer_saved);
221 }
222
223 /* Generic clear implementation (partially) using u_blitter: */
224 static void
225 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
226 const union pipe_color_union *color, double depth, unsigned stencil)
227 {
228 struct fd_context *ctx = fd_context(pctx);
229 struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
230 struct blitter_context *blitter = ctx->blitter;
231
232 fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
233
234 util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
235 buffers, NULL, NULL);
236
237 struct pipe_stencil_ref sr = {
238 .ref_value = { stencil & 0xff }
239 };
240 pctx->set_stencil_ref(pctx, &sr);
241
242 struct pipe_constant_buffer cb = {
243 .buffer_size = 16,
244 .user_buffer = &color->ui,
245 };
246 pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
247
248 if (!ctx->clear_rs_state) {
249 const struct pipe_rasterizer_state tmpl = {
250 .cull_face = PIPE_FACE_NONE,
251 .half_pixel_center = 1,
252 .bottom_edge_rule = 1,
253 .flatshade = 1,
254 .depth_clip = 1,
255 };
256 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
257 }
258 pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
259
260 struct pipe_viewport_state vp = {
261 .scale = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
262 .translate = { 0.5f * pfb->width, 0.5f * pfb->height, 0.0f },
263 };
264 pctx->set_viewport_states(pctx, 0, 1, &vp);
265
266 pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
267 pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
268 &ctx->solid_vbuf_state.vertexbuf.vb[0]);
269 pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
270 pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
271 pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
272
273 struct pipe_draw_info info = {
274 .mode = PIPE_PRIM_MAX, /* maps to DI_PT_RECTLIST */
275 .count = 2,
276 .max_index = 1,
277 .instance_count = 1,
278 };
279 ctx->draw_vbo(ctx, &info);
280
281 util_blitter_restore_constant_buffer_state(blitter);
282 util_blitter_restore_vertex_states(blitter);
283 util_blitter_restore_fragment_states(blitter);
284 util_blitter_restore_textures(blitter);
285 util_blitter_restore_fb_state(blitter);
286 util_blitter_restore_render_cond(blitter);
287 util_blitter_unset_running_flag(blitter);
288
289 fd_blitter_pipe_end(ctx);
290 }
291
292 /* TODO figure out how to make better use of existing state mechanism
293 * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
294 * track of what state really actually changes, and (b) reduce the code
295 * in the a2xx/a3xx parts.
296 */
297
298 static void
299 fd_clear(struct pipe_context *pctx, unsigned buffers,
300 const union pipe_color_union *color, double depth, unsigned stencil)
301 {
302 struct fd_context *ctx = fd_context(pctx);
303 struct fd_batch *batch = ctx->batch;
304 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
305 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
306 unsigned cleared_buffers;
307 int i;
308
309 /* TODO: push down the region versions into the tiles */
310 if (!fd_render_condition_check(pctx))
311 return;
312
313 if (ctx->in_blit) {
314 fd_batch_reset(batch);
315 fd_context_all_dirty(ctx);
316 }
317
318 /* for bookkeeping about which buffers have been cleared (and thus
319 * can fully or partially skip mem2gmem) we need to ignore buffers
320 * that have already had a draw, in case apps do silly things like
321 * clear after draw (ie. if you only clear the color buffer, but
322 * something like alpha-test causes side effects from the draw in
323 * the depth buffer, etc)
324 */
325 cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
326
327 /* do we have full-screen scissor? */
328 if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) {
329 batch->cleared |= cleared_buffers;
330 } else {
331 batch->partial_cleared |= cleared_buffers;
332 if (cleared_buffers & PIPE_CLEAR_COLOR)
333 batch->cleared_scissor.color = *scissor;
334 if (cleared_buffers & PIPE_CLEAR_DEPTH)
335 batch->cleared_scissor.depth = *scissor;
336 if (cleared_buffers & PIPE_CLEAR_STENCIL)
337 batch->cleared_scissor.stencil = *scissor;
338 }
339 batch->resolve |= buffers;
340 batch->needs_flush = true;
341
342 mtx_lock(&ctx->screen->lock);
343
344 if (buffers & PIPE_CLEAR_COLOR)
345 for (i = 0; i < pfb->nr_cbufs; i++)
346 if (buffers & (PIPE_CLEAR_COLOR0 << i))
347 resource_written(batch, pfb->cbufs[i]->texture);
348
349 if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
350 resource_written(batch, pfb->zsbuf->texture);
351 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
352 }
353
354 resource_written(batch, batch->query_buf);
355
356 mtx_unlock(&ctx->screen->lock);
357
358 DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
359 pfb->width, pfb->height, depth, stencil,
360 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
361 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
362
363 /* if per-gen backend doesn't implement ctx->clear() generic
364 * blitter clear:
365 */
366 if (!ctx->clear) {
367 fd_blitter_clear(pctx, buffers, color, depth, stencil);
368 return;
369 }
370
371 fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_CLEAR);
372
373 ctx->clear(ctx, buffers, color, depth, stencil);
374
375 if (fd_mesa_debug & FD_DBG_DCLEAR)
376 fd_context_all_dirty(ctx);
377 }
378
379 static void
380 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
381 const union pipe_color_union *color,
382 unsigned x, unsigned y, unsigned w, unsigned h,
383 bool render_condition_enabled)
384 {
385 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
386 }
387
388 static void
389 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
390 unsigned buffers, double depth, unsigned stencil,
391 unsigned x, unsigned y, unsigned w, unsigned h,
392 bool render_condition_enabled)
393 {
394 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
395 buffers, depth, stencil, x, y, w, h);
396 }
397
398 void
399 fd_draw_init(struct pipe_context *pctx)
400 {
401 pctx->draw_vbo = fd_draw_vbo;
402 pctx->clear = fd_clear;
403 pctx->clear_render_target = fd_clear_render_target;
404 pctx->clear_depth_stencil = fd_clear_depth_stencil;
405 }