freedreno/a3xx: support for hw binning pass
[mesa.git] / src / gallium / drivers / freedreno / freedreno_draw.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33 #include "util/u_format.h"
34
35 #include "freedreno_draw.h"
36 #include "freedreno_context.h"
37 #include "freedreno_state.h"
38 #include "freedreno_resource.h"
39 #include "freedreno_util.h"
40
41
42 static enum pc_di_index_size
43 size2indextype(unsigned index_size)
44 {
45 switch (index_size) {
46 case 1: return INDEX_SIZE_8_BIT;
47 case 2: return INDEX_SIZE_16_BIT;
48 case 4: return INDEX_SIZE_32_BIT;
49 }
50 DBG("unsupported index size: %d", index_size);
51 assert(0);
52 return INDEX_SIZE_IGN;
53 }
54
55 /* this is same for a2xx/a3xx, so split into helper: */
56 void
57 fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
58 enum pc_di_vis_cull_mode vismode,
59 const struct pipe_draw_info *info)
60 {
61 struct pipe_index_buffer *idx = &ctx->indexbuf;
62 struct fd_bo *idx_bo = NULL;
63 enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
64 enum pc_di_src_sel src_sel;
65 uint32_t idx_size, idx_offset;
66
67 if (info->indexed) {
68 assert(!idx->user_buffer);
69
70 idx_bo = fd_resource(idx->buffer)->bo;
71 idx_type = size2indextype(idx->index_size);
72 idx_size = idx->index_size * info->count;
73 idx_offset = idx->offset;
74 src_sel = DI_SRC_SEL_DMA;
75 } else {
76 idx_bo = NULL;
77 idx_type = INDEX_SIZE_IGN;
78 idx_size = 0;
79 idx_offset = 0;
80 src_sel = DI_SRC_SEL_AUTO_INDEX;
81 }
82
83 fd_draw(ctx, ring, ctx->primtypes[info->mode], vismode, src_sel,
84 info->count, idx_type, idx_size, idx_offset, idx_bo);
85 }
86
87 static void
88 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
89 {
90 struct fd_context *ctx = fd_context(pctx);
91 struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
92 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
93 unsigned i, buffers = 0;
94
95 /* if we supported transform feedback, we'd have to disable this: */
96 if (((scissor->maxx - scissor->minx) *
97 (scissor->maxy - scissor->miny)) == 0) {
98 return;
99 }
100
101 /* emulate unsupported primitives: */
102 if (!fd_supported_prim(ctx, info->mode)) {
103 util_primconvert_save_index_buffer(ctx->primconvert, &ctx->indexbuf);
104 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
105 util_primconvert_draw_vbo(ctx->primconvert, info);
106 return;
107 }
108
109 ctx->needs_flush = true;
110
111 /*
112 * Figure out the buffers/features we need:
113 */
114
115 if (fd_depth_enabled(ctx)) {
116 buffers |= FD_BUFFER_DEPTH;
117 fd_resource(pfb->zsbuf->texture)->dirty = true;
118 ctx->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
119 }
120
121 if (fd_stencil_enabled(ctx)) {
122 buffers |= FD_BUFFER_STENCIL;
123 fd_resource(pfb->zsbuf->texture)->dirty = true;
124 ctx->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
125 }
126
127 if (fd_logicop_enabled(ctx))
128 ctx->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
129
130 for (i = 0; i < pfb->nr_cbufs; i++) {
131 struct pipe_resource *surf = pfb->cbufs[i]->texture;
132
133 fd_resource(surf)->dirty = true;
134 buffers |= FD_BUFFER_COLOR;
135
136 if (surf->nr_samples > 1)
137 ctx->gmem_reason |= FD_GMEM_MSAA_ENABLED;
138
139 if (fd_blend_enabled(ctx, i))
140 ctx->gmem_reason |= FD_GMEM_BLEND_ENABLED;
141 }
142
143 ctx->num_draws++;
144
145 /* any buffers that haven't been cleared, we need to restore: */
146 ctx->restore |= buffers & (FD_BUFFER_ALL & ~ctx->cleared);
147 /* and any buffers used, need to be resolved: */
148 ctx->resolve |= buffers;
149
150 ctx->draw(ctx, info);
151 }
152
153 /* TODO figure out how to make better use of existing state mechanism
154 * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
155 * track of what state really actually changes, and (b) reduce the code
156 * in the a2xx/a3xx parts.
157 */
158
159 static void
160 fd_clear(struct pipe_context *pctx, unsigned buffers,
161 const union pipe_color_union *color, double depth, unsigned stencil)
162 {
163 struct fd_context *ctx = fd_context(pctx);
164 struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
165
166 ctx->cleared |= buffers;
167 ctx->resolve |= buffers;
168 ctx->needs_flush = true;
169
170 if (buffers & PIPE_CLEAR_COLOR)
171 fd_resource(pfb->cbufs[0]->texture)->dirty = true;
172
173 if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
174 fd_resource(pfb->zsbuf->texture)->dirty = true;
175 ctx->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
176 }
177
178 DBG("%x depth=%f, stencil=%u (%s/%s)", buffers, depth, stencil,
179 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
180 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
181
182 ctx->clear(ctx, buffers, color, depth, stencil);
183
184 ctx->dirty |= FD_DIRTY_ZSA |
185 FD_DIRTY_VIEWPORT |
186 FD_DIRTY_RASTERIZER |
187 FD_DIRTY_SAMPLE_MASK |
188 FD_DIRTY_PROG |
189 FD_DIRTY_CONSTBUF |
190 FD_DIRTY_BLEND;
191
192 if (fd_mesa_debug & FD_DBG_DCLEAR)
193 ctx->dirty = 0xffffffff;
194 }
195
196 static void
197 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
198 const union pipe_color_union *color,
199 unsigned x, unsigned y, unsigned w, unsigned h)
200 {
201 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
202 }
203
204 static void
205 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
206 unsigned buffers, double depth, unsigned stencil,
207 unsigned x, unsigned y, unsigned w, unsigned h)
208 {
209 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
210 buffers, depth, stencil, x, y, w, h);
211 }
212
213 void
214 fd_draw_init(struct pipe_context *pctx)
215 {
216 pctx->draw_vbo = fd_draw_vbo;
217 pctx->clear = fd_clear;
218 pctx->clear_render_target = fd_clear_render_target;
219 pctx->clear_depth_stencil = fd_clear_depth_stencil;
220 }