freedreno: skip batch-cache for compute shaders
[mesa.git] / src / gallium / drivers / freedreno / freedreno_draw.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_prim.h"
33 #include "util/u_format.h"
34 #include "util/u_helpers.h"
35
36 #include "freedreno_draw.h"
37 #include "freedreno_context.h"
38 #include "freedreno_state.h"
39 #include "freedreno_resource.h"
40 #include "freedreno_query_acc.h"
41 #include "freedreno_query_hw.h"
42 #include "freedreno_util.h"
43
44 static void
45 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
46 {
47 if (!prsc)
48 return;
49 fd_batch_resource_used(batch, fd_resource(prsc), false);
50 }
51
52 static void
53 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
54 {
55 if (!prsc)
56 return;
57 fd_batch_resource_used(batch, fd_resource(prsc), true);
58 }
59
60 static void
61 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
62 {
63 struct fd_context *ctx = fd_context(pctx);
64 struct fd_batch *batch = ctx->batch;
65 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
66 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
67 unsigned i, prims, buffers = 0;
68
69 if (!info->count_from_stream_output && !info->indirect &&
70 !info->primitive_restart &&
71 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
72 return;
73
74 /* if we supported transform feedback, we'd have to disable this: */
75 if (((scissor->maxx - scissor->minx) *
76 (scissor->maxy - scissor->miny)) == 0) {
77 return;
78 }
79
80 /* TODO: push down the region versions into the tiles */
81 if (!fd_render_condition_check(pctx))
82 return;
83
84 /* emulate unsupported primitives: */
85 if (!fd_supported_prim(ctx, info->mode)) {
86 if (ctx->streamout.num_targets > 0)
87 debug_error("stream-out with emulated prims");
88 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
89 util_primconvert_draw_vbo(ctx->primconvert, info);
90 return;
91 }
92
93 /* Upload a user index buffer. */
94 struct pipe_resource *indexbuf = NULL;
95 unsigned index_offset = 0;
96 struct pipe_draw_info new_info;
97 if (info->index_size) {
98 if (info->has_user_indices) {
99 if (!util_upload_index_buffer(pctx, info, &indexbuf, &index_offset))
100 return;
101 new_info = *info;
102 new_info.index.resource = indexbuf;
103 new_info.has_user_indices = false;
104 info = &new_info;
105 } else {
106 indexbuf = info->index.resource;
107 }
108 }
109
110 if (ctx->in_blit) {
111 fd_batch_reset(batch);
112 fd_context_all_dirty(ctx);
113 }
114
115 batch->blit = ctx->in_blit;
116 batch->back_blit = ctx->in_shadow;
117
118 /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
119 * query_buf may not be created yet.
120 */
121 fd_batch_set_stage(batch, FD_STAGE_DRAW);
122
123 /*
124 * Figure out the buffers/features we need:
125 */
126
127 mtx_lock(&ctx->screen->lock);
128
129 if (fd_depth_enabled(ctx)) {
130 buffers |= FD_BUFFER_DEPTH;
131 resource_written(batch, pfb->zsbuf->texture);
132 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
133 }
134
135 if (fd_stencil_enabled(ctx)) {
136 buffers |= FD_BUFFER_STENCIL;
137 resource_written(batch, pfb->zsbuf->texture);
138 batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
139 }
140
141 if (fd_logicop_enabled(ctx))
142 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
143
144 for (i = 0; i < pfb->nr_cbufs; i++) {
145 struct pipe_resource *surf;
146
147 if (!pfb->cbufs[i])
148 continue;
149
150 surf = pfb->cbufs[i]->texture;
151
152 resource_written(batch, surf);
153 buffers |= PIPE_CLEAR_COLOR0 << i;
154
155 if (surf->nr_samples > 1)
156 batch->gmem_reason |= FD_GMEM_MSAA_ENABLED;
157
158 if (fd_blend_enabled(ctx, i))
159 batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
160 }
161
162 /* Mark SSBOs as being written.. we don't actually know which ones are
163 * read vs written, so just assume the worst
164 */
165 foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
166 resource_read(batch, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].sb[i].buffer);
167
168 foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
169 resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
170 foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
171 resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
172
173 /* Mark VBOs as being read */
174 foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
175 assert(!ctx->vtx.vertexbuf.vb[i].is_user_buffer);
176 resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer.resource);
177 }
178
179 /* Mark index buffer as being read */
180 resource_read(batch, indexbuf);
181
182 /* Mark textures as being read */
183 foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
184 resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
185 foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
186 resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
187
188 /* Mark streamout buffers as being written.. */
189 for (i = 0; i < ctx->streamout.num_targets; i++)
190 if (ctx->streamout.targets[i])
191 resource_written(batch, ctx->streamout.targets[i]->buffer);
192
193 resource_written(batch, batch->query_buf);
194
195 list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
196 resource_written(batch, aq->prsc);
197
198 mtx_unlock(&ctx->screen->lock);
199
200 batch->num_draws++;
201
202 prims = u_reduced_prims_for_vertices(info->mode, info->count);
203
204 ctx->stats.draw_calls++;
205
206 /* TODO prims_emitted should be clipped when the stream-out buffer is
207 * not large enough. See max_tf_vtx().. probably need to move that
208 * into common code. Although a bit more annoying since a2xx doesn't
209 * use ir3 so no common way to get at the pipe_stream_output_info
210 * which is needed for this calculation.
211 */
212 if (ctx->streamout.num_targets > 0)
213 ctx->stats.prims_emitted += prims;
214 ctx->stats.prims_generated += prims;
215
216 /* any buffers that haven't been cleared yet, we need to restore: */
217 batch->restore |= buffers & (FD_BUFFER_ALL & ~batch->cleared);
218 /* and any buffers used, need to be resolved: */
219 batch->resolve |= buffers;
220
221 DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
222 pfb->width, pfb->height, batch->num_draws,
223 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
224 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
225
226 if (ctx->draw_vbo(ctx, info, index_offset))
227 batch->needs_flush = true;
228
229 for (i = 0; i < ctx->streamout.num_targets; i++)
230 ctx->streamout.offsets[i] += info->count;
231
232 if (fd_mesa_debug & FD_DBG_DDRAW)
233 fd_context_all_dirty(ctx);
234
235 fd_batch_check_size(batch);
236
237 if (info == &new_info)
238 pipe_resource_reference(&indexbuf, NULL);
239 }
240
241 /* Generic clear implementation (partially) using u_blitter: */
242 static void
243 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
244 const union pipe_color_union *color, double depth, unsigned stencil)
245 {
246 struct fd_context *ctx = fd_context(pctx);
247 struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
248 struct blitter_context *blitter = ctx->blitter;
249
250 fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
251
252 util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
253 buffers, NULL, NULL);
254
255 struct pipe_stencil_ref sr = {
256 .ref_value = { stencil & 0xff }
257 };
258 pctx->set_stencil_ref(pctx, &sr);
259
260 struct pipe_constant_buffer cb = {
261 .buffer_size = 16,
262 .user_buffer = &color->ui,
263 };
264 pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
265
266 if (!ctx->clear_rs_state) {
267 const struct pipe_rasterizer_state tmpl = {
268 .cull_face = PIPE_FACE_NONE,
269 .half_pixel_center = 1,
270 .bottom_edge_rule = 1,
271 .flatshade = 1,
272 .depth_clip = 1,
273 };
274 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
275 }
276 pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
277
278 struct pipe_viewport_state vp = {
279 .scale = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
280 .translate = { 0.5f * pfb->width, 0.5f * pfb->height, 0.0f },
281 };
282 pctx->set_viewport_states(pctx, 0, 1, &vp);
283
284 pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
285 pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
286 &ctx->solid_vbuf_state.vertexbuf.vb[0]);
287 pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
288 pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
289 pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
290
291 struct pipe_draw_info info = {
292 .mode = PIPE_PRIM_MAX, /* maps to DI_PT_RECTLIST */
293 .count = 2,
294 .max_index = 1,
295 .instance_count = 1,
296 };
297 ctx->draw_vbo(ctx, &info, 0);
298
299 util_blitter_restore_constant_buffer_state(blitter);
300 util_blitter_restore_vertex_states(blitter);
301 util_blitter_restore_fragment_states(blitter);
302 util_blitter_restore_textures(blitter);
303 util_blitter_restore_fb_state(blitter);
304 util_blitter_restore_render_cond(blitter);
305 util_blitter_unset_running_flag(blitter);
306
307 fd_blitter_pipe_end(ctx);
308 }
309
310 /* TODO figure out how to make better use of existing state mechanism
311 * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
312 * track of what state really actually changes, and (b) reduce the code
313 * in the a2xx/a3xx parts.
314 */
315
316 static void
317 fd_clear(struct pipe_context *pctx, unsigned buffers,
318 const union pipe_color_union *color, double depth, unsigned stencil)
319 {
320 struct fd_context *ctx = fd_context(pctx);
321 struct fd_batch *batch = ctx->batch;
322 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
323 struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
324 unsigned cleared_buffers;
325 int i;
326
327 /* TODO: push down the region versions into the tiles */
328 if (!fd_render_condition_check(pctx))
329 return;
330
331 if (ctx->in_blit) {
332 fd_batch_reset(batch);
333 fd_context_all_dirty(ctx);
334 }
335
336 /* for bookkeeping about which buffers have been cleared (and thus
337 * can fully or partially skip mem2gmem) we need to ignore buffers
338 * that have already had a draw, in case apps do silly things like
339 * clear after draw (ie. if you only clear the color buffer, but
340 * something like alpha-test causes side effects from the draw in
341 * the depth buffer, etc)
342 */
343 cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
344
345 /* do we have full-screen scissor? */
346 if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) {
347 batch->cleared |= cleared_buffers;
348 } else {
349 batch->partial_cleared |= cleared_buffers;
350 if (cleared_buffers & PIPE_CLEAR_COLOR)
351 batch->cleared_scissor.color = *scissor;
352 if (cleared_buffers & PIPE_CLEAR_DEPTH)
353 batch->cleared_scissor.depth = *scissor;
354 if (cleared_buffers & PIPE_CLEAR_STENCIL)
355 batch->cleared_scissor.stencil = *scissor;
356 }
357 batch->resolve |= buffers;
358 batch->needs_flush = true;
359
360 mtx_lock(&ctx->screen->lock);
361
362 if (buffers & PIPE_CLEAR_COLOR)
363 for (i = 0; i < pfb->nr_cbufs; i++)
364 if (buffers & (PIPE_CLEAR_COLOR0 << i))
365 resource_written(batch, pfb->cbufs[i]->texture);
366
367 if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
368 resource_written(batch, pfb->zsbuf->texture);
369 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
370 }
371
372 resource_written(batch, batch->query_buf);
373
374 list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
375 resource_written(batch, aq->prsc);
376
377 mtx_unlock(&ctx->screen->lock);
378
379 DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
380 pfb->width, pfb->height, depth, stencil,
381 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
382 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
383
384 /* if per-gen backend doesn't implement ctx->clear() generic
385 * blitter clear:
386 */
387 bool fallback = true;
388
389 if (ctx->clear) {
390 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
391
392 if (ctx->clear(ctx, buffers, color, depth, stencil)) {
393 if (fd_mesa_debug & FD_DBG_DCLEAR)
394 fd_context_all_dirty(ctx);
395
396 fallback = false;
397 }
398 }
399
400 if (fallback) {
401 fd_blitter_clear(pctx, buffers, color, depth, stencil);
402 }
403 }
404
405 static void
406 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
407 const union pipe_color_union *color,
408 unsigned x, unsigned y, unsigned w, unsigned h,
409 bool render_condition_enabled)
410 {
411 DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
412 }
413
414 static void
415 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
416 unsigned buffers, double depth, unsigned stencil,
417 unsigned x, unsigned y, unsigned w, unsigned h,
418 bool render_condition_enabled)
419 {
420 DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
421 buffers, depth, stencil, x, y, w, h);
422 }
423
424 static void
425 fd_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
426 {
427 struct fd_context *ctx = fd_context(pctx);
428 struct fd_batch *batch, *save_batch = NULL;
429 unsigned i;
430
431 batch = fd_batch_create(ctx);
432 fd_batch_reference(&save_batch, ctx->batch);
433 fd_batch_reference(&ctx->batch, batch);
434
435 mtx_lock(&ctx->screen->lock);
436
437 /* Mark SSBOs as being written.. we don't actually know which ones are
438 * read vs written, so just assume the worst
439 */
440 foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_COMPUTE].enabled_mask)
441 resource_read(batch, ctx->shaderbuf[PIPE_SHADER_COMPUTE].sb[i].buffer);
442
443 /* UBO's are read */
444 foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask)
445 resource_read(batch, ctx->constbuf[PIPE_SHADER_COMPUTE].cb[i].buffer);
446
447 /* Mark textures as being read */
448 foreach_bit(i, ctx->tex[PIPE_SHADER_COMPUTE].valid_textures)
449 resource_read(batch, ctx->tex[PIPE_SHADER_COMPUTE].textures[i]->texture);
450
451 mtx_unlock(&ctx->screen->lock);
452
453 ctx->launch_grid(ctx, info);
454
455 fd_gmem_flush_compute(batch);
456
457 fd_batch_reference(&ctx->batch, save_batch);
458 fd_batch_reference(&save_batch, NULL);
459 }
460
461 void
462 fd_draw_init(struct pipe_context *pctx)
463 {
464 pctx->draw_vbo = fd_draw_vbo;
465 pctx->clear = fd_clear;
466 pctx->clear_render_target = fd_clear_render_target;
467 pctx->clear_depth_stencil = fd_clear_depth_stencil;
468
469 if (has_compute(fd_screen(pctx->screen))) {
470 pctx->launch_grid = fd_launch_grid;
471 }
472 }