src/gallium/drivers/freedreno/freedreno_draw.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "pipe/p_state.h"
  30 #include "util/u_string.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_prim.h"
  33 #include "util/u_format.h"
  34 #include "util/u_helpers.h"
  35
  36 #include "freedreno_draw.h"
  37 #include "freedreno_context.h"
  38 #include "freedreno_state.h"
  39 #include "freedreno_resource.h"
  40 #include "freedreno_query_acc.h"
  41 #include "freedreno_query_hw.h"
  42 #include "freedreno_util.h"
  43
  44 static void
  45 resource_read(struct fd_batch *batch, struct pipe_resource *prsc)
  46 {
  47         if (!prsc)
  48                 return;
  49         fd_batch_resource_used(batch, fd_resource(prsc), false);
  50 }
  51
  52 static void
  53 resource_written(struct fd_batch *batch, struct pipe_resource *prsc)
  54 {
  55         if (!prsc)
  56                 return;
  57         fd_batch_resource_used(batch, fd_resource(prsc), true);
  58 }
  59
  60 static void
  61 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
  62 {
  63         struct fd_context *ctx = fd_context(pctx);
  64         struct fd_batch *batch = ctx->batch;
  65         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
  66         struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
  67         unsigned i, prims, buffers = 0;
  68
  69         if (!info->count_from_stream_output && !info->indirect &&
  70             !info->primitive_restart &&
  71             !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
  72                 return;
  73
  74         /* if we supported transform feedback, we'd have to disable this: */
  75         if (((scissor->maxx - scissor->minx) *
  76                         (scissor->maxy - scissor->miny)) == 0) {
  77                 return;
  78         }
  79
  80         /* TODO: push down the region versions into the tiles */
  81         if (!fd_render_condition_check(pctx))
  82                 return;
  83
  84         /* emulate unsupported primitives: */
  85         if (!fd_supported_prim(ctx, info->mode)) {
  86                 if (ctx->streamout.num_targets > 0)
  87                         debug_error("stream-out with emulated prims");
  88                 util_primconvert_save_rasterizer_state(ctx->primconvert, ctx->rasterizer);
  89                 util_primconvert_draw_vbo(ctx->primconvert, info);
  90                 return;
  91         }
  92
  93         /* Upload a user index buffer. */
  94         struct pipe_resource *indexbuf = NULL;
  95         unsigned index_offset = 0;
  96         struct pipe_draw_info new_info;
  97         if (info->index_size) {
  98                 if (info->has_user_indices) {
  99                         if (!util_upload_index_buffer(pctx, info, &indexbuf, &index_offset))
 100                                 return;
 101                         new_info = *info;
 102                         new_info.index.resource = indexbuf;
 103                         new_info.has_user_indices = false;
 104                         info = &new_info;
 105                 } else {
 106                         indexbuf = info->index.resource;
 107                 }
 108         }
 109
 110         if (ctx->in_blit) {
 111                 fd_batch_reset(batch);
 112                 fd_context_all_dirty(ctx);
 113         }
 114
 115         batch->blit = ctx->in_blit;
 116         batch->back_blit = ctx->in_shadow;
 117
 118         /* NOTE: needs to be before resource_written(batch->query_buf), otherwise
 119          * query_buf may not be created yet.
 120          */
 121         fd_batch_set_stage(batch, FD_STAGE_DRAW);
 122
 123         /*
 124          * Figure out the buffers/features we need:
 125          */
 126
 127         mtx_lock(&ctx->screen->lock);
 128
 129         if (fd_depth_enabled(ctx)) {
 130                 buffers |= FD_BUFFER_DEPTH;
 131                 resource_written(batch, pfb->zsbuf->texture);
 132                 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED;
 133         }
 134
 135         if (fd_stencil_enabled(ctx)) {
 136                 buffers |= FD_BUFFER_STENCIL;
 137                 resource_written(batch, pfb->zsbuf->texture);
 138                 batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED;
 139         }
 140
 141         if (fd_logicop_enabled(ctx))
 142                 batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
 143
 144         for (i = 0; i < pfb->nr_cbufs; i++) {
 145                 struct pipe_resource *surf;
 146
 147                 if (!pfb->cbufs[i])
 148                         continue;
 149
 150                 surf = pfb->cbufs[i]->texture;
 151
 152                 resource_written(batch, surf);
 153                 buffers |= PIPE_CLEAR_COLOR0 << i;
 154
 155                 if (surf->nr_samples > 1)
 156                         batch->gmem_reason |= FD_GMEM_MSAA_ENABLED;
 157
 158                 if (fd_blend_enabled(ctx, i))
 159                         batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
 160         }
 161
 162         /* Mark SSBOs as being written.. we don't actually know which ones are
 163          * read vs written, so just assume the worst
 164          */
 165         foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 166                 resource_written(batch, ctx->shaderbuf[PIPE_SHADER_FRAGMENT].sb[i].buffer);
 167
 168         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask) {
 169                 struct pipe_image_view *img =
 170                         &ctx->shaderimg[PIPE_SHADER_FRAGMENT].si[i];
 171                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 172                         resource_written(batch, img->resource);
 173                 else
 174                         resource_read(batch, img->resource);
 175         }
 176
 177         foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask)
 178                 resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer);
 179         foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask)
 180                 resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer);
 181
 182         /* Mark VBOs as being read */
 183         foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) {
 184                 assert(!ctx->vtx.vertexbuf.vb[i].is_user_buffer);
 185                 resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer.resource);
 186         }
 187
 188         /* Mark index buffer as being read */
 189         resource_read(batch, indexbuf);
 190
 191         /* Mark textures as being read */
 192         foreach_bit(i, ctx->tex[PIPE_SHADER_VERTEX].valid_textures)
 193                 resource_read(batch, ctx->tex[PIPE_SHADER_VERTEX].textures[i]->texture);
 194         foreach_bit(i, ctx->tex[PIPE_SHADER_FRAGMENT].valid_textures)
 195                 resource_read(batch, ctx->tex[PIPE_SHADER_FRAGMENT].textures[i]->texture);
 196
 197         /* Mark streamout buffers as being written.. */
 198         for (i = 0; i < ctx->streamout.num_targets; i++)
 199                 if (ctx->streamout.targets[i])
 200                         resource_written(batch, ctx->streamout.targets[i]->buffer);
 201
 202         resource_written(batch, batch->query_buf);
 203
 204         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 205                 resource_written(batch, aq->prsc);
 206
 207         mtx_unlock(&ctx->screen->lock);
 208
 209         batch->num_draws++;
 210
 211         prims = u_reduced_prims_for_vertices(info->mode, info->count);
 212
 213         ctx->stats.draw_calls++;
 214
 215         /* TODO prims_emitted should be clipped when the stream-out buffer is
 216          * not large enough.  See max_tf_vtx().. probably need to move that
 217          * into common code.  Although a bit more annoying since a2xx doesn't
 218          * use ir3 so no common way to get at the pipe_stream_output_info
 219          * which is needed for this calculation.
 220          */
 221         if (ctx->streamout.num_targets > 0)
 222                 ctx->stats.prims_emitted += prims;
 223         ctx->stats.prims_generated += prims;
 224
 225         /* any buffers that haven't been cleared yet, we need to restore: */
 226         batch->restore |= buffers & (FD_BUFFER_ALL & ~batch->cleared);
 227         /* and any buffers used, need to be resolved: */
 228         batch->resolve |= buffers;
 229
 230         DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers,
 231                 pfb->width, pfb->height, batch->num_draws,
 232                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 233                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 234
 235         if (ctx->draw_vbo(ctx, info, index_offset))
 236                 batch->needs_flush = true;
 237
 238         for (i = 0; i < ctx->streamout.num_targets; i++)
 239                 ctx->streamout.offsets[i] += info->count;
 240
 241         if (fd_mesa_debug & FD_DBG_DDRAW)
 242                 fd_context_all_dirty(ctx);
 243
 244         fd_batch_check_size(batch);
 245
 246         if (info == &new_info)
 247                 pipe_resource_reference(&indexbuf, NULL);
 248 }
 249
 250 /* Generic clear implementation (partially) using u_blitter: */
 251 static void
 252 fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
 253                 const union pipe_color_union *color, double depth, unsigned stencil)
 254 {
 255         struct fd_context *ctx = fd_context(pctx);
 256         struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
 257         struct blitter_context *blitter = ctx->blitter;
 258
 259         fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR);
 260
 261         util_blitter_common_clear_setup(blitter, pfb->width, pfb->height,
 262                         buffers, NULL, NULL);
 263
 264         struct pipe_stencil_ref sr = {
 265                 .ref_value = { stencil & 0xff }
 266         };
 267         pctx->set_stencil_ref(pctx, &sr);
 268
 269         struct pipe_constant_buffer cb = {
 270                 .buffer_size = 16,
 271                 .user_buffer = &color->ui,
 272         };
 273         pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb);
 274
 275         if (!ctx->clear_rs_state) {
 276                 const struct pipe_rasterizer_state tmpl = {
 277                         .cull_face = PIPE_FACE_NONE,
 278                         .half_pixel_center = 1,
 279                         .bottom_edge_rule = 1,
 280                         .flatshade = 1,
 281                         .depth_clip = 1,
 282                 };
 283                 ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl);
 284         }
 285         pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state);
 286
 287         struct pipe_viewport_state vp = {
 288                 .scale     = { 0.5f * pfb->width, -0.5f * pfb->height, depth },
 289                 .translate = { 0.5f * pfb->width,  0.5f * pfb->height, 0.0f },
 290         };
 291         pctx->set_viewport_states(pctx, 0, 1, &vp);
 292
 293         pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx);
 294         pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1,
 295                         &ctx->solid_vbuf_state.vertexbuf.vb[0]);
 296         pctx->set_stream_output_targets(pctx, 0, NULL, NULL);
 297         pctx->bind_vs_state(pctx, ctx->solid_prog.vp);
 298         pctx->bind_fs_state(pctx, ctx->solid_prog.fp);
 299
 300         struct pipe_draw_info info = {
 301                 .mode = PIPE_PRIM_MAX,    /* maps to DI_PT_RECTLIST */
 302                 .count = 2,
 303                 .max_index = 1,
 304                 .instance_count = 1,
 305         };
 306         ctx->draw_vbo(ctx, &info, 0);
 307
 308         util_blitter_restore_constant_buffer_state(blitter);
 309         util_blitter_restore_vertex_states(blitter);
 310         util_blitter_restore_fragment_states(blitter);
 311         util_blitter_restore_textures(blitter);
 312         util_blitter_restore_fb_state(blitter);
 313         util_blitter_restore_render_cond(blitter);
 314         util_blitter_unset_running_flag(blitter);
 315
 316         fd_blitter_pipe_end(ctx);
 317 }
 318
 319 /* TODO figure out how to make better use of existing state mechanism
 320  * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep
 321  * track of what state really actually changes, and (b) reduce the code
 322  * in the a2xx/a3xx parts.
 323  */
 324
 325 static void
 326 fd_clear(struct pipe_context *pctx, unsigned buffers,
 327                 const union pipe_color_union *color, double depth, unsigned stencil)
 328 {
 329         struct fd_context *ctx = fd_context(pctx);
 330         struct fd_batch *batch = ctx->batch;
 331         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 332         struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
 333         unsigned cleared_buffers;
 334         int i;
 335
 336         /* TODO: push down the region versions into the tiles */
 337         if (!fd_render_condition_check(pctx))
 338                 return;
 339
 340         if (ctx->in_blit) {
 341                 fd_batch_reset(batch);
 342                 fd_context_all_dirty(ctx);
 343         }
 344
 345         /* for bookkeeping about which buffers have been cleared (and thus
 346          * can fully or partially skip mem2gmem) we need to ignore buffers
 347          * that have already had a draw, in case apps do silly things like
 348          * clear after draw (ie. if you only clear the color buffer, but
 349          * something like alpha-test causes side effects from the draw in
 350          * the depth buffer, etc)
 351          */
 352         cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore);
 353
 354         /* do we have full-screen scissor? */
 355         if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) {
 356                 batch->cleared |= cleared_buffers;
 357         } else {
 358                 batch->partial_cleared |= cleared_buffers;
 359                 if (cleared_buffers & PIPE_CLEAR_COLOR)
 360                         batch->cleared_scissor.color = *scissor;
 361                 if (cleared_buffers & PIPE_CLEAR_DEPTH)
 362                         batch->cleared_scissor.depth = *scissor;
 363                 if (cleared_buffers & PIPE_CLEAR_STENCIL)
 364                         batch->cleared_scissor.stencil = *scissor;
 365         }
 366         batch->resolve |= buffers;
 367         batch->needs_flush = true;
 368
 369         mtx_lock(&ctx->screen->lock);
 370
 371         if (buffers & PIPE_CLEAR_COLOR)
 372                 for (i = 0; i < pfb->nr_cbufs; i++)
 373                         if (buffers & (PIPE_CLEAR_COLOR0 << i))
 374                                 resource_written(batch, pfb->cbufs[i]->texture);
 375
 376         if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
 377                 resource_written(batch, pfb->zsbuf->texture);
 378                 batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL;
 379         }
 380
 381         resource_written(batch, batch->query_buf);
 382
 383         list_for_each_entry(struct fd_acc_query, aq, &ctx->acc_active_queries, node)
 384                 resource_written(batch, aq->prsc);
 385
 386         mtx_unlock(&ctx->screen->lock);
 387
 388         DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers,
 389                 pfb->width, pfb->height, depth, stencil,
 390                 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 391                 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 392
 393         /* if per-gen backend doesn't implement ctx->clear() generic
 394          * blitter clear:
 395          */
 396         bool fallback = true;
 397
 398         if (ctx->clear) {
 399                 fd_batch_set_stage(batch, FD_STAGE_CLEAR);
 400
 401                 if (ctx->clear(ctx, buffers, color, depth, stencil)) {
 402                         if (fd_mesa_debug & FD_DBG_DCLEAR)
 403                                 fd_context_all_dirty(ctx);
 404
 405                         fallback = false;
 406                 }
 407         }
 408
 409         if (fallback) {
 410                 fd_blitter_clear(pctx, buffers, color, depth, stencil);
 411         }
 412 }
 413
 414 static void
 415 fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
 416                 const union pipe_color_union *color,
 417                 unsigned x, unsigned y, unsigned w, unsigned h,
 418                 bool render_condition_enabled)
 419 {
 420         DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h);
 421 }
 422
 423 static void
 424 fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
 425                 unsigned buffers, double depth, unsigned stencil,
 426                 unsigned x, unsigned y, unsigned w, unsigned h,
 427                 bool render_condition_enabled)
 428 {
 429         DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u",
 430                         buffers, depth, stencil, x, y, w, h);
 431 }
 432
 433 static void
 434 fd_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info)
 435 {
 436         struct fd_context *ctx = fd_context(pctx);
 437         struct fd_batch *batch, *save_batch = NULL;
 438         unsigned i;
 439
 440         batch = fd_batch_create(ctx);
 441         fd_batch_reference(&save_batch, ctx->batch);
 442         fd_batch_reference(&ctx->batch, batch);
 443
 444         mtx_lock(&ctx->screen->lock);
 445
 446         /* Mark SSBOs as being written.. we don't actually know which ones are
 447          * read vs written, so just assume the worst
 448          */
 449         foreach_bit(i, ctx->shaderbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 450                 resource_read(batch, ctx->shaderbuf[PIPE_SHADER_COMPUTE].sb[i].buffer);
 451
 452         foreach_bit(i, ctx->shaderimg[PIPE_SHADER_COMPUTE].enabled_mask) {
 453                 struct pipe_image_view *img =
 454                         &ctx->shaderimg[PIPE_SHADER_COMPUTE].si[i];
 455                 if (img->access & PIPE_IMAGE_ACCESS_WRITE)
 456                         resource_written(batch, img->resource);
 457                 else
 458                         resource_read(batch, img->resource);
 459         }
 460
 461         /* UBO's are read */
 462         foreach_bit(i, ctx->constbuf[PIPE_SHADER_COMPUTE].enabled_mask)
 463                 resource_read(batch, ctx->constbuf[PIPE_SHADER_COMPUTE].cb[i].buffer);
 464
 465         /* Mark textures as being read */
 466         foreach_bit(i, ctx->tex[PIPE_SHADER_COMPUTE].valid_textures)
 467                 resource_read(batch, ctx->tex[PIPE_SHADER_COMPUTE].textures[i]->texture);
 468
 469         mtx_unlock(&ctx->screen->lock);
 470
 471         ctx->launch_grid(ctx, info);
 472
 473         fd_gmem_flush_compute(batch);
 474
 475         fd_batch_reference(&ctx->batch, save_batch);
 476         fd_batch_reference(&save_batch, NULL);
 477 }
 478
 479 void
 480 fd_draw_init(struct pipe_context *pctx)
 481 {
 482         pctx->draw_vbo = fd_draw_vbo;
 483         pctx->clear = fd_clear;
 484         pctx->clear_render_target = fd_clear_render_target;
 485         pctx->clear_depth_stencil = fd_clear_depth_stencil;
 486
 487         if (has_compute(fd_screen(pctx->screen))) {
 488                 pctx->launch_grid = fd_launch_grid;
 489         }
 490 }