src/gallium/drivers/freedreno/freedreno_gmem.c

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_string.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_format.h"
  32
  33 #include "freedreno_gmem.h"
  34 #include "freedreno_context.h"
  35 #include "freedreno_fence.h"
  36 #include "freedreno_resource.h"
  37 #include "freedreno_query_hw.h"
  38 #include "freedreno_util.h"
  39
  40 /*
  41  * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
  42  * inside the GPU.  All rendering happens to GMEM.  Larger render targets
  43  * are split into tiles that are small enough for the color (and depth and/or
  44  * stencil, if enabled) buffers to fit within GMEM.  Before rendering a tile,
  45  * if there was not a clear invalidating the previous tile contents, we need
  46  * to restore the previous tiles contents (system mem -> GMEM), and after all
  47  * the draw calls, before moving to the next tile, we need to save the tile
  48  * contents (GMEM -> system mem).
  49  *
  50  * The code in this file handles dealing with GMEM and tiling.
  51  *
  52  * The structure of the ringbuffer ends up being:
  53  *
  54  *     +--<---<-- IB ---<---+---<---+---<---<---<--+
  55  *     |                    |       |              |
  56  *     v                    ^       ^              ^
  57  *   ------------------------------------------------------
  58  *     | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
  59  *   ------------------------------------------------------
  60  *                       ^
  61  *                       |
  62  *                       address submitted in issueibcmds
  63  *
  64  * Where the per-tile section handles scissor setup, mem2gmem restore (if
  65  * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
  66  * resolve.
  67  */
  68
  69 static uint32_t bin_width(struct fd_screen *screen)
  70 {
  71         if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
  72                 return 1024;
  73         if (is_a3xx(screen))
  74                 return 992;
  75         return 512;
  76 }
  77
  78 static uint32_t
  79 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
  80                    uint32_t bin_w, uint32_t bin_h, uint32_t gmem_align,
  81                    struct fd_gmem_stateobj *gmem)
  82 {
  83         uint32_t total = 0, i;
  84
  85         for (i = 0; i < MAX_RENDER_TARGETS; i++) {
  86                 if (cbuf_cpp[i]) {
  87                         gmem->cbuf_base[i] = align(total, gmem_align);
  88                         total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
  89                 }
  90         }
  91
  92         if (zsbuf_cpp[0]) {
  93                 gmem->zsbuf_base[0] = align(total, gmem_align);
  94                 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
  95         }
  96
  97         if (zsbuf_cpp[1]) {
  98                 gmem->zsbuf_base[1] = align(total, gmem_align);
  99                 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
 100         }
 101
 102         return total;
 103 }
 104
 105 static void
 106 calculate_tiles(struct fd_batch *batch)
 107 {
 108         struct fd_context *ctx = batch->ctx;
 109         struct fd_screen *screen = ctx->screen;
 110         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 111         struct pipe_scissor_state *scissor = &batch->max_scissor;
 112         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 113         const uint32_t gmem_alignw = screen->gmem_alignw;
 114         const uint32_t gmem_alignh = screen->gmem_alignh;
 115         const unsigned npipes = screen->num_vsc_pipes;
 116         const uint32_t gmem_size = screen->gmemsize_bytes;
 117         uint32_t minx, miny, width, height;
 118         uint32_t nbins_x = 1, nbins_y = 1;
 119         uint32_t bin_w, bin_h;
 120         uint32_t gmem_align = 0x4000;
 121         uint32_t max_width = bin_width(screen);
 122         uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
 123         uint32_t i, j, t, xoff, yoff;
 124         uint32_t tpp_x, tpp_y;
 125         bool has_zs = !!((batch->resolve | batch->restore) &
 126                         (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
 127         int tile_n[npipes];
 128
 129         if (has_zs) {
 130                 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
 131                 zsbuf_cpp[0] = rsc->cpp;
 132                 if (rsc->stencil)
 133                         zsbuf_cpp[1] = rsc->stencil->cpp;
 134         }
 135         for (i = 0; i < pfb->nr_cbufs; i++) {
 136                 if (pfb->cbufs[i])
 137                         cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
 138                 else
 139                         cbuf_cpp[i] = 4;
 140                 /* if MSAA, color buffers are super-sampled in GMEM: */
 141                 cbuf_cpp[i] *= pfb->samples;
 142         }
 143
 144         if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
 145                 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
 146                 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
 147                 /* everything is up-to-date */
 148                 return;
 149         }
 150
 151         if (fd_mesa_debug & FD_DBG_NOSCIS) {
 152                 minx = 0;
 153                 miny = 0;
 154                 width = pfb->width;
 155                 height = pfb->height;
 156         } else {
 157                 /* round down to multiple of alignment: */
 158                 minx = scissor->minx & ~(gmem_alignw - 1);
 159                 miny = scissor->miny & ~(gmem_alignh - 1);
 160                 width = scissor->maxx - minx;
 161                 height = scissor->maxy - miny;
 162         }
 163
 164         bin_w = align(width, gmem_alignw);
 165         bin_h = align(height, gmem_alignh);
 166
 167         /* first, find a bin width that satisfies the maximum width
 168          * restrictions:
 169          */
 170         while (bin_w > max_width) {
 171                 nbins_x++;
 172                 bin_w = align(width / nbins_x, gmem_alignw);
 173         }
 174
 175         if (fd_mesa_debug & FD_DBG_MSGS) {
 176                 debug_printf("binning input: cbuf cpp:");
 177                 for (i = 0; i < pfb->nr_cbufs; i++)
 178                         debug_printf(" %d", cbuf_cpp[i]);
 179                 debug_printf(", zsbuf cpp: %d; %dx%d\n",
 180                                 zsbuf_cpp[0], width, height);
 181         }
 182
 183         if (is_a20x(screen) && batch->cleared) {
 184                 /* under normal circumstances the requirement would be 4K
 185                  * but the fast clear path requires an alignment of 32K
 186                  */
 187                 gmem_align = 0x8000;
 188         }
 189
 190         /* then find a bin width/height that satisfies the memory
 191          * constraints:
 192          */
 193         while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem_align, gmem) >
 194                    gmem_size) {
 195                 if (bin_w > bin_h) {
 196                         nbins_x++;
 197                         bin_w = align(width / nbins_x, gmem_alignw);
 198                 } else {
 199                         nbins_y++;
 200                         bin_h = align(height / nbins_y, gmem_alignh);
 201                 }
 202         }
 203
 204         DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
 205
 206         gmem->scissor = *scissor;
 207         memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
 208         memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
 209         gmem->bin_h = bin_h;
 210         gmem->bin_w = bin_w;
 211         gmem->nbins_x = nbins_x;
 212         gmem->nbins_y = nbins_y;
 213         gmem->minx = minx;
 214         gmem->miny = miny;
 215         gmem->width = width;
 216         gmem->height = height;
 217
 218         /*
 219          * Assign tiles and pipes:
 220          *
 221          * At some point it might be worth playing with different
 222          * strategies and seeing if that makes much impact on
 223          * performance.
 224          */
 225
 226 #define div_round_up(v, a)  (((v) + (a) - 1) / (a))
 227         /* figure out number of tiles per pipe: */
 228         if (is_a20x(ctx->screen)) {
 229                 /* for a20x we want to minimize the number of "pipes"
 230                  * binning data has 3 bits for x/y (8x8) but the edges are used to
 231                  * cull off-screen vertices with hw binning, so we have 6x6 pipes
 232                  */
 233                 tpp_x = 6;
 234                 tpp_y = 6;
 235         } else {
 236                 tpp_x = tpp_y = 1;
 237                 while (div_round_up(nbins_y, tpp_y) > screen->num_vsc_pipes)
 238                         tpp_y += 2;
 239                 while ((div_round_up(nbins_y, tpp_y) *
 240                                 div_round_up(nbins_x, tpp_x)) > screen->num_vsc_pipes)
 241                         tpp_x += 1;
 242         }
 243
 244         gmem->maxpw = tpp_x;
 245         gmem->maxph = tpp_y;
 246
 247         /* configure pipes: */
 248         xoff = yoff = 0;
 249         for (i = 0; i < npipes; i++) {
 250                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 251
 252                 if (xoff >= nbins_x) {
 253                         xoff = 0;
 254                         yoff += tpp_y;
 255                 }
 256
 257                 if (yoff >= nbins_y) {
 258                         break;
 259                 }
 260
 261                 pipe->x = xoff;
 262                 pipe->y = yoff;
 263                 pipe->w = MIN2(tpp_x, nbins_x - xoff);
 264                 pipe->h = MIN2(tpp_y, nbins_y - yoff);
 265
 266                 xoff += tpp_x;
 267         }
 268
 269         /* number of pipes to use for a20x */
 270         gmem->num_vsc_pipes = MAX2(1, i);
 271
 272         for (; i < npipes; i++) {
 273                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 274                 pipe->x = pipe->y = pipe->w = pipe->h = 0;
 275         }
 276
 277 #if 0 /* debug */
 278         printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
 279         for (i = 0; i < 8; i++) {
 280                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 281                 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
 282                                 pipe->w, pipe->h, pipe->x, pipe->y);
 283         }
 284 #endif
 285
 286         /* configure tiles: */
 287         t = 0;
 288         yoff = miny;
 289         memset(tile_n, 0, sizeof(tile_n));
 290         for (i = 0; i < nbins_y; i++) {
 291                 uint32_t bw, bh;
 292
 293                 xoff = minx;
 294
 295                 /* clip bin height: */
 296                 bh = MIN2(bin_h, miny + height - yoff);
 297
 298                 for (j = 0; j < nbins_x; j++) {
 299                         struct fd_tile *tile = &ctx->tile[t];
 300                         uint32_t p;
 301
 302                         assert(t < ARRAY_SIZE(ctx->tile));
 303
 304                         /* pipe number: */
 305                         p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
 306                         assert(p < gmem->num_vsc_pipes);
 307
 308                         /* clip bin width: */
 309                         bw = MIN2(bin_w, minx + width - xoff);
 310                         tile->n = !is_a20x(ctx->screen) ? tile_n[p]++ :
 311                                 ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
 312                         tile->p = p;
 313                         tile->bin_w = bw;
 314                         tile->bin_h = bh;
 315                         tile->xoff = xoff;
 316                         tile->yoff = yoff;
 317
 318                         t++;
 319
 320                         xoff += bw;
 321                 }
 322
 323                 yoff += bh;
 324         }
 325
 326 #if 0 /* debug */
 327         t = 0;
 328         for (i = 0; i < nbins_y; i++) {
 329                 for (j = 0; j < nbins_x; j++) {
 330                         struct fd_tile *tile = &ctx->tile[t++];
 331                         printf("|p:%u n:%u|", tile->p, tile->n);
 332                 }
 333                 printf("\n");
 334         }
 335 #endif
 336 }
 337
 338 static void
 339 render_tiles(struct fd_batch *batch)
 340 {
 341         struct fd_context *ctx = batch->ctx;
 342         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 343         int i;
 344
 345         ctx->emit_tile_init(batch);
 346
 347         if (batch->restore)
 348                 ctx->stats.batch_restore++;
 349
 350         for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
 351                 struct fd_tile *tile = &ctx->tile[i];
 352
 353                 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
 354                         tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
 355
 356                 ctx->emit_tile_prep(batch, tile);
 357
 358                 if (batch->restore) {
 359                         ctx->emit_tile_mem2gmem(batch, tile);
 360                 }
 361
 362                 ctx->emit_tile_renderprep(batch, tile);
 363
 364                 if (ctx->query_prepare_tile)
 365                         ctx->query_prepare_tile(batch, i, batch->gmem);
 366
 367                 /* emit IB to drawcmds: */
 368                 ctx->emit_ib(batch->gmem, batch->draw);
 369                 fd_reset_wfi(batch);
 370
 371                 /* emit gmem2mem to transfer tile back to system memory: */
 372                 ctx->emit_tile_gmem2mem(batch, tile);
 373         }
 374
 375         if (ctx->emit_tile_fini)
 376                 ctx->emit_tile_fini(batch);
 377 }
 378
 379 static void
 380 render_sysmem(struct fd_batch *batch)
 381 {
 382         struct fd_context *ctx = batch->ctx;
 383
 384         ctx->emit_sysmem_prep(batch);
 385
 386         if (ctx->query_prepare_tile)
 387                 ctx->query_prepare_tile(batch, 0, batch->gmem);
 388
 389         /* emit IB to drawcmds: */
 390         ctx->emit_ib(batch->gmem, batch->draw);
 391         fd_reset_wfi(batch);
 392
 393         if (ctx->emit_sysmem_fini)
 394                 ctx->emit_sysmem_fini(batch);
 395 }
 396
 397 static void
 398 flush_ring(struct fd_batch *batch)
 399 {
 400         uint32_t timestamp;
 401         int out_fence_fd = -1;
 402
 403         fd_submit_flush(batch->submit, batch->in_fence_fd,
 404                         batch->needs_out_fence_fd ? &out_fence_fd : NULL,
 405                         &timestamp);
 406
 407         fd_fence_populate(batch->fence, timestamp, out_fence_fd);
 408 }
 409
 410 void
 411 fd_gmem_render_tiles(struct fd_batch *batch)
 412 {
 413         struct fd_context *ctx = batch->ctx;
 414         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 415         bool sysmem = false;
 416
 417         if (ctx->emit_sysmem_prep && !batch->nondraw) {
 418                 if (batch->cleared || batch->gmem_reason ||
 419                                 ((batch->num_draws > 5) && !batch->blit) ||
 420                                 (pfb->samples > 1)) {
 421                         DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
 422                                 batch->cleared, batch->gmem_reason, batch->num_draws,
 423                                 pfb->samples);
 424                 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
 425                         sysmem = true;
 426                 }
 427
 428                 /* For ARB_framebuffer_no_attachments: */
 429                 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
 430                         sysmem = true;
 431                 }
 432         }
 433
 434         fd_reset_wfi(batch);
 435
 436         ctx->stats.batch_total++;
 437
 438         if (batch->nondraw) {
 439                 DBG("%p: rendering non-draw", batch);
 440                 ctx->stats.batch_nondraw++;
 441         } else if (sysmem) {
 442                 DBG("%p: rendering sysmem %ux%u (%s/%s)",
 443                         batch, pfb->width, pfb->height,
 444                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 445                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 446                 if (ctx->query_prepare)
 447                         ctx->query_prepare(batch, 1);
 448                 render_sysmem(batch);
 449                 ctx->stats.batch_sysmem++;
 450         } else {
 451                 struct fd_gmem_stateobj *gmem = &ctx->gmem;
 452                 calculate_tiles(batch);
 453                 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
 454                         batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
 455                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 456                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 457                 if (ctx->query_prepare)
 458                         ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
 459                 render_tiles(batch);
 460                 ctx->stats.batch_gmem++;
 461         }
 462
 463         flush_ring(batch);
 464 }
 465
 466 /* When deciding whether a tile needs mem2gmem, we need to take into
 467  * account the scissor rect(s) that were cleared.  To simplify we only
 468  * consider the last scissor rect for each buffer, since the common
 469  * case would be a single clear.
 470  */
 471 bool
 472 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
 473                 uint32_t buffers)
 474 {
 475         if (!(batch->restore & buffers))
 476                 return false;
 477
 478         return true;
 479 }