src/gallium/drivers/freedreno/freedreno_pm4.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_PM4_H_
  30 #define FREEDRENO_PM4_H_
  31
  32 #define CP_TYPE0_PKT              (0 << 30)
  33 #define CP_TYPE1_PKT              (1 << 30)
  34 #define CP_TYPE2_PKT              (2 << 30)
  35 #define CP_TYPE3_PKT              (3 << 30)
  36
  37
  38 #define CP_ME_INIT                0x48
  39 #define CP_NOP                    0x10
  40 #define CP_INDIRECT_BUFFER        0x3f
  41 #define CP_INDIRECT_BUFFER_PFD    0x37
  42 #define CP_WAIT_FOR_IDLE          0x26
  43 #define CP_WAIT_REG_MEM           0x3c
  44 #define CP_WAIT_REG_EQ            0x52
  45 #define CP_WAT_REG_GTE            0x53
  46 #define CP_WAIT_UNTIL_READ        0x5c
  47 #define CP_WAIT_IB_PFD_COMPLETE   0x5d
  48 #define CP_REG_RMW                0x21
  49 #define CP_REG_TO_MEM             0x3e
  50 #define CP_MEM_WRITE              0x3d
  51 #define CP_MEM_WRITE_CNTR         0x4f
  52 #define CP_COND_EXEC              0x44
  53 #define CP_COND_WRITE             0x45
  54 #define CP_EVENT_WRITE            0x46
  55 #define CP_EVENT_WRITE_SHD        0x58
  56 #define CP_EVENT_WRITE_CFL        0x59
  57 #define CP_EVENT_WRITE_ZPD        0x5b
  58 #define CP_DRAW_INDX              0x22
  59 #define CP_DRAW_INDX_2            0x36
  60 #define CP_DRAW_INDX_BIN          0x34
  61 #define CP_DRAW_INDX_2_BIN        0x35
  62 #define CP_VIZ_QUERY              0x23
  63 #define CP_SET_STATE              0x25
  64 #define CP_SET_CONSTANT           0x2d
  65 #define CP_IM_LOAD                0x27
  66 #define CP_IM_LOAD_IMMEDIATE      0x2b
  67 #define CP_LOAD_CONSTANT_CONTEXT  0x2e
  68 #define CP_INVALIDATE_STATE       0x3b
  69 #define CP_SET_SHADER_BASES       0x4a
  70 #define CP_SET_BIN_MASK           0x50
  71 #define CP_SET_BIN_SELECT         0x51
  72 #define CP_CONTEXT_UPDATE         0x5e
  73 #define CP_INTERRUPT              0x40
  74 #define CP_IM_STORE               0x2c
  75 #define CP_SET_BIN_BASE_OFFSET    0x4b      /* for a20x */
  76 #define CP_SET_DRAW_INIT_FLAGS    0x4b      /* for a22x */
  77 #define CP_SET_PROTECTED_MODE     0x5f
  78 #define CP_LOAD_STATE             0x30
  79 #define CP_COND_INDIRECT_BUFFER_PFE 0x3a
  80 #define CP_COND_INDIRECT_BUFFER_PFD 0x32
  81
  82
  83 #define CP_REG(reg) ((0x4 << 16) | ((reg) - 0x2000))
  84
  85
  86 #endif  /* FREEDRENO_PM4_H_ */