src/gallium/drivers/freedreno/freedreno_program.c

   1 /*
   2  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "tgsi/tgsi_text.h"
  28 #include "tgsi/tgsi_ureg.h"
  29
  30 #include "freedreno_program.h"
  31 #include "freedreno_context.h"
  32
  33 static void
  34 fd_vs_state_bind(struct pipe_context *pctx, void *hwcso)
  35 {
  36         struct fd_context *ctx = fd_context(pctx);
  37         ctx->prog.vs = hwcso;
  38         ctx->dirty_shader[PIPE_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
  39         ctx->dirty |= FD_DIRTY_PROG;
  40 }
  41
  42 static void
  43 fd_tcs_state_bind(struct pipe_context *pctx, void *hwcso)
  44 {
  45         struct fd_context *ctx = fd_context(pctx);
  46         ctx->prog.hs = hwcso;
  47         ctx->dirty_shader[PIPE_SHADER_TESS_CTRL] |= FD_DIRTY_SHADER_PROG;
  48         ctx->dirty |= FD_DIRTY_PROG;
  49 }
  50
  51 static void
  52 fd_tes_state_bind(struct pipe_context *pctx, void *hwcso)
  53 {
  54         struct fd_context *ctx = fd_context(pctx);
  55         ctx->prog.ds = hwcso;
  56         ctx->dirty_shader[PIPE_SHADER_TESS_EVAL] |= FD_DIRTY_SHADER_PROG;
  57         ctx->dirty |= FD_DIRTY_PROG;
  58 }
  59
  60 static void
  61 fd_gs_state_bind(struct pipe_context *pctx, void *hwcso)
  62 {
  63         struct fd_context *ctx = fd_context(pctx);
  64         ctx->prog.gs = hwcso;
  65         ctx->dirty_shader[PIPE_SHADER_GEOMETRY] |= FD_DIRTY_SHADER_PROG;
  66         ctx->dirty |= FD_DIRTY_PROG;
  67 }
  68
  69 static void
  70 fd_fs_state_bind(struct pipe_context *pctx, void *hwcso)
  71 {
  72         struct fd_context *ctx = fd_context(pctx);
  73         ctx->prog.fs = hwcso;
  74         ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |= FD_DIRTY_SHADER_PROG;
  75         ctx->dirty |= FD_DIRTY_PROG;
  76 }
  77
  78 static const char *solid_fs =
  79         "FRAG                                        \n"
  80         "PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1       \n"
  81         "DCL CONST[0]                                \n"
  82         "DCL OUT[0], COLOR                           \n"
  83         "  0: MOV OUT[0], CONST[0]                   \n"
  84         "  1: END                                    \n";
  85
  86 static const char *solid_vs =
  87         "VERT                                        \n"
  88         "DCL IN[0]                                   \n"
  89         "DCL OUT[0], POSITION                        \n"
  90         "  0: MOV OUT[0], IN[0]                      \n"
  91         "  1: END                                    \n";
  92
  93 static void * assemble_tgsi(struct pipe_context *pctx,
  94                 const char *src, bool frag)
  95 {
  96         struct tgsi_token toks[32];
  97         struct pipe_shader_state cso = {
  98                         .tokens = toks,
  99         };
 100
 101         bool ret = tgsi_text_translate(src, toks, ARRAY_SIZE(toks));
 102         assume(ret);
 103
 104         if (frag)
 105                 return pctx->create_fs_state(pctx, &cso);
 106         else
 107                 return pctx->create_vs_state(pctx, &cso);
 108 }
 109
 110 /* the correct semantic to use for the texcoord varying depends on pipe-cap: */
 111 static enum tgsi_semantic
 112 texcoord_semantic(struct pipe_context *pctx)
 113 {
 114         struct pipe_screen *pscreen = pctx->screen;
 115
 116         if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_TEXCOORD)) {
 117                 return TGSI_SEMANTIC_TEXCOORD;
 118         } else {
 119                 return TGSI_SEMANTIC_GENERIC;
 120         }
 121 }
 122
 123 static void *
 124 fd_prog_blit_vs(struct pipe_context *pctx)
 125 {
 126         struct ureg_program *ureg;
 127
 128         ureg = ureg_create(PIPE_SHADER_VERTEX);
 129         if (!ureg)
 130                 return NULL;
 131
 132         struct ureg_src in0 = ureg_DECL_vs_input(ureg, 0);
 133         struct ureg_src in1 = ureg_DECL_vs_input(ureg, 1);
 134
 135         struct ureg_dst out0 = ureg_DECL_output(ureg, texcoord_semantic(pctx), 0);
 136         struct ureg_dst out1 = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 1);
 137
 138         ureg_MOV(ureg, out0, in0);
 139         ureg_MOV(ureg, out1, in1);
 140
 141         ureg_END(ureg);
 142
 143         return ureg_create_shader_and_destroy(ureg, pctx);
 144 }
 145
 146 static void *
 147 fd_prog_blit_fs(struct pipe_context *pctx, int rts, bool depth)
 148 {
 149         int i;
 150         struct ureg_src tc;
 151         struct ureg_program *ureg;
 152
 153         debug_assert(rts <= MAX_RENDER_TARGETS);
 154
 155         ureg = ureg_create(PIPE_SHADER_FRAGMENT);
 156         if (!ureg)
 157                 return NULL;
 158
 159         tc = ureg_DECL_fs_input(
 160                         ureg, texcoord_semantic(pctx), 0, TGSI_INTERPOLATE_PERSPECTIVE);
 161         for (i = 0; i < rts; i++)
 162                 ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i),
 163                                  TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i));
 164         if (depth)
 165                 ureg_TEX(ureg,
 166                                  ureg_writemask(
 167                                                  ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0),
 168                                                  TGSI_WRITEMASK_Z),
 169                                  TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, rts));
 170
 171         ureg_END(ureg);
 172
 173         return ureg_create_shader_and_destroy(ureg, pctx);
 174 }
 175
 176
 177 void fd_prog_init(struct pipe_context *pctx)
 178 {
 179         struct fd_context *ctx = fd_context(pctx);
 180         int i;
 181
 182         pctx->bind_vs_state = fd_vs_state_bind;
 183         pctx->bind_tcs_state = fd_tcs_state_bind;
 184         pctx->bind_tes_state = fd_tes_state_bind;
 185         pctx->bind_gs_state = fd_gs_state_bind;
 186         pctx->bind_fs_state = fd_fs_state_bind;
 187
 188         ctx->solid_prog.fs = assemble_tgsi(pctx, solid_fs, true);
 189         ctx->solid_prog.vs = assemble_tgsi(pctx, solid_vs, false);
 190
 191         if (ctx->screen->gpu_id >= 500)
 192                 return;
 193
 194         ctx->blit_prog[0].vs = fd_prog_blit_vs(pctx);
 195         ctx->blit_prog[0].fs = fd_prog_blit_fs(pctx, 1, false);
 196
 197         if (ctx->screen->gpu_id < 300)
 198                 return;
 199
 200         for (i = 1; i < ctx->screen->max_rts; i++) {
 201                 ctx->blit_prog[i].vs = ctx->blit_prog[0].vs;
 202                 ctx->blit_prog[i].fs = fd_prog_blit_fs(pctx, i + 1, false);
 203         }
 204
 205         ctx->blit_z.vs = ctx->blit_prog[0].vs;
 206         ctx->blit_z.fs = fd_prog_blit_fs(pctx, 0, true);
 207         ctx->blit_zs.vs = ctx->blit_prog[0].vs;
 208         ctx->blit_zs.fs = fd_prog_blit_fs(pctx, 1, true);
 209 }
 210
 211 void fd_prog_fini(struct pipe_context *pctx)
 212 {
 213         struct fd_context *ctx = fd_context(pctx);
 214         int i;
 215
 216         pctx->delete_vs_state(pctx, ctx->solid_prog.vs);
 217         pctx->delete_fs_state(pctx, ctx->solid_prog.fs);
 218         if (ctx->screen->gpu_id >= 500)
 219                 return;
 220
 221         pctx->delete_vs_state(pctx, ctx->blit_prog[0].vs);
 222         pctx->delete_fs_state(pctx, ctx->blit_prog[0].fs);
 223
 224         if (ctx->screen->gpu_id < 300)
 225                 return;
 226
 227         for (i = 1; i < ctx->screen->max_rts; i++)
 228                 pctx->delete_fs_state(pctx, ctx->blit_prog[i].fs);
 229         pctx->delete_fs_state(pctx, ctx->blit_z.fs);
 230         pctx->delete_fs_state(pctx, ctx->blit_zs.fs);
 231 }