freedreno/ir3: fix RA issue with fanin
[mesa.git] / src / gallium / drivers / freedreno / freedreno_program.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "tgsi/tgsi_text.h"
30 #include "tgsi/tgsi_ureg.h"
31
32 #include "freedreno_program.h"
33 #include "freedreno_context.h"
34
35 static void
36 fd_fp_state_bind(struct pipe_context *pctx, void *hwcso)
37 {
38 struct fd_context *ctx = fd_context(pctx);
39 ctx->prog.fp = hwcso;
40 ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
41 ctx->dirty |= FD_DIRTY_PROG;
42 }
43
44 static void
45 fd_vp_state_bind(struct pipe_context *pctx, void *hwcso)
46 {
47 struct fd_context *ctx = fd_context(pctx);
48 ctx->prog.vp = hwcso;
49 ctx->prog.dirty |= FD_SHADER_DIRTY_VP;
50 ctx->dirty |= FD_DIRTY_PROG;
51 }
52
53 static const char *solid_fp =
54 "FRAG \n"
55 "PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 \n"
56 "DCL CONST[0] \n"
57 "DCL OUT[0], COLOR \n"
58 " 0: MOV OUT[0], CONST[0] \n"
59 " 1: END \n";
60
61 static const char *solid_vp =
62 "VERT \n"
63 "DCL IN[0] \n"
64 "DCL OUT[0], POSITION \n"
65 " 0: MOV OUT[0], IN[0] \n"
66 " 1: END \n";
67
68 static const char *blit_vp =
69 "VERT \n"
70 "DCL IN[0] \n"
71 "DCL IN[1] \n"
72 "DCL OUT[0], TEXCOORD[0] \n"
73 "DCL OUT[1], POSITION \n"
74 " 0: MOV OUT[0], IN[0] \n"
75 " 0: MOV OUT[1], IN[1] \n"
76 " 1: END \n";
77
78 static void * assemble_tgsi(struct pipe_context *pctx,
79 const char *src, bool frag)
80 {
81 struct tgsi_token toks[32];
82 struct pipe_shader_state cso = {
83 .tokens = toks,
84 };
85
86 tgsi_text_translate(src, toks, ARRAY_SIZE(toks));
87
88 if (frag)
89 return pctx->create_fs_state(pctx, &cso);
90 else
91 return pctx->create_vs_state(pctx, &cso);
92 }
93
94 static void *
95 fd_prog_blit(struct pipe_context *pctx, int rts, bool depth)
96 {
97 int i;
98 struct ureg_src tc;
99 struct ureg_program *ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
100 if (!ureg)
101 return NULL;
102
103 tc = ureg_DECL_fs_input(
104 ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_PERSPECTIVE);
105 for (i = 0; i < rts; i++)
106 ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i),
107 TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i));
108 if (depth)
109 ureg_TEX(ureg,
110 ureg_writemask(
111 ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0),
112 TGSI_WRITEMASK_Z),
113 TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, rts));
114
115 ureg_END(ureg);
116
117 return ureg_create_shader_and_destroy(ureg, pctx);
118 }
119
120
121 void fd_prog_init(struct pipe_context *pctx)
122 {
123 struct fd_context *ctx = fd_context(pctx);
124 int i;
125
126 pctx->bind_fs_state = fd_fp_state_bind;
127 pctx->bind_vs_state = fd_vp_state_bind;
128
129 // XXX for now, let a2xx keep it's own hand-rolled shaders
130 // for solid and blit progs:
131 if (ctx->screen->gpu_id < 300)
132 return;
133
134 ctx->solid_prog.fp = assemble_tgsi(pctx, solid_fp, true);
135 ctx->solid_prog.vp = assemble_tgsi(pctx, solid_vp, false);
136 ctx->blit_prog[0].vp = assemble_tgsi(pctx, blit_vp, false);
137 ctx->blit_prog[0].fp = fd_prog_blit(pctx, 1, false);
138 for (i = 1; i < ctx->screen->max_rts; i++) {
139 ctx->blit_prog[i].vp = ctx->blit_prog[0].vp;
140 ctx->blit_prog[i].fp = fd_prog_blit(pctx, i + 1, false);
141 }
142
143 ctx->blit_z.vp = ctx->blit_prog[0].vp;
144 ctx->blit_z.fp = fd_prog_blit(pctx, 0, true);
145 ctx->blit_zs.vp = ctx->blit_prog[0].vp;
146 ctx->blit_zs.fp = fd_prog_blit(pctx, 1, true);
147 }
148
149 void fd_prog_fini(struct pipe_context *pctx)
150 {
151 struct fd_context *ctx = fd_context(pctx);
152 int i;
153
154 pctx->delete_vs_state(pctx, ctx->solid_prog.vp);
155 pctx->delete_fs_state(pctx, ctx->solid_prog.fp);
156 pctx->delete_vs_state(pctx, ctx->blit_prog[0].vp);
157 for (i = 0; i < ctx->screen->max_rts; i++)
158 pctx->delete_fs_state(pctx, ctx->blit_prog[i].fp);
159 pctx->delete_fs_state(pctx, ctx->blit_z.fp);
160 pctx->delete_fs_state(pctx, ctx->blit_zs.fp);
161 }