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0044b9804b3eee20a87eb7b6f06f9809b057150b
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.c
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "util/format/u_format.h"
28 #include "util/format/u_format_rgtc.h"
29 #include "util/format/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
34 #include "util/set.h"
35 #include "util/u_drm.h"
36
37 #include "freedreno_resource.h"
38 #include "freedreno_batch_cache.h"
39 #include "freedreno_blitter.h"
40 #include "freedreno_fence.h"
41 #include "freedreno_screen.h"
42 #include "freedreno_surface.h"
43 #include "freedreno_context.h"
44 #include "freedreno_query_hw.h"
45 #include "freedreno_util.h"
46
47 #include "drm-uapi/drm_fourcc.h"
48 #include <errno.h>
49
50 /* XXX this should go away, needed for 'struct winsys_handle' */
51 #include "state_tracker/drm_driver.h"
52
53 /* A private modifier for now, so we have a way to request tiled but not
54 * compressed. It would perhaps be good to get real modifiers for the
55 * tiled formats, but would probably need to do some work to figure out
56 * the layout(s) of the tiled modes, and whether they are the same
57 * across generations.
58 */
59 #define FD_FORMAT_MOD_QCOM_TILED fourcc_mod_code(QCOM, 0xffffffff)
60
61 /**
62 * Go through the entire state and see if the resource is bound
63 * anywhere. If it is, mark the relevant state as dirty. This is
64 * called on realloc_bo to ensure the neccessary state is re-
65 * emitted so the GPU looks at the new backing bo.
66 */
67 static void
68 rebind_resource(struct fd_context *ctx, struct pipe_resource *prsc)
69 {
70 /* VBOs */
71 for (unsigned i = 0; i < ctx->vtx.vertexbuf.count && !(ctx->dirty & FD_DIRTY_VTXBUF); i++) {
72 if (ctx->vtx.vertexbuf.vb[i].buffer.resource == prsc)
73 ctx->dirty |= FD_DIRTY_VTXBUF;
74 }
75
76 /* per-shader-stage resources: */
77 for (unsigned stage = 0; stage < PIPE_SHADER_TYPES; stage++) {
78 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
79 * cmdstream rather than by pointer..
80 */
81 const unsigned num_ubos = util_last_bit(ctx->constbuf[stage].enabled_mask);
82 for (unsigned i = 1; i < num_ubos; i++) {
83 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_CONST)
84 break;
85 if (ctx->constbuf[stage].cb[i].buffer == prsc)
86 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_CONST;
87 }
88
89 /* Textures */
90 for (unsigned i = 0; i < ctx->tex[stage].num_textures; i++) {
91 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_TEX)
92 break;
93 if (ctx->tex[stage].textures[i] && (ctx->tex[stage].textures[i]->texture == prsc))
94 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_TEX;
95 }
96
97 /* Images */
98 const unsigned num_images = util_last_bit(ctx->shaderimg[stage].enabled_mask);
99 for (unsigned i = 0; i < num_images; i++) {
100 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_IMAGE)
101 break;
102 if (ctx->shaderimg[stage].si[i].resource == prsc)
103 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_IMAGE;
104 }
105
106 /* SSBOs */
107 const unsigned num_ssbos = util_last_bit(ctx->shaderbuf[stage].enabled_mask);
108 for (unsigned i = 0; i < num_ssbos; i++) {
109 if (ctx->dirty_shader[stage] & FD_DIRTY_SHADER_SSBO)
110 break;
111 if (ctx->shaderbuf[stage].sb[i].buffer == prsc)
112 ctx->dirty_shader[stage] |= FD_DIRTY_SHADER_SSBO;
113 }
114 }
115 }
116
117 static void
118 realloc_bo(struct fd_resource *rsc, uint32_t size)
119 {
120 struct pipe_resource *prsc = &rsc->base;
121 struct fd_screen *screen = fd_screen(rsc->base.screen);
122 uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
123 DRM_FREEDRENO_GEM_TYPE_KMEM |
124 COND(prsc->bind & PIPE_BIND_SCANOUT, DRM_FREEDRENO_GEM_SCANOUT);
125 /* TODO other flags? */
126
127 /* if we start using things other than write-combine,
128 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
129 */
130
131 if (rsc->bo)
132 fd_bo_del(rsc->bo);
133
134 rsc->bo = fd_bo_new(screen->dev, size, flags, "%ux%ux%u@%u:%x",
135 prsc->width0, prsc->height0, prsc->depth0, rsc->cpp, prsc->bind);
136 rsc->seqno = p_atomic_inc_return(&screen->rsc_seqno);
137 util_range_set_empty(&rsc->valid_buffer_range);
138 fd_bc_invalidate_resource(rsc, true);
139 }
140
141 static void
142 do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit, bool fallback)
143 {
144 struct pipe_context *pctx = &ctx->base;
145
146 /* TODO size threshold too?? */
147 if (fallback || !fd_blit(pctx, blit)) {
148 /* do blit on cpu: */
149 util_resource_copy_region(pctx,
150 blit->dst.resource, blit->dst.level, blit->dst.box.x,
151 blit->dst.box.y, blit->dst.box.z,
152 blit->src.resource, blit->src.level, &blit->src.box);
153 }
154 }
155
156 /**
157 * @rsc: the resource to shadow
158 * @level: the level to discard (if box != NULL, otherwise ignored)
159 * @box: the box to discard (or NULL if none)
160 * @modifier: the modifier for the new buffer state
161 */
162 static bool
163 fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
164 unsigned level, const struct pipe_box *box, uint64_t modifier)
165 {
166 struct pipe_context *pctx = &ctx->base;
167 struct pipe_resource *prsc = &rsc->base;
168 bool fallback = false;
169
170 if (prsc->next)
171 return false;
172
173 /* TODO: somehow munge dimensions and format to copy unsupported
174 * render target format to something that is supported?
175 */
176 if (!pctx->screen->is_format_supported(pctx->screen,
177 prsc->format, prsc->target, prsc->nr_samples,
178 prsc->nr_storage_samples,
179 PIPE_BIND_RENDER_TARGET))
180 fallback = true;
181
182 /* do shadowing back-blits on the cpu for buffers: */
183 if (prsc->target == PIPE_BUFFER)
184 fallback = true;
185
186 bool discard_whole_level = box && util_texrange_covers_whole_level(prsc, level,
187 box->x, box->y, box->z, box->width, box->height, box->depth);
188
189 /* TODO need to be more clever about current level */
190 if ((prsc->target >= PIPE_TEXTURE_2D) && box && !discard_whole_level)
191 return false;
192
193 struct pipe_resource *pshadow =
194 pctx->screen->resource_create_with_modifiers(pctx->screen,
195 prsc, &modifier, 1);
196
197 if (!pshadow)
198 return false;
199
200 assert(!ctx->in_shadow);
201 ctx->in_shadow = true;
202
203 /* get rid of any references that batch-cache might have to us (which
204 * should empty/destroy rsc->batches hashset)
205 */
206 fd_bc_invalidate_resource(rsc, false);
207
208 mtx_lock(&ctx->screen->lock);
209
210 /* Swap the backing bo's, so shadow becomes the old buffer,
211 * blit from shadow to new buffer. From here on out, we
212 * cannot fail.
213 *
214 * Note that we need to do it in this order, otherwise if
215 * we go down cpu blit path, the recursive transfer_map()
216 * sees the wrong status..
217 */
218 struct fd_resource *shadow = fd_resource(pshadow);
219
220 DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.reference.count,
221 shadow, shadow->base.reference.count);
222
223 /* TODO valid_buffer_range?? */
224 swap(rsc->bo, shadow->bo);
225 swap(rsc->write_batch, shadow->write_batch);
226 swap(rsc->offset, shadow->offset);
227 swap(rsc->ubwc_offset, shadow->ubwc_offset);
228 swap(rsc->ubwc_pitch, shadow->ubwc_pitch);
229 swap(rsc->ubwc_size, shadow->ubwc_size);
230 rsc->seqno = p_atomic_inc_return(&ctx->screen->rsc_seqno);
231
232 /* at this point, the newly created shadow buffer is not referenced
233 * by any batches, but the existing rsc (probably) is. We need to
234 * transfer those references over:
235 */
236 debug_assert(shadow->batch_mask == 0);
237 struct fd_batch *batch;
238 foreach_batch(batch, &ctx->screen->batch_cache, rsc->batch_mask) {
239 struct set_entry *entry = _mesa_set_search(batch->resources, rsc);
240 _mesa_set_remove(batch->resources, entry);
241 _mesa_set_add(batch->resources, shadow);
242 }
243 swap(rsc->batch_mask, shadow->batch_mask);
244
245 mtx_unlock(&ctx->screen->lock);
246
247 struct pipe_blit_info blit = {};
248 blit.dst.resource = prsc;
249 blit.dst.format = prsc->format;
250 blit.src.resource = pshadow;
251 blit.src.format = pshadow->format;
252 blit.mask = util_format_get_mask(prsc->format);
253 blit.filter = PIPE_TEX_FILTER_NEAREST;
254
255 #define set_box(field, val) do { \
256 blit.dst.field = (val); \
257 blit.src.field = (val); \
258 } while (0)
259
260 /* blit the other levels in their entirety: */
261 for (unsigned l = 0; l <= prsc->last_level; l++) {
262 if (box && l == level)
263 continue;
264
265 /* just blit whole level: */
266 set_box(level, l);
267 set_box(box.width, u_minify(prsc->width0, l));
268 set_box(box.height, u_minify(prsc->height0, l));
269 set_box(box.depth, u_minify(prsc->depth0, l));
270
271 do_blit(ctx, &blit, fallback);
272 }
273
274 /* deal w/ current level specially, since we might need to split
275 * it up into a couple blits:
276 */
277 if (box && !discard_whole_level) {
278 set_box(level, level);
279
280 switch (prsc->target) {
281 case PIPE_BUFFER:
282 case PIPE_TEXTURE_1D:
283 set_box(box.y, 0);
284 set_box(box.z, 0);
285 set_box(box.height, 1);
286 set_box(box.depth, 1);
287
288 if (box->x > 0) {
289 set_box(box.x, 0);
290 set_box(box.width, box->x);
291
292 do_blit(ctx, &blit, fallback);
293 }
294 if ((box->x + box->width) < u_minify(prsc->width0, level)) {
295 set_box(box.x, box->x + box->width);
296 set_box(box.width, u_minify(prsc->width0, level) - (box->x + box->width));
297
298 do_blit(ctx, &blit, fallback);
299 }
300 break;
301 case PIPE_TEXTURE_2D:
302 /* TODO */
303 default:
304 unreachable("TODO");
305 }
306 }
307
308 ctx->in_shadow = false;
309
310 pipe_resource_reference(&pshadow, NULL);
311
312 return true;
313 }
314
315 /**
316 * Uncompress an UBWC compressed buffer "in place". This works basically
317 * like resource shadowing, creating a new resource, and doing an uncompress
318 * blit, and swapping the state between shadow and original resource so it
319 * appears to the state tracker as if nothing changed.
320 */
321 void
322 fd_resource_uncompress(struct fd_context *ctx, struct fd_resource *rsc)
323 {
324 bool success =
325 fd_try_shadow_resource(ctx, rsc, 0, NULL, FD_FORMAT_MOD_QCOM_TILED);
326
327 /* shadow should not fail in any cases where we need to uncompress: */
328 debug_assert(success);
329
330 /*
331 * TODO what if rsc is used in other contexts, we don't currently
332 * have a good way to rebind_resource() in other contexts. And an
333 * app that is reading one resource in multiple contexts, isn't
334 * going to expect that the resource is modified.
335 *
336 * Hopefully the edge cases where we need to uncompress are rare
337 * enough that they mostly only show up in deqp.
338 */
339
340 rebind_resource(ctx, &rsc->base);
341 }
342
343 static struct fd_resource *
344 fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
345 unsigned level, const struct pipe_box *box)
346 {
347 struct pipe_context *pctx = &ctx->base;
348 struct pipe_resource tmpl = rsc->base;
349
350 tmpl.width0 = box->width;
351 tmpl.height0 = box->height;
352 /* for array textures, box->depth is the array_size, otherwise
353 * for 3d textures, it is the depth:
354 */
355 if (tmpl.array_size > 1) {
356 if (tmpl.target == PIPE_TEXTURE_CUBE)
357 tmpl.target = PIPE_TEXTURE_2D_ARRAY;
358 tmpl.array_size = box->depth;
359 tmpl.depth0 = 1;
360 } else {
361 tmpl.array_size = 1;
362 tmpl.depth0 = box->depth;
363 }
364 tmpl.last_level = 0;
365 tmpl.bind |= PIPE_BIND_LINEAR;
366
367 struct pipe_resource *pstaging =
368 pctx->screen->resource_create(pctx->screen, &tmpl);
369 if (!pstaging)
370 return NULL;
371
372 return fd_resource(pstaging);
373 }
374
375 static void
376 fd_blit_from_staging(struct fd_context *ctx, struct fd_transfer *trans)
377 {
378 struct pipe_resource *dst = trans->base.resource;
379 struct pipe_blit_info blit = {};
380
381 blit.dst.resource = dst;
382 blit.dst.format = dst->format;
383 blit.dst.level = trans->base.level;
384 blit.dst.box = trans->base.box;
385 blit.src.resource = trans->staging_prsc;
386 blit.src.format = trans->staging_prsc->format;
387 blit.src.level = 0;
388 blit.src.box = trans->staging_box;
389 blit.mask = util_format_get_mask(trans->staging_prsc->format);
390 blit.filter = PIPE_TEX_FILTER_NEAREST;
391
392 do_blit(ctx, &blit, false);
393 }
394
395 static void
396 fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans)
397 {
398 struct pipe_resource *src = trans->base.resource;
399 struct pipe_blit_info blit = {};
400
401 blit.src.resource = src;
402 blit.src.format = src->format;
403 blit.src.level = trans->base.level;
404 blit.src.box = trans->base.box;
405 blit.dst.resource = trans->staging_prsc;
406 blit.dst.format = trans->staging_prsc->format;
407 blit.dst.level = 0;
408 blit.dst.box = trans->staging_box;
409 blit.mask = util_format_get_mask(trans->staging_prsc->format);
410 blit.filter = PIPE_TEX_FILTER_NEAREST;
411
412 do_blit(ctx, &blit, false);
413 }
414
415 static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
416 struct pipe_transfer *ptrans,
417 const struct pipe_box *box)
418 {
419 struct fd_resource *rsc = fd_resource(ptrans->resource);
420
421 if (ptrans->resource->target == PIPE_BUFFER)
422 util_range_add(&rsc->base, &rsc->valid_buffer_range,
423 ptrans->box.x + box->x,
424 ptrans->box.x + box->x + box->width);
425 }
426
427 static void
428 flush_resource(struct fd_context *ctx, struct fd_resource *rsc, unsigned usage)
429 {
430 struct fd_batch *write_batch = NULL;
431
432 mtx_lock(&ctx->screen->lock);
433 fd_batch_reference_locked(&write_batch, rsc->write_batch);
434 mtx_unlock(&ctx->screen->lock);
435
436 if (usage & PIPE_TRANSFER_WRITE) {
437 struct fd_batch *batch, *batches[32] = {};
438 uint32_t batch_mask;
439
440 /* This is a bit awkward, probably a fd_batch_flush_locked()
441 * would make things simpler.. but we need to hold the lock
442 * to iterate the batches which reference this resource. So
443 * we must first grab references under a lock, then flush.
444 */
445 mtx_lock(&ctx->screen->lock);
446 batch_mask = rsc->batch_mask;
447 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
448 fd_batch_reference_locked(&batches[batch->idx], batch);
449 mtx_unlock(&ctx->screen->lock);
450
451 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask)
452 fd_batch_flush(batch, false);
453
454 foreach_batch(batch, &ctx->screen->batch_cache, batch_mask) {
455 fd_batch_sync(batch);
456 fd_batch_reference(&batches[batch->idx], NULL);
457 }
458 assert(rsc->batch_mask == 0);
459 } else if (write_batch) {
460 fd_batch_flush(write_batch, true);
461 }
462
463 fd_batch_reference(&write_batch, NULL);
464
465 assert(!rsc->write_batch);
466 }
467
468 static void
469 fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
470 {
471 flush_resource(fd_context(pctx), fd_resource(prsc), PIPE_TRANSFER_READ);
472 }
473
474 static void
475 fd_resource_transfer_unmap(struct pipe_context *pctx,
476 struct pipe_transfer *ptrans)
477 {
478 struct fd_context *ctx = fd_context(pctx);
479 struct fd_resource *rsc = fd_resource(ptrans->resource);
480 struct fd_transfer *trans = fd_transfer(ptrans);
481
482 if (trans->staging_prsc) {
483 if (ptrans->usage & PIPE_TRANSFER_WRITE)
484 fd_blit_from_staging(ctx, trans);
485 pipe_resource_reference(&trans->staging_prsc, NULL);
486 }
487
488 if (!(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
489 fd_bo_cpu_fini(rsc->bo);
490 }
491
492 util_range_add(&rsc->base, &rsc->valid_buffer_range,
493 ptrans->box.x,
494 ptrans->box.x + ptrans->box.width);
495
496 pipe_resource_reference(&ptrans->resource, NULL);
497 slab_free(&ctx->transfer_pool, ptrans);
498 }
499
500 static void *
501 fd_resource_transfer_map(struct pipe_context *pctx,
502 struct pipe_resource *prsc,
503 unsigned level, unsigned usage,
504 const struct pipe_box *box,
505 struct pipe_transfer **pptrans)
506 {
507 struct fd_context *ctx = fd_context(pctx);
508 struct fd_resource *rsc = fd_resource(prsc);
509 struct fdl_slice *slice = fd_resource_slice(rsc, level);
510 struct fd_transfer *trans;
511 struct pipe_transfer *ptrans;
512 enum pipe_format format = prsc->format;
513 uint32_t op = 0;
514 uint32_t offset;
515 char *buf;
516 int ret = 0;
517
518 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
519 box->width, box->height, box->x, box->y);
520
521 ptrans = slab_alloc(&ctx->transfer_pool);
522 if (!ptrans)
523 return NULL;
524
525 /* slab_alloc_st() doesn't zero: */
526 trans = fd_transfer(ptrans);
527 memset(trans, 0, sizeof(*trans));
528
529 pipe_resource_reference(&ptrans->resource, prsc);
530 ptrans->level = level;
531 ptrans->usage = usage;
532 ptrans->box = *box;
533 ptrans->stride = util_format_get_nblocksx(format, slice->pitch) * rsc->cpp;
534 ptrans->layer_stride = fd_resource_layer_stride(rsc, level);
535
536 /* we always need a staging texture for tiled buffers:
537 *
538 * TODO we might sometimes want to *also* shadow the resource to avoid
539 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
540 * texture.
541 */
542 if (rsc->tile_mode) {
543 struct fd_resource *staging_rsc;
544
545 staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
546 if (staging_rsc) {
547 struct fdl_slice *staging_slice =
548 fd_resource_slice(staging_rsc, 0);
549 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
550 trans->staging_prsc = &staging_rsc->base;
551 trans->base.stride = util_format_get_nblocksx(format,
552 staging_slice->pitch) * staging_rsc->cpp;
553 trans->base.layer_stride = fd_resource_layer_stride(staging_rsc, 0);
554 trans->staging_box = *box;
555 trans->staging_box.x = 0;
556 trans->staging_box.y = 0;
557 trans->staging_box.z = 0;
558
559 if (usage & PIPE_TRANSFER_READ) {
560 fd_blit_to_staging(ctx, trans);
561
562 struct fd_batch *batch = NULL;
563
564 fd_context_lock(ctx);
565 fd_batch_reference_locked(&batch, staging_rsc->write_batch);
566 fd_context_unlock(ctx);
567
568 /* we can't fd_bo_cpu_prep() until the blit to staging
569 * is submitted to kernel.. in that case write_batch
570 * wouldn't be NULL yet:
571 */
572 if (batch) {
573 fd_batch_sync(batch);
574 fd_batch_reference(&batch, NULL);
575 }
576
577 fd_bo_cpu_prep(staging_rsc->bo, ctx->pipe,
578 DRM_FREEDRENO_PREP_READ);
579 }
580
581 buf = fd_bo_map(staging_rsc->bo);
582 offset = 0;
583
584 *pptrans = ptrans;
585
586 ctx->stats.staging_uploads++;
587
588 return buf;
589 }
590 }
591
592 if (ctx->in_shadow && !(usage & PIPE_TRANSFER_READ))
593 usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
594
595 if (usage & PIPE_TRANSFER_READ)
596 op |= DRM_FREEDRENO_PREP_READ;
597
598 if (usage & PIPE_TRANSFER_WRITE)
599 op |= DRM_FREEDRENO_PREP_WRITE;
600
601 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
602 realloc_bo(rsc, fd_bo_size(rsc->bo));
603 rebind_resource(ctx, prsc);
604 } else if ((usage & PIPE_TRANSFER_WRITE) &&
605 prsc->target == PIPE_BUFFER &&
606 !util_ranges_intersect(&rsc->valid_buffer_range,
607 box->x, box->x + box->width)) {
608 /* We are trying to write to a previously uninitialized range. No need
609 * to wait.
610 */
611 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
612 struct fd_batch *write_batch = NULL;
613
614 /* hold a reference, so it doesn't disappear under us: */
615 fd_context_lock(ctx);
616 fd_batch_reference_locked(&write_batch, rsc->write_batch);
617 fd_context_unlock(ctx);
618
619 if ((usage & PIPE_TRANSFER_WRITE) && write_batch &&
620 write_batch->back_blit) {
621 /* if only thing pending is a back-blit, we can discard it: */
622 fd_batch_reset(write_batch);
623 }
624
625 /* If the GPU is writing to the resource, or if it is reading from the
626 * resource and we're trying to write to it, flush the renders.
627 */
628 bool needs_flush = pending(rsc, !!(usage & PIPE_TRANSFER_WRITE));
629 bool busy = needs_flush || (0 != fd_bo_cpu_prep(rsc->bo,
630 ctx->pipe, op | DRM_FREEDRENO_PREP_NOSYNC));
631
632 /* if we need to flush/stall, see if we can make a shadow buffer
633 * to avoid this:
634 *
635 * TODO we could go down this path !reorder && !busy_for_read
636 * ie. we only *don't* want to go down this path if the blit
637 * will trigger a flush!
638 */
639 if (ctx->screen->reorder && busy && !(usage & PIPE_TRANSFER_READ) &&
640 (usage & PIPE_TRANSFER_DISCARD_RANGE)) {
641 /* try shadowing only if it avoids a flush, otherwise staging would
642 * be better:
643 */
644 if (needs_flush && fd_try_shadow_resource(ctx, rsc, level,
645 box, DRM_FORMAT_MOD_LINEAR)) {
646 needs_flush = busy = false;
647 rebind_resource(ctx, prsc);
648 ctx->stats.shadow_uploads++;
649 } else {
650 struct fd_resource *staging_rsc;
651
652 if (needs_flush) {
653 flush_resource(ctx, rsc, usage);
654 needs_flush = false;
655 }
656
657 /* in this case, we don't need to shadow the whole resource,
658 * since any draw that references the previous contents has
659 * already had rendering flushed for all tiles. So we can
660 * use a staging buffer to do the upload.
661 */
662 staging_rsc = fd_alloc_staging(ctx, rsc, level, box);
663 if (staging_rsc) {
664 struct fdl_slice *staging_slice =
665 fd_resource_slice(staging_rsc, 0);
666 trans->staging_prsc = &staging_rsc->base;
667 trans->base.stride = util_format_get_nblocksx(format,
668 staging_slice->pitch) * staging_rsc->cpp;
669 trans->base.layer_stride =
670 fd_resource_layer_stride(staging_rsc, 0);
671 trans->staging_box = *box;
672 trans->staging_box.x = 0;
673 trans->staging_box.y = 0;
674 trans->staging_box.z = 0;
675 buf = fd_bo_map(staging_rsc->bo);
676 offset = 0;
677
678 *pptrans = ptrans;
679
680 fd_batch_reference(&write_batch, NULL);
681
682 ctx->stats.staging_uploads++;
683
684 return buf;
685 }
686 }
687 }
688
689 if (needs_flush) {
690 flush_resource(ctx, rsc, usage);
691 needs_flush = false;
692 }
693
694 fd_batch_reference(&write_batch, NULL);
695
696 /* The GPU keeps track of how the various bo's are being used, and
697 * will wait if necessary for the proper operation to have
698 * completed.
699 */
700 if (busy) {
701 ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
702 if (ret)
703 goto fail;
704 }
705 }
706
707 buf = fd_bo_map(rsc->bo);
708 offset =
709 box->y / util_format_get_blockheight(format) * ptrans->stride +
710 box->x / util_format_get_blockwidth(format) * rsc->cpp +
711 fd_resource_offset(rsc, level, box->z);
712
713 if (usage & PIPE_TRANSFER_WRITE)
714 rsc->valid = true;
715
716 *pptrans = ptrans;
717
718 return buf + offset;
719
720 fail:
721 fd_resource_transfer_unmap(pctx, ptrans);
722 return NULL;
723 }
724
725 static void
726 fd_resource_destroy(struct pipe_screen *pscreen,
727 struct pipe_resource *prsc)
728 {
729 struct fd_resource *rsc = fd_resource(prsc);
730 fd_bc_invalidate_resource(rsc, true);
731 if (rsc->bo)
732 fd_bo_del(rsc->bo);
733 if (rsc->scanout)
734 renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
735
736 util_range_destroy(&rsc->valid_buffer_range);
737 FREE(rsc);
738 }
739
740 static uint64_t
741 fd_resource_modifier(struct fd_resource *rsc)
742 {
743 if (!rsc->tile_mode)
744 return DRM_FORMAT_MOD_LINEAR;
745
746 if (rsc->ubwc_size)
747 return DRM_FORMAT_MOD_QCOM_COMPRESSED;
748
749 /* TODO invent a modifier for tiled but not UBWC buffers: */
750 return DRM_FORMAT_MOD_INVALID;
751 }
752
753 static bool
754 fd_resource_get_handle(struct pipe_screen *pscreen,
755 struct pipe_context *pctx,
756 struct pipe_resource *prsc,
757 struct winsys_handle *handle,
758 unsigned usage)
759 {
760 struct fd_resource *rsc = fd_resource(prsc);
761
762 handle->modifier = fd_resource_modifier(rsc);
763
764 return fd_screen_bo_get_handle(pscreen, rsc->bo, rsc->scanout,
765 fd_resource_slice(rsc, 0)->pitch * rsc->cpp, handle);
766 }
767
768 static uint32_t
769 setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
770 {
771 struct pipe_resource *prsc = &rsc->base;
772 struct fd_screen *screen = fd_screen(prsc->screen);
773 enum util_format_layout layout = util_format_description(format)->layout;
774 uint32_t pitchalign = screen->gmem_alignw;
775 uint32_t level, size = 0;
776 uint32_t width = prsc->width0;
777 uint32_t height = prsc->height0;
778 uint32_t depth = prsc->depth0;
779 /* in layer_first layout, the level (slice) contains just one
780 * layer (since in fact the layer contains the slices)
781 */
782 uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
783
784 for (level = 0; level <= prsc->last_level; level++) {
785 struct fdl_slice *slice = fd_resource_slice(rsc, level);
786 uint32_t blocks;
787
788 if (layout == UTIL_FORMAT_LAYOUT_ASTC)
789 slice->pitch = width =
790 util_align_npot(width, pitchalign * util_format_get_blockwidth(format));
791 else
792 slice->pitch = width = align(width, pitchalign);
793 slice->offset = size;
794 blocks = util_format_get_nblocks(format, width, height);
795 /* 1d array and 2d array textures must all have the same layer size
796 * for each miplevel on a3xx. 3d textures can have different layer
797 * sizes for high levels, but the hw auto-sizer is buggy (or at least
798 * different than what this code does), so as soon as the layer size
799 * range gets into range, we stop reducing it.
800 */
801 if (prsc->target == PIPE_TEXTURE_3D && (
802 level == 1 ||
803 (level > 1 && fd_resource_slice(rsc, level - 1)->size0 > 0xf000)))
804 slice->size0 = align(blocks * rsc->cpp, alignment);
805 else if (level == 0 || rsc->layer_first || alignment == 1)
806 slice->size0 = align(blocks * rsc->cpp, alignment);
807 else
808 slice->size0 = fd_resource_slice(rsc, level - 1)->size0;
809
810 size += slice->size0 * depth * layers_in_level;
811
812 width = u_minify(width, 1);
813 height = u_minify(height, 1);
814 depth = u_minify(depth, 1);
815 }
816
817 return size;
818 }
819
820 static uint32_t
821 slice_alignment(enum pipe_texture_target target)
822 {
823 /* on a3xx, 2d array and 3d textures seem to want their
824 * layers aligned to page boundaries:
825 */
826 switch (target) {
827 case PIPE_TEXTURE_3D:
828 case PIPE_TEXTURE_1D_ARRAY:
829 case PIPE_TEXTURE_2D_ARRAY:
830 return 4096;
831 default:
832 return 1;
833 }
834 }
835
836 /* cross generation texture layout to plug in to screen->setup_slices()..
837 * replace with generation specific one as-needed.
838 *
839 * TODO for a4xx probably can extract out the a4xx specific logic int
840 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
841 * calls this.
842 */
843 uint32_t
844 fd_setup_slices(struct fd_resource *rsc)
845 {
846 uint32_t alignment;
847
848 alignment = slice_alignment(rsc->base.target);
849
850 struct fd_screen *screen = fd_screen(rsc->base.screen);
851 if (is_a4xx(screen)) {
852 switch (rsc->base.target) {
853 case PIPE_TEXTURE_3D:
854 rsc->layer_first = false;
855 break;
856 default:
857 rsc->layer_first = true;
858 alignment = 1;
859 break;
860 }
861 }
862
863 return setup_slices(rsc, alignment, rsc->base.format);
864 }
865
866 /* special case to resize query buf after allocated.. */
867 void
868 fd_resource_resize(struct pipe_resource *prsc, uint32_t sz)
869 {
870 struct fd_resource *rsc = fd_resource(prsc);
871
872 debug_assert(prsc->width0 == 0);
873 debug_assert(prsc->target == PIPE_BUFFER);
874 debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
875
876 prsc->width0 = sz;
877 realloc_bo(rsc, fd_screen(prsc->screen)->setup_slices(rsc));
878 }
879
880 // TODO common helper?
881 static bool
882 has_depth(enum pipe_format format)
883 {
884 switch (format) {
885 case PIPE_FORMAT_Z16_UNORM:
886 case PIPE_FORMAT_Z32_UNORM:
887 case PIPE_FORMAT_Z32_FLOAT:
888 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
889 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
890 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
891 case PIPE_FORMAT_Z24X8_UNORM:
892 case PIPE_FORMAT_X8Z24_UNORM:
893 return true;
894 default:
895 return false;
896 }
897 }
898
899 /**
900 * Create a new texture object, using the given template info.
901 */
902 static struct pipe_resource *
903 fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
904 const struct pipe_resource *tmpl,
905 const uint64_t *modifiers, int count)
906 {
907 struct fd_screen *screen = fd_screen(pscreen);
908 struct fd_resource *rsc;
909 struct pipe_resource *prsc;
910 enum pipe_format format = tmpl->format;
911 uint32_t size;
912
913 /* when using kmsro, scanout buffers are allocated on the display device
914 * create_with_modifiers() doesn't give us usage flags, so we have to
915 * assume that all calls with modifiers are scanout-possible
916 */
917 if (screen->ro &&
918 ((tmpl->bind & PIPE_BIND_SCANOUT) ||
919 !(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID))) {
920 struct pipe_resource scanout_templat = *tmpl;
921 struct renderonly_scanout *scanout;
922 struct winsys_handle handle;
923
924 /* apply freedreno alignment requirement */
925 scanout_templat.width0 = align(tmpl->width0, screen->gmem_alignw);
926
927 scanout = renderonly_scanout_for_resource(&scanout_templat,
928 screen->ro, &handle);
929 if (!scanout)
930 return NULL;
931
932 renderonly_scanout_destroy(scanout, screen->ro);
933
934 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
935 rsc = fd_resource(pscreen->resource_from_handle(pscreen, tmpl,
936 &handle,
937 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
938 close(handle.handle);
939 if (!rsc)
940 return NULL;
941
942 return &rsc->base;
943 }
944
945 rsc = CALLOC_STRUCT(fd_resource);
946 prsc = &rsc->base;
947
948 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
949 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc,
950 tmpl->target, util_format_name(format),
951 tmpl->width0, tmpl->height0, tmpl->depth0,
952 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
953 tmpl->usage, tmpl->bind, tmpl->flags);
954
955 if (!rsc)
956 return NULL;
957
958 *prsc = *tmpl;
959
960 #define LINEAR \
961 (PIPE_BIND_SCANOUT | \
962 PIPE_BIND_LINEAR | \
963 PIPE_BIND_DISPLAY_TARGET)
964
965 bool linear = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
966 if (tmpl->bind & LINEAR)
967 linear = true;
968
969 /* Normally, for non-shared buffers, allow buffer compression if
970 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
971 * is requested:
972 *
973 * TODO we should probably also limit tiled in a similar way,
974 * except we don't have a format modifier for tiled. (We probably
975 * should.)
976 */
977 bool allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_INVALID, modifiers, count);
978 if (tmpl->bind & PIPE_BIND_SHARED)
979 allow_ubwc = drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count);
980
981 allow_ubwc &= !(fd_mesa_debug & FD_DBG_NOUBWC);
982
983 pipe_reference_init(&prsc->reference, 1);
984
985 prsc->screen = pscreen;
986
987 if (screen->tile_mode &&
988 (tmpl->target != PIPE_BUFFER) &&
989 !linear) {
990 rsc->tile_mode = screen->tile_mode(prsc);
991 }
992
993 util_range_init(&rsc->valid_buffer_range);
994
995 rsc->internal_format = format;
996 rsc->cpp = util_format_get_blocksize(format);
997 rsc->cpp *= fd_resource_nr_samples(prsc);
998
999 assert(rsc->cpp);
1000
1001 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
1002 if ((is_a5xx(screen) || is_a6xx(screen)) &&
1003 (fd_mesa_debug & FD_DBG_LRZ) && has_depth(format)) {
1004 const uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
1005 DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
1006 unsigned lrz_pitch = align(DIV_ROUND_UP(tmpl->width0, 8), 64);
1007 unsigned lrz_height = DIV_ROUND_UP(tmpl->height0, 8);
1008
1009 /* LRZ buffer is super-sampled: */
1010 switch (prsc->nr_samples) {
1011 case 4:
1012 lrz_pitch *= 2;
1013 case 2:
1014 lrz_height *= 2;
1015 }
1016
1017 unsigned size = lrz_pitch * lrz_height * 2;
1018
1019 size += 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
1020
1021 rsc->lrz_height = lrz_height;
1022 rsc->lrz_width = lrz_pitch;
1023 rsc->lrz_pitch = lrz_pitch;
1024 rsc->lrz = fd_bo_new(screen->dev, size, flags, "lrz");
1025 }
1026
1027 size = screen->setup_slices(rsc);
1028
1029 if (allow_ubwc && screen->fill_ubwc_buffer_sizes && rsc->tile_mode)
1030 size += screen->fill_ubwc_buffer_sizes(rsc);
1031
1032 /* special case for hw-query buffer, which we need to allocate before we
1033 * know the size:
1034 */
1035 if (size == 0) {
1036 /* note, semi-intention == instead of & */
1037 debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
1038 return prsc;
1039 }
1040
1041 if (rsc->layer_first) {
1042 rsc->layer_size = align(size, 4096);
1043 size = rsc->layer_size * prsc->array_size;
1044 }
1045
1046 realloc_bo(rsc, size);
1047 if (!rsc->bo)
1048 goto fail;
1049
1050 return prsc;
1051 fail:
1052 fd_resource_destroy(pscreen, prsc);
1053 return NULL;
1054 }
1055
1056 static struct pipe_resource *
1057 fd_resource_create(struct pipe_screen *pscreen,
1058 const struct pipe_resource *tmpl)
1059 {
1060 const uint64_t mod = DRM_FORMAT_MOD_INVALID;
1061 return fd_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
1062 }
1063
1064 static bool
1065 is_supported_modifier(struct pipe_screen *pscreen, enum pipe_format pfmt,
1066 uint64_t mod)
1067 {
1068 int count;
1069
1070 /* Get the count of supported modifiers: */
1071 pscreen->query_dmabuf_modifiers(pscreen, pfmt, 0, NULL, NULL, &count);
1072
1073 /* Get the supported modifiers: */
1074 uint64_t modifiers[count];
1075 pscreen->query_dmabuf_modifiers(pscreen, pfmt, count, modifiers, NULL, &count);
1076
1077 for (int i = 0; i < count; i++)
1078 if (modifiers[i] == mod)
1079 return true;
1080
1081 return false;
1082 }
1083
1084 /**
1085 * Create a texture from a winsys_handle. The handle is often created in
1086 * another process by first creating a pipe texture and then calling
1087 * resource_get_handle.
1088 */
1089 static struct pipe_resource *
1090 fd_resource_from_handle(struct pipe_screen *pscreen,
1091 const struct pipe_resource *tmpl,
1092 struct winsys_handle *handle, unsigned usage)
1093 {
1094 struct fd_screen *screen = fd_screen(pscreen);
1095 struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
1096 struct fdl_slice *slice = fd_resource_slice(rsc, 0);
1097 struct pipe_resource *prsc = &rsc->base;
1098 uint32_t pitchalign = fd_screen(pscreen)->gmem_alignw;
1099
1100 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1101 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1102 tmpl->target, util_format_name(tmpl->format),
1103 tmpl->width0, tmpl->height0, tmpl->depth0,
1104 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
1105 tmpl->usage, tmpl->bind, tmpl->flags);
1106
1107 if (!rsc)
1108 return NULL;
1109
1110 *prsc = *tmpl;
1111
1112 pipe_reference_init(&prsc->reference, 1);
1113
1114 prsc->screen = pscreen;
1115
1116 util_range_init(&rsc->valid_buffer_range);
1117
1118 rsc->bo = fd_screen_bo_from_handle(pscreen, handle);
1119 if (!rsc->bo)
1120 goto fail;
1121
1122 rsc->internal_format = tmpl->format;
1123 rsc->cpp = util_format_get_blocksize(tmpl->format);
1124 rsc->cpp *= fd_resource_nr_samples(prsc);
1125 slice->pitch = handle->stride / rsc->cpp;
1126 slice->offset = handle->offset;
1127 slice->size0 = handle->stride * prsc->height0;
1128
1129 if ((slice->pitch < align(prsc->width0, pitchalign)) ||
1130 (slice->pitch & (pitchalign - 1)))
1131 goto fail;
1132
1133 if (handle->modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED) {
1134 if (!is_supported_modifier(pscreen, tmpl->format,
1135 DRM_FORMAT_MOD_QCOM_COMPRESSED)) {
1136 DBG("bad modifier: %"PRIx64, handle->modifier);
1137 goto fail;
1138 }
1139 debug_assert(screen->fill_ubwc_buffer_sizes);
1140 screen->fill_ubwc_buffer_sizes(rsc);
1141 } else if (handle->modifier &&
1142 (handle->modifier != DRM_FORMAT_MOD_INVALID)) {
1143 goto fail;
1144 }
1145
1146 assert(rsc->cpp);
1147
1148 if (screen->ro) {
1149 rsc->scanout =
1150 renderonly_create_gpu_import_for_resource(prsc, screen->ro, NULL);
1151 /* failure is expected in some cases.. */
1152 }
1153
1154 rsc->valid = true;
1155
1156 return prsc;
1157
1158 fail:
1159 fd_resource_destroy(pscreen, prsc);
1160 return NULL;
1161 }
1162
1163 bool
1164 fd_render_condition_check(struct pipe_context *pctx)
1165 {
1166 struct fd_context *ctx = fd_context(pctx);
1167
1168 if (!ctx->cond_query)
1169 return true;
1170
1171 union pipe_query_result res = { 0 };
1172 bool wait =
1173 ctx->cond_mode != PIPE_RENDER_COND_NO_WAIT &&
1174 ctx->cond_mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
1175
1176 if (pctx->get_query_result(pctx, ctx->cond_query, wait, &res))
1177 return (bool)res.u64 != ctx->cond_cond;
1178
1179 return true;
1180 }
1181
1182 static void
1183 fd_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
1184 {
1185 struct fd_context *ctx = fd_context(pctx);
1186 struct fd_resource *rsc = fd_resource(prsc);
1187
1188 /*
1189 * TODO I guess we could track that the resource is invalidated and
1190 * use that as a hint to realloc rather than stall in _transfer_map(),
1191 * even in the non-DISCARD_WHOLE_RESOURCE case?
1192 *
1193 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1194 */
1195
1196 if (rsc->write_batch) {
1197 struct fd_batch *batch = rsc->write_batch;
1198 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
1199
1200 if (pfb->zsbuf && pfb->zsbuf->texture == prsc) {
1201 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
1202 ctx->dirty |= FD_DIRTY_ZSA;
1203 }
1204
1205 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
1206 if (pfb->cbufs[i] && pfb->cbufs[i]->texture == prsc) {
1207 batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1208 ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
1209 }
1210 }
1211 }
1212
1213 rsc->valid = false;
1214 }
1215
1216 static enum pipe_format
1217 fd_resource_get_internal_format(struct pipe_resource *prsc)
1218 {
1219 return fd_resource(prsc)->internal_format;
1220 }
1221
1222 static void
1223 fd_resource_set_stencil(struct pipe_resource *prsc,
1224 struct pipe_resource *stencil)
1225 {
1226 fd_resource(prsc)->stencil = fd_resource(stencil);
1227 }
1228
1229 static struct pipe_resource *
1230 fd_resource_get_stencil(struct pipe_resource *prsc)
1231 {
1232 struct fd_resource *rsc = fd_resource(prsc);
1233 if (rsc->stencil)
1234 return &rsc->stencil->base;
1235 return NULL;
1236 }
1237
1238 static const struct u_transfer_vtbl transfer_vtbl = {
1239 .resource_create = fd_resource_create,
1240 .resource_destroy = fd_resource_destroy,
1241 .transfer_map = fd_resource_transfer_map,
1242 .transfer_flush_region = fd_resource_transfer_flush_region,
1243 .transfer_unmap = fd_resource_transfer_unmap,
1244 .get_internal_format = fd_resource_get_internal_format,
1245 .set_stencil = fd_resource_set_stencil,
1246 .get_stencil = fd_resource_get_stencil,
1247 };
1248
1249 void
1250 fd_resource_screen_init(struct pipe_screen *pscreen)
1251 {
1252 struct fd_screen *screen = fd_screen(pscreen);
1253 bool fake_rgtc = screen->gpu_id < 400;
1254
1255 pscreen->resource_create = u_transfer_helper_resource_create;
1256 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1257 * variant:
1258 */
1259 pscreen->resource_create_with_modifiers = fd_resource_create_with_modifiers;
1260 pscreen->resource_from_handle = fd_resource_from_handle;
1261 pscreen->resource_get_handle = fd_resource_get_handle;
1262 pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1263
1264 pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1265 true, false, fake_rgtc, true);
1266
1267 if (!screen->setup_slices)
1268 screen->setup_slices = fd_setup_slices;
1269 }
1270
1271 static void
1272 fd_get_sample_position(struct pipe_context *context,
1273 unsigned sample_count, unsigned sample_index,
1274 float *pos_out)
1275 {
1276 /* The following is copied from nouveau/nv50 except for position
1277 * values, which are taken from blob driver */
1278 static const uint8_t pos1[1][2] = { { 0x8, 0x8 } };
1279 static const uint8_t pos2[2][2] = {
1280 { 0xc, 0xc }, { 0x4, 0x4 } };
1281 static const uint8_t pos4[4][2] = {
1282 { 0x6, 0x2 }, { 0xe, 0x6 },
1283 { 0x2, 0xa }, { 0xa, 0xe } };
1284 /* TODO needs to be verified on supported hw */
1285 static const uint8_t pos8[8][2] = {
1286 { 0x9, 0x5 }, { 0x7, 0xb },
1287 { 0xd, 0x9 }, { 0x5, 0x3 },
1288 { 0x3, 0xd }, { 0x1, 0x7 },
1289 { 0xb, 0xf }, { 0xf, 0x1 } };
1290
1291 const uint8_t (*ptr)[2];
1292
1293 switch (sample_count) {
1294 case 1:
1295 ptr = pos1;
1296 break;
1297 case 2:
1298 ptr = pos2;
1299 break;
1300 case 4:
1301 ptr = pos4;
1302 break;
1303 case 8:
1304 ptr = pos8;
1305 break;
1306 default:
1307 assert(0);
1308 return;
1309 }
1310
1311 pos_out[0] = ptr[sample_index][0] / 16.0f;
1312 pos_out[1] = ptr[sample_index][1] / 16.0f;
1313 }
1314
1315 static void
1316 fd_blit_pipe(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
1317 {
1318 /* wrap fd_blit to return void */
1319 fd_blit(pctx, blit_info);
1320 }
1321
1322 void
1323 fd_resource_context_init(struct pipe_context *pctx)
1324 {
1325 pctx->transfer_map = u_transfer_helper_transfer_map;
1326 pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1327 pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
1328 pctx->buffer_subdata = u_default_buffer_subdata;
1329 pctx->texture_subdata = u_default_texture_subdata;
1330 pctx->create_surface = fd_create_surface;
1331 pctx->surface_destroy = fd_surface_destroy;
1332 pctx->resource_copy_region = fd_resource_copy_region;
1333 pctx->blit = fd_blit_pipe;
1334 pctx->flush_resource = fd_flush_resource;
1335 pctx->invalidate_resource = fd_invalidate_resource;
1336 pctx->get_sample_position = fd_get_sample_position;
1337 }