2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/u_format.h"
28 #include "util/u_format_rgtc.h"
29 #include "util/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
36 #include "freedreno_resource.h"
37 #include "freedreno_batch_cache.h"
38 #include "freedreno_blitter.h"
39 #include "freedreno_fence.h"
40 #include "freedreno_screen.h"
41 #include "freedreno_surface.h"
42 #include "freedreno_context.h"
43 #include "freedreno_query_hw.h"
44 #include "freedreno_util.h"
46 #include "drm-uapi/drm_fourcc.h"
49 /* XXX this should go away, needed for 'struct winsys_handle' */
50 #include "state_tracker/drm_driver.h"
53 * Go through the entire state and see if the resource is bound
54 * anywhere. If it is, mark the relevant state as dirty. This is
55 * called on realloc_bo to ensure the neccessary state is re-
56 * emitted so the GPU looks at the new backing bo.
59 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
62 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
63 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
64 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
67 /* per-shader-stage resources: */
68 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
69 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
70 * cmdstream rather than by pointer..
72 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
73 for (unsigned i
= 1; i
< num_ubos
; i
++) {
74 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
76 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
77 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
81 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
82 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
84 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
85 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
89 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
90 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
91 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
93 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
94 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
100 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
102 struct pipe_resource
*prsc
= &rsc
->base
;
103 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
104 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
105 DRM_FREEDRENO_GEM_TYPE_KMEM
|
106 COND(prsc
->bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
107 /* TODO other flags? */
109 /* if we start using things other than write-combine,
110 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
116 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
, "%ux%ux%u@%u:%x",
117 prsc
->width0
, prsc
->height0
, prsc
->depth0
, rsc
->cpp
, prsc
->bind
);
118 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
119 util_range_set_empty(&rsc
->valid_buffer_range
);
120 fd_bc_invalidate_resource(rsc
, true);
124 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
126 struct pipe_context
*pctx
= &ctx
->base
;
128 /* TODO size threshold too?? */
129 if (fallback
|| !fd_blit(pctx
, blit
)) {
130 /* do blit on cpu: */
131 util_resource_copy_region(pctx
,
132 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
133 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
134 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
139 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
140 unsigned level
, const struct pipe_box
*box
)
142 struct pipe_context
*pctx
= &ctx
->base
;
143 struct pipe_resource
*prsc
= &rsc
->base
;
144 bool fallback
= false;
149 /* TODO: somehow munge dimensions and format to copy unsupported
150 * render target format to something that is supported?
152 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
153 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
154 prsc
->nr_storage_samples
,
155 PIPE_BIND_RENDER_TARGET
))
158 /* do shadowing back-blits on the cpu for buffers: */
159 if (prsc
->target
== PIPE_BUFFER
)
162 bool whole_level
= util_texrange_covers_whole_level(prsc
, level
,
163 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
165 /* TODO need to be more clever about current level */
166 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && !whole_level
)
169 struct pipe_resource
*pshadow
=
170 pctx
->screen
->resource_create(pctx
->screen
, prsc
);
175 assert(!ctx
->in_shadow
);
176 ctx
->in_shadow
= true;
178 /* get rid of any references that batch-cache might have to us (which
179 * should empty/destroy rsc->batches hashset)
181 fd_bc_invalidate_resource(rsc
, false);
183 mtx_lock(&ctx
->screen
->lock
);
185 /* Swap the backing bo's, so shadow becomes the old buffer,
186 * blit from shadow to new buffer. From here on out, we
189 * Note that we need to do it in this order, otherwise if
190 * we go down cpu blit path, the recursive transfer_map()
191 * sees the wrong status..
193 struct fd_resource
*shadow
= fd_resource(pshadow
);
195 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
196 shadow
, shadow
->base
.reference
.count
);
198 /* TODO valid_buffer_range?? */
199 swap(rsc
->bo
, shadow
->bo
);
200 swap(rsc
->write_batch
, shadow
->write_batch
);
201 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
203 /* at this point, the newly created shadow buffer is not referenced
204 * by any batches, but the existing rsc (probably) is. We need to
205 * transfer those references over:
207 debug_assert(shadow
->batch_mask
== 0);
208 struct fd_batch
*batch
;
209 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
210 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
211 _mesa_set_remove(batch
->resources
, entry
);
212 _mesa_set_add(batch
->resources
, shadow
);
214 swap(rsc
->batch_mask
, shadow
->batch_mask
);
216 mtx_unlock(&ctx
->screen
->lock
);
218 struct pipe_blit_info blit
= {};
219 blit
.dst
.resource
= prsc
;
220 blit
.dst
.format
= prsc
->format
;
221 blit
.src
.resource
= pshadow
;
222 blit
.src
.format
= pshadow
->format
;
223 blit
.mask
= util_format_get_mask(prsc
->format
);
224 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
226 #define set_box(field, val) do { \
227 blit.dst.field = (val); \
228 blit.src.field = (val); \
231 /* blit the other levels in their entirety: */
232 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
236 /* just blit whole level: */
238 set_box(box
.width
, u_minify(prsc
->width0
, l
));
239 set_box(box
.height
, u_minify(prsc
->height0
, l
));
240 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
242 do_blit(ctx
, &blit
, fallback
);
245 /* deal w/ current level specially, since we might need to split
246 * it up into a couple blits:
249 set_box(level
, level
);
251 switch (prsc
->target
) {
253 case PIPE_TEXTURE_1D
:
256 set_box(box
.height
, 1);
257 set_box(box
.depth
, 1);
261 set_box(box
.width
, box
->x
);
263 do_blit(ctx
, &blit
, fallback
);
265 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
266 set_box(box
.x
, box
->x
+ box
->width
);
267 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
269 do_blit(ctx
, &blit
, fallback
);
272 case PIPE_TEXTURE_2D
:
279 ctx
->in_shadow
= false;
281 pipe_resource_reference(&pshadow
, NULL
);
286 static struct fd_resource
*
287 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
288 unsigned level
, const struct pipe_box
*box
)
290 struct pipe_context
*pctx
= &ctx
->base
;
291 struct pipe_resource tmpl
= rsc
->base
;
293 tmpl
.width0
= box
->width
;
294 tmpl
.height0
= box
->height
;
295 /* for array textures, box->depth is the array_size, otherwise
296 * for 3d textures, it is the depth:
298 if (tmpl
.array_size
> 1) {
299 tmpl
.array_size
= box
->depth
;
303 tmpl
.depth0
= box
->depth
;
306 tmpl
.bind
|= PIPE_BIND_LINEAR
;
308 struct pipe_resource
*pstaging
=
309 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
313 return fd_resource(pstaging
);
317 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
319 struct pipe_resource
*dst
= trans
->base
.resource
;
320 struct pipe_blit_info blit
= {};
322 blit
.dst
.resource
= dst
;
323 blit
.dst
.format
= dst
->format
;
324 blit
.dst
.level
= trans
->base
.level
;
325 blit
.dst
.box
= trans
->base
.box
;
326 blit
.src
.resource
= trans
->staging_prsc
;
327 blit
.src
.format
= trans
->staging_prsc
->format
;
329 blit
.src
.box
= trans
->staging_box
;
330 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
331 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
333 do_blit(ctx
, &blit
, false);
337 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
339 struct pipe_resource
*src
= trans
->base
.resource
;
340 struct pipe_blit_info blit
= {};
342 blit
.src
.resource
= src
;
343 blit
.src
.format
= src
->format
;
344 blit
.src
.level
= trans
->base
.level
;
345 blit
.src
.box
= trans
->base
.box
;
346 blit
.dst
.resource
= trans
->staging_prsc
;
347 blit
.dst
.format
= trans
->staging_prsc
->format
;
349 blit
.dst
.box
= trans
->staging_box
;
350 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
351 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
353 do_blit(ctx
, &blit
, false);
356 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
357 struct pipe_transfer
*ptrans
,
358 const struct pipe_box
*box
)
360 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
362 if (ptrans
->resource
->target
== PIPE_BUFFER
)
363 util_range_add(&rsc
->valid_buffer_range
,
364 ptrans
->box
.x
+ box
->x
,
365 ptrans
->box
.x
+ box
->x
+ box
->width
);
369 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
371 struct fd_batch
*write_batch
= NULL
;
373 mtx_lock(&ctx
->screen
->lock
);
374 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
375 mtx_unlock(&ctx
->screen
->lock
);
377 if (usage
& PIPE_TRANSFER_WRITE
) {
378 struct fd_batch
*batch
, *batches
[32] = {};
381 /* This is a bit awkward, probably a fd_batch_flush_locked()
382 * would make things simpler.. but we need to hold the lock
383 * to iterate the batches which reference this resource. So
384 * we must first grab references under a lock, then flush.
386 mtx_lock(&ctx
->screen
->lock
);
387 batch_mask
= rsc
->batch_mask
;
388 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
389 fd_batch_reference_locked(&batches
[batch
->idx
], batch
);
390 mtx_unlock(&ctx
->screen
->lock
);
392 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
393 fd_batch_flush(batch
, false, false);
395 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
396 fd_batch_sync(batch
);
397 fd_batch_reference(&batches
[batch
->idx
], NULL
);
399 assert(rsc
->batch_mask
== 0);
400 } else if (write_batch
) {
401 fd_batch_flush(write_batch
, true, false);
404 fd_batch_reference(&write_batch
, NULL
);
406 assert(!rsc
->write_batch
);
410 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
412 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
416 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
417 struct pipe_transfer
*ptrans
)
419 struct fd_context
*ctx
= fd_context(pctx
);
420 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
421 struct fd_transfer
*trans
= fd_transfer(ptrans
);
423 if (trans
->staging_prsc
) {
424 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
425 fd_blit_from_staging(ctx
, trans
);
426 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
429 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
430 fd_bo_cpu_fini(rsc
->bo
);
433 util_range_add(&rsc
->valid_buffer_range
,
435 ptrans
->box
.x
+ ptrans
->box
.width
);
437 pipe_resource_reference(&ptrans
->resource
, NULL
);
438 slab_free(&ctx
->transfer_pool
, ptrans
);
442 fd_resource_transfer_map(struct pipe_context
*pctx
,
443 struct pipe_resource
*prsc
,
444 unsigned level
, unsigned usage
,
445 const struct pipe_box
*box
,
446 struct pipe_transfer
**pptrans
)
448 struct fd_context
*ctx
= fd_context(pctx
);
449 struct fd_resource
*rsc
= fd_resource(prsc
);
450 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
451 struct fd_transfer
*trans
;
452 struct pipe_transfer
*ptrans
;
453 enum pipe_format format
= prsc
->format
;
459 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
460 box
->width
, box
->height
, box
->x
, box
->y
);
462 ptrans
= slab_alloc(&ctx
->transfer_pool
);
466 /* slab_alloc_st() doesn't zero: */
467 trans
= fd_transfer(ptrans
);
468 memset(trans
, 0, sizeof(*trans
));
470 pipe_resource_reference(&ptrans
->resource
, prsc
);
471 ptrans
->level
= level
;
472 ptrans
->usage
= usage
;
474 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->cpp
;
475 ptrans
->layer_stride
= rsc
->layer_first
? rsc
->layer_size
: slice
->size0
;
477 /* we always need a staging texture for tiled buffers:
479 * TODO we might sometimes want to *also* shadow the resource to avoid
480 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
483 if (rsc
->tile_mode
) {
484 struct fd_resource
*staging_rsc
;
486 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
488 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
489 trans
->staging_prsc
= &staging_rsc
->base
;
490 trans
->base
.stride
= util_format_get_nblocksx(format
,
491 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
492 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
493 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
494 trans
->staging_box
= *box
;
495 trans
->staging_box
.x
= 0;
496 trans
->staging_box
.y
= 0;
497 trans
->staging_box
.z
= 0;
499 if (usage
& PIPE_TRANSFER_READ
) {
500 fd_blit_to_staging(ctx
, trans
);
502 struct fd_batch
*batch
= NULL
;
504 fd_context_lock(ctx
);
505 fd_batch_reference_locked(&batch
, staging_rsc
->write_batch
);
506 fd_context_unlock(ctx
);
508 /* we can't fd_bo_cpu_prep() until the blit to staging
509 * is submitted to kernel.. in that case write_batch
510 * wouldn't be NULL yet:
513 fd_batch_sync(batch
);
514 fd_batch_reference(&batch
, NULL
);
517 fd_bo_cpu_prep(staging_rsc
->bo
, ctx
->pipe
,
518 DRM_FREEDRENO_PREP_READ
);
521 buf
= fd_bo_map(staging_rsc
->bo
);
526 ctx
->stats
.staging_uploads
++;
532 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
533 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
535 if (usage
& PIPE_TRANSFER_READ
)
536 op
|= DRM_FREEDRENO_PREP_READ
;
538 if (usage
& PIPE_TRANSFER_WRITE
)
539 op
|= DRM_FREEDRENO_PREP_WRITE
;
541 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
542 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
543 rebind_resource(ctx
, prsc
);
544 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
545 prsc
->target
== PIPE_BUFFER
&&
546 !util_ranges_intersect(&rsc
->valid_buffer_range
,
547 box
->x
, box
->x
+ box
->width
)) {
548 /* We are trying to write to a previously uninitialized range. No need
551 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
552 struct fd_batch
*write_batch
= NULL
;
554 /* hold a reference, so it doesn't disappear under us: */
555 fd_context_lock(ctx
);
556 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
557 fd_context_unlock(ctx
);
559 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
560 write_batch
->back_blit
) {
561 /* if only thing pending is a back-blit, we can discard it: */
562 fd_batch_reset(write_batch
);
565 /* If the GPU is writing to the resource, or if it is reading from the
566 * resource and we're trying to write to it, flush the renders.
568 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
569 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
570 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
572 /* if we need to flush/stall, see if we can make a shadow buffer
575 * TODO we could go down this path !reorder && !busy_for_read
576 * ie. we only *don't* want to go down this path if the blit
577 * will trigger a flush!
579 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
580 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
581 /* try shadowing only if it avoids a flush, otherwise staging would
584 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
, box
)) {
585 needs_flush
= busy
= false;
586 rebind_resource(ctx
, prsc
);
587 ctx
->stats
.shadow_uploads
++;
589 struct fd_resource
*staging_rsc
;
592 flush_resource(ctx
, rsc
, usage
);
596 /* in this case, we don't need to shadow the whole resource,
597 * since any draw that references the previous contents has
598 * already had rendering flushed for all tiles. So we can
599 * use a staging buffer to do the upload.
601 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
603 trans
->staging_prsc
= &staging_rsc
->base
;
604 trans
->base
.stride
= util_format_get_nblocksx(format
,
605 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
606 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
607 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
608 trans
->staging_box
= *box
;
609 trans
->staging_box
.x
= 0;
610 trans
->staging_box
.y
= 0;
611 trans
->staging_box
.z
= 0;
612 buf
= fd_bo_map(staging_rsc
->bo
);
617 fd_batch_reference(&write_batch
, NULL
);
619 ctx
->stats
.staging_uploads
++;
627 flush_resource(ctx
, rsc
, usage
);
631 fd_batch_reference(&write_batch
, NULL
);
633 /* The GPU keeps track of how the various bo's are being used, and
634 * will wait if necessary for the proper operation to have
638 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
644 buf
= fd_bo_map(rsc
->bo
);
646 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
647 box
->x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
648 fd_resource_offset(rsc
, level
, box
->z
);
650 if (usage
& PIPE_TRANSFER_WRITE
)
658 fd_resource_transfer_unmap(pctx
, ptrans
);
663 fd_resource_destroy(struct pipe_screen
*pscreen
,
664 struct pipe_resource
*prsc
)
666 struct fd_resource
*rsc
= fd_resource(prsc
);
667 fd_bc_invalidate_resource(rsc
, true);
671 renderonly_scanout_destroy(rsc
->scanout
, fd_screen(pscreen
)->ro
);
673 util_range_destroy(&rsc
->valid_buffer_range
);
678 fd_resource_modifier(struct fd_resource
*rsc
)
681 return DRM_FORMAT_MOD_LINEAR
;
683 /* TODO invent a modifier for tiled but not UBWC buffers: */
684 return DRM_FORMAT_MOD_INVALID
;
688 fd_resource_get_handle(struct pipe_screen
*pscreen
,
689 struct pipe_context
*pctx
,
690 struct pipe_resource
*prsc
,
691 struct winsys_handle
*handle
,
694 struct fd_resource
*rsc
= fd_resource(prsc
);
696 handle
->modifier
= fd_resource_modifier(rsc
);
698 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->scanout
,
699 rsc
->slices
[0].pitch
* rsc
->cpp
, handle
);
703 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
705 struct pipe_resource
*prsc
= &rsc
->base
;
706 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
707 enum util_format_layout layout
= util_format_description(format
)->layout
;
708 uint32_t pitchalign
= screen
->gmem_alignw
;
709 uint32_t level
, size
= 0;
710 uint32_t width
= prsc
->width0
;
711 uint32_t height
= prsc
->height0
;
712 uint32_t depth
= prsc
->depth0
;
713 /* in layer_first layout, the level (slice) contains just one
714 * layer (since in fact the layer contains the slices)
716 uint32_t layers_in_level
= rsc
->layer_first
? 1 : prsc
->array_size
;
718 for (level
= 0; level
<= prsc
->last_level
; level
++) {
719 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
722 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
723 slice
->pitch
= width
=
724 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
726 slice
->pitch
= width
= align(width
, pitchalign
);
727 slice
->offset
= size
;
728 blocks
= util_format_get_nblocks(format
, width
, height
);
729 /* 1d array and 2d array textures must all have the same layer size
730 * for each miplevel on a3xx. 3d textures can have different layer
731 * sizes for high levels, but the hw auto-sizer is buggy (or at least
732 * different than what this code does), so as soon as the layer size
733 * range gets into range, we stop reducing it.
735 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
737 (level
> 1 && rsc
->slices
[level
- 1].size0
> 0xf000)))
738 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
739 else if (level
== 0 || rsc
->layer_first
|| alignment
== 1)
740 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
742 slice
->size0
= rsc
->slices
[level
- 1].size0
;
744 size
+= slice
->size0
* depth
* layers_in_level
;
746 width
= u_minify(width
, 1);
747 height
= u_minify(height
, 1);
748 depth
= u_minify(depth
, 1);
755 slice_alignment(enum pipe_texture_target target
)
757 /* on a3xx, 2d array and 3d textures seem to want their
758 * layers aligned to page boundaries:
761 case PIPE_TEXTURE_3D
:
762 case PIPE_TEXTURE_1D_ARRAY
:
763 case PIPE_TEXTURE_2D_ARRAY
:
770 /* cross generation texture layout to plug in to screen->setup_slices()..
771 * replace with generation specific one as-needed.
773 * TODO for a4xx probably can extract out the a4xx specific logic int
774 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
778 fd_setup_slices(struct fd_resource
*rsc
)
782 alignment
= slice_alignment(rsc
->base
.target
);
784 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
785 if (is_a4xx(screen
)) {
786 switch (rsc
->base
.target
) {
787 case PIPE_TEXTURE_3D
:
788 rsc
->layer_first
= false;
791 rsc
->layer_first
= true;
797 return setup_slices(rsc
, alignment
, rsc
->base
.format
);
800 /* special case to resize query buf after allocated.. */
802 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
804 struct fd_resource
*rsc
= fd_resource(prsc
);
806 debug_assert(prsc
->width0
== 0);
807 debug_assert(prsc
->target
== PIPE_BUFFER
);
808 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
811 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
814 // TODO common helper?
816 has_depth(enum pipe_format format
)
819 case PIPE_FORMAT_Z16_UNORM
:
820 case PIPE_FORMAT_Z32_UNORM
:
821 case PIPE_FORMAT_Z32_FLOAT
:
822 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
823 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
824 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
825 case PIPE_FORMAT_Z24X8_UNORM
:
826 case PIPE_FORMAT_X8Z24_UNORM
:
834 find_modifier(uint64_t needle
, const uint64_t *haystack
, int count
)
838 for (i
= 0; i
< count
; i
++) {
839 if (haystack
[i
] == needle
)
847 * Create a new texture object, using the given template info.
849 static struct pipe_resource
*
850 fd_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
851 const struct pipe_resource
*tmpl
,
852 const uint64_t *modifiers
, int count
)
854 struct fd_screen
*screen
= fd_screen(pscreen
);
855 struct fd_resource
*rsc
;
856 struct pipe_resource
*prsc
;
857 enum pipe_format format
= tmpl
->format
;
860 /* when using kmsro, scanout buffers are allocated on the display device
861 * create_with_modifiers() doesn't give us usage flags, so we have to
862 * assume that all calls with modifiers are scanout-possible
865 ((tmpl
->bind
& PIPE_BIND_SCANOUT
) ||
866 !(count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
))) {
867 struct pipe_resource scanout_templat
= *tmpl
;
868 struct renderonly_scanout
*scanout
;
869 struct winsys_handle handle
;
871 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
872 screen
->ro
, &handle
);
876 renderonly_scanout_destroy(scanout
, screen
->ro
);
878 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
879 rsc
= fd_resource(pscreen
->resource_from_handle(pscreen
, tmpl
,
881 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
882 close(handle
.handle
);
889 rsc
= CALLOC_STRUCT(fd_resource
);
892 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
893 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
894 tmpl
->target
, util_format_name(format
),
895 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
896 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
897 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
905 (PIPE_BIND_SCANOUT | \
907 PIPE_BIND_DISPLAY_TARGET)
909 bool linear
= find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
910 if (tmpl
->bind
& LINEAR
)
913 /* Normally, for non-shared buffers, allow buffer compression if
914 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
917 * TODO we should probably also limit tiled in a similar way,
918 * except we don't have a format modifier for tiled. (We probably
921 bool allow_ubwc
= find_modifier(DRM_FORMAT_MOD_INVALID
, modifiers
, count
);
922 if (tmpl
->bind
& PIPE_BIND_SHARED
)
923 allow_ubwc
= find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED
, modifiers
, count
);
925 if (screen
->tile_mode
&&
926 (tmpl
->target
!= PIPE_BUFFER
) &&
928 rsc
->tile_mode
= screen
->tile_mode(tmpl
);
931 pipe_reference_init(&prsc
->reference
, 1);
933 prsc
->screen
= pscreen
;
935 util_range_init(&rsc
->valid_buffer_range
);
937 rsc
->internal_format
= format
;
938 rsc
->cpp
= util_format_get_blocksize(format
);
939 rsc
->cpp
*= fd_resource_nr_samples(prsc
);
943 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
944 if ((is_a5xx(screen
) || is_a6xx(screen
)) &&
945 (fd_mesa_debug
& FD_DBG_LRZ
) && has_depth(format
)) {
946 const uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
947 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
948 unsigned lrz_pitch
= align(DIV_ROUND_UP(tmpl
->width0
, 8), 64);
949 unsigned lrz_height
= DIV_ROUND_UP(tmpl
->height0
, 8);
951 /* LRZ buffer is super-sampled: */
952 switch (prsc
->nr_samples
) {
959 unsigned size
= lrz_pitch
* lrz_height
* 2;
961 size
+= 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
963 rsc
->lrz_height
= lrz_height
;
964 rsc
->lrz_width
= lrz_pitch
;
965 rsc
->lrz_pitch
= lrz_pitch
;
966 rsc
->lrz
= fd_bo_new(screen
->dev
, size
, flags
, "lrz");
969 size
= screen
->setup_slices(rsc
);
971 if (allow_ubwc
&& screen
->fill_ubwc_buffer_sizes
&& rsc
->tile_mode
)
972 size
+= screen
->fill_ubwc_buffer_sizes(rsc
);
974 /* special case for hw-query buffer, which we need to allocate before we
978 /* note, semi-intention == instead of & */
979 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
983 if (rsc
->layer_first
) {
984 rsc
->layer_size
= align(size
, 4096);
985 size
= rsc
->layer_size
* prsc
->array_size
;
988 realloc_bo(rsc
, size
);
994 fd_resource_destroy(pscreen
, prsc
);
998 static struct pipe_resource
*
999 fd_resource_create(struct pipe_screen
*pscreen
,
1000 const struct pipe_resource
*tmpl
)
1002 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
1003 return fd_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
1007 is_supported_modifier(struct pipe_screen
*pscreen
, enum pipe_format pfmt
,
1012 /* Get the count of supported modifiers: */
1013 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, 0, NULL
, NULL
, &count
);
1015 /* Get the supported modifiers: */
1016 uint64_t modifiers
[count
];
1017 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, count
, modifiers
, NULL
, &count
);
1019 for (int i
= 0; i
< count
; i
++)
1020 if (modifiers
[i
] == mod
)
1027 * Create a texture from a winsys_handle. The handle is often created in
1028 * another process by first creating a pipe texture and then calling
1029 * resource_get_handle.
1031 static struct pipe_resource
*
1032 fd_resource_from_handle(struct pipe_screen
*pscreen
,
1033 const struct pipe_resource
*tmpl
,
1034 struct winsys_handle
*handle
, unsigned usage
)
1036 struct fd_screen
*screen
= fd_screen(pscreen
);
1037 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
1038 struct fd_resource_slice
*slice
= &rsc
->slices
[0];
1039 struct pipe_resource
*prsc
= &rsc
->base
;
1040 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
1042 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1043 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1044 tmpl
->target
, util_format_name(tmpl
->format
),
1045 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
1046 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
1047 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
1054 pipe_reference_init(&prsc
->reference
, 1);
1056 prsc
->screen
= pscreen
;
1058 util_range_init(&rsc
->valid_buffer_range
);
1060 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
1064 rsc
->internal_format
= tmpl
->format
;
1065 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
1066 rsc
->cpp
*= fd_resource_nr_samples(prsc
);
1067 slice
->pitch
= handle
->stride
/ rsc
->cpp
;
1068 slice
->offset
= handle
->offset
;
1069 slice
->size0
= handle
->stride
* prsc
->height0
;
1071 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
1072 (slice
->pitch
& (pitchalign
- 1)))
1075 if (handle
->modifier
== DRM_FORMAT_MOD_QCOM_COMPRESSED
) {
1076 if (!is_supported_modifier(pscreen
, tmpl
->format
,
1077 DRM_FORMAT_MOD_QCOM_COMPRESSED
)) {
1078 DBG("bad modifier: %lx", handle
->modifier
);
1081 debug_assert(screen
->fill_ubwc_buffer_sizes
);
1082 screen
->fill_ubwc_buffer_sizes(rsc
);
1083 } else if (handle
->modifier
&&
1084 (handle
->modifier
!= DRM_FORMAT_MOD_INVALID
)) {
1092 renderonly_create_gpu_import_for_resource(prsc
, screen
->ro
, NULL
);
1093 /* failure is expected in some cases.. */
1099 fd_resource_destroy(pscreen
, prsc
);
1104 fd_render_condition_check(struct pipe_context
*pctx
)
1106 struct fd_context
*ctx
= fd_context(pctx
);
1108 if (!ctx
->cond_query
)
1111 union pipe_query_result res
= { 0 };
1113 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1114 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1116 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1117 return (bool)res
.u64
!= ctx
->cond_cond
;
1123 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1125 struct fd_context
*ctx
= fd_context(pctx
);
1126 struct fd_resource
*rsc
= fd_resource(prsc
);
1129 * TODO I guess we could track that the resource is invalidated and
1130 * use that as a hint to realloc rather than stall in _transfer_map(),
1131 * even in the non-DISCARD_WHOLE_RESOURCE case?
1133 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1136 if (rsc
->write_batch
) {
1137 struct fd_batch
*batch
= rsc
->write_batch
;
1138 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1140 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
) {
1141 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1142 ctx
->dirty
|= FD_DIRTY_ZSA
;
1145 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1146 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1147 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1148 ctx
->dirty
|= FD_DIRTY_FRAMEBUFFER
;
1156 static enum pipe_format
1157 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1159 return fd_resource(prsc
)->internal_format
;
1163 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1164 struct pipe_resource
*stencil
)
1166 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1169 static struct pipe_resource
*
1170 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1172 struct fd_resource
*rsc
= fd_resource(prsc
);
1174 return &rsc
->stencil
->base
;
1178 static const struct u_transfer_vtbl transfer_vtbl
= {
1179 .resource_create
= fd_resource_create
,
1180 .resource_destroy
= fd_resource_destroy
,
1181 .transfer_map
= fd_resource_transfer_map
,
1182 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1183 .transfer_unmap
= fd_resource_transfer_unmap
,
1184 .get_internal_format
= fd_resource_get_internal_format
,
1185 .set_stencil
= fd_resource_set_stencil
,
1186 .get_stencil
= fd_resource_get_stencil
,
1190 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1192 struct fd_screen
*screen
= fd_screen(pscreen
);
1193 bool fake_rgtc
= screen
->gpu_id
< 400;
1195 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1196 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1199 pscreen
->resource_create_with_modifiers
= fd_resource_create_with_modifiers
;
1200 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1201 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1202 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1204 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1205 true, false, fake_rgtc
, true);
1207 if (!screen
->setup_slices
)
1208 screen
->setup_slices
= fd_setup_slices
;
1212 fd_get_sample_position(struct pipe_context
*context
,
1213 unsigned sample_count
, unsigned sample_index
,
1216 /* The following is copied from nouveau/nv50 except for position
1217 * values, which are taken from blob driver */
1218 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1219 static const uint8_t pos2
[2][2] = {
1220 { 0xc, 0xc }, { 0x4, 0x4 } };
1221 static const uint8_t pos4
[4][2] = {
1222 { 0x6, 0x2 }, { 0xe, 0x6 },
1223 { 0x2, 0xa }, { 0xa, 0xe } };
1224 /* TODO needs to be verified on supported hw */
1225 static const uint8_t pos8
[8][2] = {
1226 { 0x9, 0x5 }, { 0x7, 0xb },
1227 { 0xd, 0x9 }, { 0x5, 0x3 },
1228 { 0x3, 0xd }, { 0x1, 0x7 },
1229 { 0xb, 0xf }, { 0xf, 0x1 } };
1231 const uint8_t (*ptr
)[2];
1233 switch (sample_count
) {
1251 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1252 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1256 fd_blit_pipe(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1258 /* wrap fd_blit to return void */
1259 fd_blit(pctx
, blit_info
);
1263 fd_resource_context_init(struct pipe_context
*pctx
)
1265 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1266 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1267 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1268 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1269 pctx
->texture_subdata
= u_default_texture_subdata
;
1270 pctx
->create_surface
= fd_create_surface
;
1271 pctx
->surface_destroy
= fd_surface_destroy
;
1272 pctx
->resource_copy_region
= fd_resource_copy_region
;
1273 pctx
->blit
= fd_blit_pipe
;
1274 pctx
->flush_resource
= fd_flush_resource
;
1275 pctx
->invalidate_resource
= fd_invalidate_resource
;
1276 pctx
->get_sample_position
= fd_get_sample_position
;