2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
27 #include "util/u_format.h"
28 #include "util/u_format_rgtc.h"
29 #include "util/u_format_zs.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
35 #include "util/u_drm.h"
37 #include "freedreno_resource.h"
38 #include "freedreno_batch_cache.h"
39 #include "freedreno_blitter.h"
40 #include "freedreno_fence.h"
41 #include "freedreno_screen.h"
42 #include "freedreno_surface.h"
43 #include "freedreno_context.h"
44 #include "freedreno_query_hw.h"
45 #include "freedreno_util.h"
47 #include "drm-uapi/drm_fourcc.h"
50 /* XXX this should go away, needed for 'struct winsys_handle' */
51 #include "state_tracker/drm_driver.h"
54 * Go through the entire state and see if the resource is bound
55 * anywhere. If it is, mark the relevant state as dirty. This is
56 * called on realloc_bo to ensure the neccessary state is re-
57 * emitted so the GPU looks at the new backing bo.
60 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
63 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
64 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
65 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
68 /* per-shader-stage resources: */
69 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
70 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
71 * cmdstream rather than by pointer..
73 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
74 for (unsigned i
= 1; i
< num_ubos
; i
++) {
75 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
77 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
78 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
82 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
83 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
85 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
86 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
90 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
91 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
92 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
94 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
95 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
101 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
103 struct pipe_resource
*prsc
= &rsc
->base
;
104 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
105 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
106 DRM_FREEDRENO_GEM_TYPE_KMEM
|
107 COND(prsc
->bind
& PIPE_BIND_SCANOUT
, DRM_FREEDRENO_GEM_SCANOUT
);
108 /* TODO other flags? */
110 /* if we start using things other than write-combine,
111 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
117 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
, "%ux%ux%u@%u:%x",
118 prsc
->width0
, prsc
->height0
, prsc
->depth0
, rsc
->cpp
, prsc
->bind
);
119 rsc
->seqno
= p_atomic_inc_return(&screen
->rsc_seqno
);
120 util_range_set_empty(&rsc
->valid_buffer_range
);
121 fd_bc_invalidate_resource(rsc
, true);
125 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
127 struct pipe_context
*pctx
= &ctx
->base
;
129 /* TODO size threshold too?? */
130 if (fallback
|| !fd_blit(pctx
, blit
)) {
131 /* do blit on cpu: */
132 util_resource_copy_region(pctx
,
133 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
134 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
135 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
140 * @rsc: the resource to shadow
141 * @level: the level to discard (if box != NULL, otherwise ignored)
142 * @box: the box to discard (or NULL if none)
143 * @modifier: the modifier for the new buffer state
146 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
147 unsigned level
, const struct pipe_box
*box
, uint64_t modifier
)
149 struct pipe_context
*pctx
= &ctx
->base
;
150 struct pipe_resource
*prsc
= &rsc
->base
;
151 bool fallback
= false;
156 /* TODO: somehow munge dimensions and format to copy unsupported
157 * render target format to something that is supported?
159 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
160 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
161 prsc
->nr_storage_samples
,
162 PIPE_BIND_RENDER_TARGET
))
165 /* do shadowing back-blits on the cpu for buffers: */
166 if (prsc
->target
== PIPE_BUFFER
)
169 bool discard_whole_level
= box
&& util_texrange_covers_whole_level(prsc
, level
,
170 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
172 /* TODO need to be more clever about current level */
173 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && box
&& !discard_whole_level
)
176 struct pipe_resource
*pshadow
=
177 pctx
->screen
->resource_create_with_modifiers(pctx
->screen
,
183 assert(!ctx
->in_shadow
);
184 ctx
->in_shadow
= true;
186 /* get rid of any references that batch-cache might have to us (which
187 * should empty/destroy rsc->batches hashset)
189 fd_bc_invalidate_resource(rsc
, false);
191 mtx_lock(&ctx
->screen
->lock
);
193 /* Swap the backing bo's, so shadow becomes the old buffer,
194 * blit from shadow to new buffer. From here on out, we
197 * Note that we need to do it in this order, otherwise if
198 * we go down cpu blit path, the recursive transfer_map()
199 * sees the wrong status..
201 struct fd_resource
*shadow
= fd_resource(pshadow
);
203 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
204 shadow
, shadow
->base
.reference
.count
);
206 /* TODO valid_buffer_range?? */
207 swap(rsc
->bo
, shadow
->bo
);
208 swap(rsc
->write_batch
, shadow
->write_batch
);
209 swap(rsc
->offset
, shadow
->offset
);
210 swap(rsc
->ubwc_offset
, shadow
->ubwc_offset
);
211 swap(rsc
->ubwc_pitch
, shadow
->ubwc_pitch
);
212 swap(rsc
->ubwc_size
, shadow
->ubwc_size
);
213 rsc
->seqno
= p_atomic_inc_return(&ctx
->screen
->rsc_seqno
);
215 /* at this point, the newly created shadow buffer is not referenced
216 * by any batches, but the existing rsc (probably) is. We need to
217 * transfer those references over:
219 debug_assert(shadow
->batch_mask
== 0);
220 struct fd_batch
*batch
;
221 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
222 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
223 _mesa_set_remove(batch
->resources
, entry
);
224 _mesa_set_add(batch
->resources
, shadow
);
226 swap(rsc
->batch_mask
, shadow
->batch_mask
);
228 mtx_unlock(&ctx
->screen
->lock
);
230 struct pipe_blit_info blit
= {};
231 blit
.dst
.resource
= prsc
;
232 blit
.dst
.format
= prsc
->format
;
233 blit
.src
.resource
= pshadow
;
234 blit
.src
.format
= pshadow
->format
;
235 blit
.mask
= util_format_get_mask(prsc
->format
);
236 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
238 #define set_box(field, val) do { \
239 blit.dst.field = (val); \
240 blit.src.field = (val); \
243 /* blit the other levels in their entirety: */
244 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
245 if (box
&& l
== level
)
248 /* just blit whole level: */
250 set_box(box
.width
, u_minify(prsc
->width0
, l
));
251 set_box(box
.height
, u_minify(prsc
->height0
, l
));
252 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
254 do_blit(ctx
, &blit
, fallback
);
257 /* deal w/ current level specially, since we might need to split
258 * it up into a couple blits:
260 if (box
&& !discard_whole_level
) {
261 set_box(level
, level
);
263 switch (prsc
->target
) {
265 case PIPE_TEXTURE_1D
:
268 set_box(box
.height
, 1);
269 set_box(box
.depth
, 1);
273 set_box(box
.width
, box
->x
);
275 do_blit(ctx
, &blit
, fallback
);
277 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
278 set_box(box
.x
, box
->x
+ box
->width
);
279 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
281 do_blit(ctx
, &blit
, fallback
);
284 case PIPE_TEXTURE_2D
:
291 ctx
->in_shadow
= false;
293 pipe_resource_reference(&pshadow
, NULL
);
298 static struct fd_resource
*
299 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
300 unsigned level
, const struct pipe_box
*box
)
302 struct pipe_context
*pctx
= &ctx
->base
;
303 struct pipe_resource tmpl
= rsc
->base
;
305 tmpl
.width0
= box
->width
;
306 tmpl
.height0
= box
->height
;
307 /* for array textures, box->depth is the array_size, otherwise
308 * for 3d textures, it is the depth:
310 if (tmpl
.array_size
> 1) {
311 tmpl
.array_size
= box
->depth
;
315 tmpl
.depth0
= box
->depth
;
318 tmpl
.bind
|= PIPE_BIND_LINEAR
;
320 struct pipe_resource
*pstaging
=
321 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
325 return fd_resource(pstaging
);
329 fd_blit_from_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
331 struct pipe_resource
*dst
= trans
->base
.resource
;
332 struct pipe_blit_info blit
= {};
334 blit
.dst
.resource
= dst
;
335 blit
.dst
.format
= dst
->format
;
336 blit
.dst
.level
= trans
->base
.level
;
337 blit
.dst
.box
= trans
->base
.box
;
338 blit
.src
.resource
= trans
->staging_prsc
;
339 blit
.src
.format
= trans
->staging_prsc
->format
;
341 blit
.src
.box
= trans
->staging_box
;
342 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
343 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
345 do_blit(ctx
, &blit
, false);
349 fd_blit_to_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
351 struct pipe_resource
*src
= trans
->base
.resource
;
352 struct pipe_blit_info blit
= {};
354 blit
.src
.resource
= src
;
355 blit
.src
.format
= src
->format
;
356 blit
.src
.level
= trans
->base
.level
;
357 blit
.src
.box
= trans
->base
.box
;
358 blit
.dst
.resource
= trans
->staging_prsc
;
359 blit
.dst
.format
= trans
->staging_prsc
->format
;
361 blit
.dst
.box
= trans
->staging_box
;
362 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
363 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
365 do_blit(ctx
, &blit
, false);
368 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
369 struct pipe_transfer
*ptrans
,
370 const struct pipe_box
*box
)
372 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
374 if (ptrans
->resource
->target
== PIPE_BUFFER
)
375 util_range_add(&rsc
->valid_buffer_range
,
376 ptrans
->box
.x
+ box
->x
,
377 ptrans
->box
.x
+ box
->x
+ box
->width
);
381 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
383 struct fd_batch
*write_batch
= NULL
;
385 mtx_lock(&ctx
->screen
->lock
);
386 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
387 mtx_unlock(&ctx
->screen
->lock
);
389 if (usage
& PIPE_TRANSFER_WRITE
) {
390 struct fd_batch
*batch
, *batches
[32] = {};
393 /* This is a bit awkward, probably a fd_batch_flush_locked()
394 * would make things simpler.. but we need to hold the lock
395 * to iterate the batches which reference this resource. So
396 * we must first grab references under a lock, then flush.
398 mtx_lock(&ctx
->screen
->lock
);
399 batch_mask
= rsc
->batch_mask
;
400 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
401 fd_batch_reference_locked(&batches
[batch
->idx
], batch
);
402 mtx_unlock(&ctx
->screen
->lock
);
404 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
405 fd_batch_flush(batch
, false, false);
407 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
408 fd_batch_sync(batch
);
409 fd_batch_reference(&batches
[batch
->idx
], NULL
);
411 assert(rsc
->batch_mask
== 0);
412 } else if (write_batch
) {
413 fd_batch_flush(write_batch
, true, false);
416 fd_batch_reference(&write_batch
, NULL
);
418 assert(!rsc
->write_batch
);
422 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
424 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
428 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
429 struct pipe_transfer
*ptrans
)
431 struct fd_context
*ctx
= fd_context(pctx
);
432 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
433 struct fd_transfer
*trans
= fd_transfer(ptrans
);
435 if (trans
->staging_prsc
) {
436 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
)
437 fd_blit_from_staging(ctx
, trans
);
438 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
441 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
442 fd_bo_cpu_fini(rsc
->bo
);
445 util_range_add(&rsc
->valid_buffer_range
,
447 ptrans
->box
.x
+ ptrans
->box
.width
);
449 pipe_resource_reference(&ptrans
->resource
, NULL
);
450 slab_free(&ctx
->transfer_pool
, ptrans
);
454 fd_resource_transfer_map(struct pipe_context
*pctx
,
455 struct pipe_resource
*prsc
,
456 unsigned level
, unsigned usage
,
457 const struct pipe_box
*box
,
458 struct pipe_transfer
**pptrans
)
460 struct fd_context
*ctx
= fd_context(pctx
);
461 struct fd_resource
*rsc
= fd_resource(prsc
);
462 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
463 struct fd_transfer
*trans
;
464 struct pipe_transfer
*ptrans
;
465 enum pipe_format format
= prsc
->format
;
471 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
472 box
->width
, box
->height
, box
->x
, box
->y
);
474 ptrans
= slab_alloc(&ctx
->transfer_pool
);
478 /* slab_alloc_st() doesn't zero: */
479 trans
= fd_transfer(ptrans
);
480 memset(trans
, 0, sizeof(*trans
));
482 pipe_resource_reference(&ptrans
->resource
, prsc
);
483 ptrans
->level
= level
;
484 ptrans
->usage
= usage
;
486 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->cpp
;
487 ptrans
->layer_stride
= rsc
->layer_first
? rsc
->layer_size
: slice
->size0
;
489 /* we always need a staging texture for tiled buffers:
491 * TODO we might sometimes want to *also* shadow the resource to avoid
492 * splitting a batch.. for ex, mid-frame texture uploads to a tiled
495 if (rsc
->tile_mode
) {
496 struct fd_resource
*staging_rsc
;
498 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
500 // TODO for PIPE_TRANSFER_READ, need to do untiling blit..
501 trans
->staging_prsc
= &staging_rsc
->base
;
502 trans
->base
.stride
= util_format_get_nblocksx(format
,
503 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
504 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
505 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
506 trans
->staging_box
= *box
;
507 trans
->staging_box
.x
= 0;
508 trans
->staging_box
.y
= 0;
509 trans
->staging_box
.z
= 0;
511 if (usage
& PIPE_TRANSFER_READ
) {
512 fd_blit_to_staging(ctx
, trans
);
514 struct fd_batch
*batch
= NULL
;
516 fd_context_lock(ctx
);
517 fd_batch_reference_locked(&batch
, staging_rsc
->write_batch
);
518 fd_context_unlock(ctx
);
520 /* we can't fd_bo_cpu_prep() until the blit to staging
521 * is submitted to kernel.. in that case write_batch
522 * wouldn't be NULL yet:
525 fd_batch_sync(batch
);
526 fd_batch_reference(&batch
, NULL
);
529 fd_bo_cpu_prep(staging_rsc
->bo
, ctx
->pipe
,
530 DRM_FREEDRENO_PREP_READ
);
533 buf
= fd_bo_map(staging_rsc
->bo
);
538 ctx
->stats
.staging_uploads
++;
544 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
545 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
547 if (usage
& PIPE_TRANSFER_READ
)
548 op
|= DRM_FREEDRENO_PREP_READ
;
550 if (usage
& PIPE_TRANSFER_WRITE
)
551 op
|= DRM_FREEDRENO_PREP_WRITE
;
553 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
554 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
555 rebind_resource(ctx
, prsc
);
556 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
557 prsc
->target
== PIPE_BUFFER
&&
558 !util_ranges_intersect(&rsc
->valid_buffer_range
,
559 box
->x
, box
->x
+ box
->width
)) {
560 /* We are trying to write to a previously uninitialized range. No need
563 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
564 struct fd_batch
*write_batch
= NULL
;
566 /* hold a reference, so it doesn't disappear under us: */
567 fd_context_lock(ctx
);
568 fd_batch_reference_locked(&write_batch
, rsc
->write_batch
);
569 fd_context_unlock(ctx
);
571 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
572 write_batch
->back_blit
) {
573 /* if only thing pending is a back-blit, we can discard it: */
574 fd_batch_reset(write_batch
);
577 /* If the GPU is writing to the resource, or if it is reading from the
578 * resource and we're trying to write to it, flush the renders.
580 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
581 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
582 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
584 /* if we need to flush/stall, see if we can make a shadow buffer
587 * TODO we could go down this path !reorder && !busy_for_read
588 * ie. we only *don't* want to go down this path if the blit
589 * will trigger a flush!
591 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
592 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
593 /* try shadowing only if it avoids a flush, otherwise staging would
596 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
,
597 box
, DRM_FORMAT_MOD_LINEAR
)) {
598 needs_flush
= busy
= false;
599 rebind_resource(ctx
, prsc
);
600 ctx
->stats
.shadow_uploads
++;
602 struct fd_resource
*staging_rsc
;
605 flush_resource(ctx
, rsc
, usage
);
609 /* in this case, we don't need to shadow the whole resource,
610 * since any draw that references the previous contents has
611 * already had rendering flushed for all tiles. So we can
612 * use a staging buffer to do the upload.
614 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
616 trans
->staging_prsc
= &staging_rsc
->base
;
617 trans
->base
.stride
= util_format_get_nblocksx(format
,
618 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
619 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
620 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
621 trans
->staging_box
= *box
;
622 trans
->staging_box
.x
= 0;
623 trans
->staging_box
.y
= 0;
624 trans
->staging_box
.z
= 0;
625 buf
= fd_bo_map(staging_rsc
->bo
);
630 fd_batch_reference(&write_batch
, NULL
);
632 ctx
->stats
.staging_uploads
++;
640 flush_resource(ctx
, rsc
, usage
);
644 fd_batch_reference(&write_batch
, NULL
);
646 /* The GPU keeps track of how the various bo's are being used, and
647 * will wait if necessary for the proper operation to have
651 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
657 buf
= fd_bo_map(rsc
->bo
);
659 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
660 box
->x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
661 fd_resource_offset(rsc
, level
, box
->z
);
663 if (usage
& PIPE_TRANSFER_WRITE
)
671 fd_resource_transfer_unmap(pctx
, ptrans
);
676 fd_resource_destroy(struct pipe_screen
*pscreen
,
677 struct pipe_resource
*prsc
)
679 struct fd_resource
*rsc
= fd_resource(prsc
);
680 fd_bc_invalidate_resource(rsc
, true);
684 renderonly_scanout_destroy(rsc
->scanout
, fd_screen(pscreen
)->ro
);
686 util_range_destroy(&rsc
->valid_buffer_range
);
691 fd_resource_modifier(struct fd_resource
*rsc
)
694 return DRM_FORMAT_MOD_LINEAR
;
697 return DRM_FORMAT_MOD_QCOM_COMPRESSED
;
699 /* TODO invent a modifier for tiled but not UBWC buffers: */
700 return DRM_FORMAT_MOD_INVALID
;
704 fd_resource_get_handle(struct pipe_screen
*pscreen
,
705 struct pipe_context
*pctx
,
706 struct pipe_resource
*prsc
,
707 struct winsys_handle
*handle
,
710 struct fd_resource
*rsc
= fd_resource(prsc
);
712 handle
->modifier
= fd_resource_modifier(rsc
);
714 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->scanout
,
715 rsc
->slices
[0].pitch
* rsc
->cpp
, handle
);
719 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
721 struct pipe_resource
*prsc
= &rsc
->base
;
722 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
723 enum util_format_layout layout
= util_format_description(format
)->layout
;
724 uint32_t pitchalign
= screen
->gmem_alignw
;
725 uint32_t level
, size
= 0;
726 uint32_t width
= prsc
->width0
;
727 uint32_t height
= prsc
->height0
;
728 uint32_t depth
= prsc
->depth0
;
729 /* in layer_first layout, the level (slice) contains just one
730 * layer (since in fact the layer contains the slices)
732 uint32_t layers_in_level
= rsc
->layer_first
? 1 : prsc
->array_size
;
734 for (level
= 0; level
<= prsc
->last_level
; level
++) {
735 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
738 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
739 slice
->pitch
= width
=
740 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
742 slice
->pitch
= width
= align(width
, pitchalign
);
743 slice
->offset
= size
;
744 blocks
= util_format_get_nblocks(format
, width
, height
);
745 /* 1d array and 2d array textures must all have the same layer size
746 * for each miplevel on a3xx. 3d textures can have different layer
747 * sizes for high levels, but the hw auto-sizer is buggy (or at least
748 * different than what this code does), so as soon as the layer size
749 * range gets into range, we stop reducing it.
751 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
753 (level
> 1 && rsc
->slices
[level
- 1].size0
> 0xf000)))
754 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
755 else if (level
== 0 || rsc
->layer_first
|| alignment
== 1)
756 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
758 slice
->size0
= rsc
->slices
[level
- 1].size0
;
760 size
+= slice
->size0
* depth
* layers_in_level
;
762 width
= u_minify(width
, 1);
763 height
= u_minify(height
, 1);
764 depth
= u_minify(depth
, 1);
771 slice_alignment(enum pipe_texture_target target
)
773 /* on a3xx, 2d array and 3d textures seem to want their
774 * layers aligned to page boundaries:
777 case PIPE_TEXTURE_3D
:
778 case PIPE_TEXTURE_1D_ARRAY
:
779 case PIPE_TEXTURE_2D_ARRAY
:
786 /* cross generation texture layout to plug in to screen->setup_slices()..
787 * replace with generation specific one as-needed.
789 * TODO for a4xx probably can extract out the a4xx specific logic int
790 * a small fd4_setup_slices() wrapper that sets up layer_first, and then
794 fd_setup_slices(struct fd_resource
*rsc
)
798 alignment
= slice_alignment(rsc
->base
.target
);
800 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
801 if (is_a4xx(screen
)) {
802 switch (rsc
->base
.target
) {
803 case PIPE_TEXTURE_3D
:
804 rsc
->layer_first
= false;
807 rsc
->layer_first
= true;
813 return setup_slices(rsc
, alignment
, rsc
->base
.format
);
816 /* special case to resize query buf after allocated.. */
818 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
820 struct fd_resource
*rsc
= fd_resource(prsc
);
822 debug_assert(prsc
->width0
== 0);
823 debug_assert(prsc
->target
== PIPE_BUFFER
);
824 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
827 realloc_bo(rsc
, fd_screen(prsc
->screen
)->setup_slices(rsc
));
830 // TODO common helper?
832 has_depth(enum pipe_format format
)
835 case PIPE_FORMAT_Z16_UNORM
:
836 case PIPE_FORMAT_Z32_UNORM
:
837 case PIPE_FORMAT_Z32_FLOAT
:
838 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
839 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
840 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
841 case PIPE_FORMAT_Z24X8_UNORM
:
842 case PIPE_FORMAT_X8Z24_UNORM
:
850 * Create a new texture object, using the given template info.
852 static struct pipe_resource
*
853 fd_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
854 const struct pipe_resource
*tmpl
,
855 const uint64_t *modifiers
, int count
)
857 struct fd_screen
*screen
= fd_screen(pscreen
);
858 struct fd_resource
*rsc
;
859 struct pipe_resource
*prsc
;
860 enum pipe_format format
= tmpl
->format
;
863 /* when using kmsro, scanout buffers are allocated on the display device
864 * create_with_modifiers() doesn't give us usage flags, so we have to
865 * assume that all calls with modifiers are scanout-possible
868 ((tmpl
->bind
& PIPE_BIND_SCANOUT
) ||
869 !(count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
))) {
870 struct pipe_resource scanout_templat
= *tmpl
;
871 struct renderonly_scanout
*scanout
;
872 struct winsys_handle handle
;
874 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
875 screen
->ro
, &handle
);
879 renderonly_scanout_destroy(scanout
, screen
->ro
);
881 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
882 rsc
= fd_resource(pscreen
->resource_from_handle(pscreen
, tmpl
,
884 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
885 close(handle
.handle
);
892 rsc
= CALLOC_STRUCT(fd_resource
);
895 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
896 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
897 tmpl
->target
, util_format_name(format
),
898 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
899 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
900 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
908 (PIPE_BIND_SCANOUT | \
910 PIPE_BIND_DISPLAY_TARGET)
912 bool linear
= drm_find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
913 if (tmpl
->bind
& LINEAR
)
916 /* Normally, for non-shared buffers, allow buffer compression if
917 * not shared, otherwise only allow if QCOM_COMPRESSED modifier
920 * TODO we should probably also limit tiled in a similar way,
921 * except we don't have a format modifier for tiled. (We probably
924 bool allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_INVALID
, modifiers
, count
);
925 if (tmpl
->bind
& PIPE_BIND_SHARED
)
926 allow_ubwc
= drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED
, modifiers
, count
);
928 /* TODO turn on UBWC for all internal buffers
930 * There are still some regressions in deqp with UBWC enabled. I
931 * think it is mostly related to sampler/image views using a format
932 * that doesn't support compression with a resource created with
933 * a format that does. We need to track the compression state of
934 * a buffer and do an (in-place, hopefully?) resolve if it is re-
935 * interpreted with a format that does not support compression.
937 * It is possible (likely?) that we can't do atomic ops on a
938 * compressed buffer as well, so this would also require transition
939 * to a compressed state.
941 allow_ubwc
&= !!(fd_mesa_debug
& FD_DBG_UBWC
);
943 if (screen
->tile_mode
&&
944 (tmpl
->target
!= PIPE_BUFFER
) &&
946 rsc
->tile_mode
= screen
->tile_mode(tmpl
);
949 pipe_reference_init(&prsc
->reference
, 1);
951 prsc
->screen
= pscreen
;
953 util_range_init(&rsc
->valid_buffer_range
);
955 rsc
->internal_format
= format
;
956 rsc
->cpp
= util_format_get_blocksize(format
);
957 rsc
->cpp
*= fd_resource_nr_samples(prsc
);
961 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
962 if ((is_a5xx(screen
) || is_a6xx(screen
)) &&
963 (fd_mesa_debug
& FD_DBG_LRZ
) && has_depth(format
)) {
964 const uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
965 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
966 unsigned lrz_pitch
= align(DIV_ROUND_UP(tmpl
->width0
, 8), 64);
967 unsigned lrz_height
= DIV_ROUND_UP(tmpl
->height0
, 8);
969 /* LRZ buffer is super-sampled: */
970 switch (prsc
->nr_samples
) {
977 unsigned size
= lrz_pitch
* lrz_height
* 2;
979 size
+= 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
981 rsc
->lrz_height
= lrz_height
;
982 rsc
->lrz_width
= lrz_pitch
;
983 rsc
->lrz_pitch
= lrz_pitch
;
984 rsc
->lrz
= fd_bo_new(screen
->dev
, size
, flags
, "lrz");
987 size
= screen
->setup_slices(rsc
);
989 if (allow_ubwc
&& screen
->fill_ubwc_buffer_sizes
&& rsc
->tile_mode
)
990 size
+= screen
->fill_ubwc_buffer_sizes(rsc
);
992 /* special case for hw-query buffer, which we need to allocate before we
996 /* note, semi-intention == instead of & */
997 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
1001 if (rsc
->layer_first
) {
1002 rsc
->layer_size
= align(size
, 4096);
1003 size
= rsc
->layer_size
* prsc
->array_size
;
1006 realloc_bo(rsc
, size
);
1012 fd_resource_destroy(pscreen
, prsc
);
1016 static struct pipe_resource
*
1017 fd_resource_create(struct pipe_screen
*pscreen
,
1018 const struct pipe_resource
*tmpl
)
1020 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
1021 return fd_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
1025 is_supported_modifier(struct pipe_screen
*pscreen
, enum pipe_format pfmt
,
1030 /* Get the count of supported modifiers: */
1031 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, 0, NULL
, NULL
, &count
);
1033 /* Get the supported modifiers: */
1034 uint64_t modifiers
[count
];
1035 pscreen
->query_dmabuf_modifiers(pscreen
, pfmt
, count
, modifiers
, NULL
, &count
);
1037 for (int i
= 0; i
< count
; i
++)
1038 if (modifiers
[i
] == mod
)
1045 * Create a texture from a winsys_handle. The handle is often created in
1046 * another process by first creating a pipe texture and then calling
1047 * resource_get_handle.
1049 static struct pipe_resource
*
1050 fd_resource_from_handle(struct pipe_screen
*pscreen
,
1051 const struct pipe_resource
*tmpl
,
1052 struct winsys_handle
*handle
, unsigned usage
)
1054 struct fd_screen
*screen
= fd_screen(pscreen
);
1055 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
1056 struct fd_resource_slice
*slice
= &rsc
->slices
[0];
1057 struct pipe_resource
*prsc
= &rsc
->base
;
1058 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
1060 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
1061 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
1062 tmpl
->target
, util_format_name(tmpl
->format
),
1063 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
1064 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
1065 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
1072 pipe_reference_init(&prsc
->reference
, 1);
1074 prsc
->screen
= pscreen
;
1076 util_range_init(&rsc
->valid_buffer_range
);
1078 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
1082 rsc
->internal_format
= tmpl
->format
;
1083 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
1084 rsc
->cpp
*= fd_resource_nr_samples(prsc
);
1085 slice
->pitch
= handle
->stride
/ rsc
->cpp
;
1086 slice
->offset
= handle
->offset
;
1087 slice
->size0
= handle
->stride
* prsc
->height0
;
1089 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
1090 (slice
->pitch
& (pitchalign
- 1)))
1093 if (handle
->modifier
== DRM_FORMAT_MOD_QCOM_COMPRESSED
) {
1094 if (!is_supported_modifier(pscreen
, tmpl
->format
,
1095 DRM_FORMAT_MOD_QCOM_COMPRESSED
)) {
1096 DBG("bad modifier: %"PRIx64
, handle
->modifier
);
1099 debug_assert(screen
->fill_ubwc_buffer_sizes
);
1100 screen
->fill_ubwc_buffer_sizes(rsc
);
1101 } else if (handle
->modifier
&&
1102 (handle
->modifier
!= DRM_FORMAT_MOD_INVALID
)) {
1110 renderonly_create_gpu_import_for_resource(prsc
, screen
->ro
, NULL
);
1111 /* failure is expected in some cases.. */
1119 fd_resource_destroy(pscreen
, prsc
);
1124 fd_render_condition_check(struct pipe_context
*pctx
)
1126 struct fd_context
*ctx
= fd_context(pctx
);
1128 if (!ctx
->cond_query
)
1131 union pipe_query_result res
= { 0 };
1133 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
1134 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
1136 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
1137 return (bool)res
.u64
!= ctx
->cond_cond
;
1143 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1145 struct fd_context
*ctx
= fd_context(pctx
);
1146 struct fd_resource
*rsc
= fd_resource(prsc
);
1149 * TODO I guess we could track that the resource is invalidated and
1150 * use that as a hint to realloc rather than stall in _transfer_map(),
1151 * even in the non-DISCARD_WHOLE_RESOURCE case?
1153 * Note: we set dirty bits to trigger invalidate logic fd_draw_vbo
1156 if (rsc
->write_batch
) {
1157 struct fd_batch
*batch
= rsc
->write_batch
;
1158 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1160 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
) {
1161 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1162 ctx
->dirty
|= FD_DIRTY_ZSA
;
1165 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1166 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1167 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1168 ctx
->dirty
|= FD_DIRTY_FRAMEBUFFER
;
1176 static enum pipe_format
1177 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1179 return fd_resource(prsc
)->internal_format
;
1183 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1184 struct pipe_resource
*stencil
)
1186 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1189 static struct pipe_resource
*
1190 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1192 struct fd_resource
*rsc
= fd_resource(prsc
);
1194 return &rsc
->stencil
->base
;
1198 static const struct u_transfer_vtbl transfer_vtbl
= {
1199 .resource_create
= fd_resource_create
,
1200 .resource_destroy
= fd_resource_destroy
,
1201 .transfer_map
= fd_resource_transfer_map
,
1202 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1203 .transfer_unmap
= fd_resource_transfer_unmap
,
1204 .get_internal_format
= fd_resource_get_internal_format
,
1205 .set_stencil
= fd_resource_set_stencil
,
1206 .get_stencil
= fd_resource_get_stencil
,
1210 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1212 struct fd_screen
*screen
= fd_screen(pscreen
);
1213 bool fake_rgtc
= screen
->gpu_id
< 400;
1215 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1216 /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1219 pscreen
->resource_create_with_modifiers
= fd_resource_create_with_modifiers
;
1220 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1221 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1222 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1224 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1225 true, false, fake_rgtc
, true);
1227 if (!screen
->setup_slices
)
1228 screen
->setup_slices
= fd_setup_slices
;
1232 fd_get_sample_position(struct pipe_context
*context
,
1233 unsigned sample_count
, unsigned sample_index
,
1236 /* The following is copied from nouveau/nv50 except for position
1237 * values, which are taken from blob driver */
1238 static const uint8_t pos1
[1][2] = { { 0x8, 0x8 } };
1239 static const uint8_t pos2
[2][2] = {
1240 { 0xc, 0xc }, { 0x4, 0x4 } };
1241 static const uint8_t pos4
[4][2] = {
1242 { 0x6, 0x2 }, { 0xe, 0x6 },
1243 { 0x2, 0xa }, { 0xa, 0xe } };
1244 /* TODO needs to be verified on supported hw */
1245 static const uint8_t pos8
[8][2] = {
1246 { 0x9, 0x5 }, { 0x7, 0xb },
1247 { 0xd, 0x9 }, { 0x5, 0x3 },
1248 { 0x3, 0xd }, { 0x1, 0x7 },
1249 { 0xb, 0xf }, { 0xf, 0x1 } };
1251 const uint8_t (*ptr
)[2];
1253 switch (sample_count
) {
1271 pos_out
[0] = ptr
[sample_index
][0] / 16.0f
;
1272 pos_out
[1] = ptr
[sample_index
][1] / 16.0f
;
1276 fd_blit_pipe(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
1278 /* wrap fd_blit to return void */
1279 fd_blit(pctx
, blit_info
);
1283 fd_resource_context_init(struct pipe_context
*pctx
)
1285 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1286 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1287 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1288 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1289 pctx
->texture_subdata
= u_default_texture_subdata
;
1290 pctx
->create_surface
= fd_create_surface
;
1291 pctx
->surface_destroy
= fd_surface_destroy
;
1292 pctx
->resource_copy_region
= fd_resource_copy_region
;
1293 pctx
->blit
= fd_blit_pipe
;
1294 pctx
->flush_resource
= fd_flush_resource
;
1295 pctx
->invalidate_resource
= fd_invalidate_resource
;
1296 pctx
->get_sample_position
= fd_get_sample_position
;