1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
29 #include "util/u_format.h"
30 #include "util/u_format_rgtc.h"
31 #include "util/u_format_zs.h"
32 #include "util/u_inlines.h"
33 #include "util/u_transfer.h"
34 #include "util/u_string.h"
35 #include "util/u_surface.h"
38 #include "freedreno_resource.h"
39 #include "freedreno_batch_cache.h"
40 #include "freedreno_screen.h"
41 #include "freedreno_surface.h"
42 #include "freedreno_context.h"
43 #include "freedreno_query_hw.h"
44 #include "freedreno_util.h"
48 /* XXX this should go away, needed for 'struct winsys_handle' */
49 #include "state_tracker/drm_driver.h"
52 * Go through the entire state and see if the resource is bound
53 * anywhere. If it is, mark the relevant state as dirty. This is
54 * called on realloc_bo to ensure the neccessary state is re-
55 * emitted so the GPU looks at the new backing bo.
58 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
61 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
62 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
63 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
66 /* per-shader-stage resources: */
67 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
68 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
69 * cmdstream rather than by pointer..
71 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
72 for (unsigned i
= 1; i
< num_ubos
; i
++) {
73 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
75 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
76 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
80 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
81 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
83 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
84 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
88 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
89 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
90 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
92 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
93 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
99 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
101 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
102 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
103 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
105 /* if we start using things other than write-combine,
106 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
112 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
);
113 util_range_set_empty(&rsc
->valid_buffer_range
);
114 fd_bc_invalidate_resource(rsc
, true);
118 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
120 /* TODO size threshold too?? */
122 /* do blit on gpu: */
123 fd_blitter_pipe_begin(ctx
, false, true, FD_STAGE_BLIT
);
124 ctx
->blit(ctx
, blit
);
125 fd_blitter_pipe_end(ctx
);
127 /* do blit on cpu: */
128 util_resource_copy_region(&ctx
->base
,
129 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
130 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
131 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
136 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
137 unsigned level
, const struct pipe_box
*box
)
139 struct pipe_context
*pctx
= &ctx
->base
;
140 struct pipe_resource
*prsc
= &rsc
->base
;
141 bool fallback
= false;
146 /* TODO: somehow munge dimensions and format to copy unsupported
147 * render target format to something that is supported?
149 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
150 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
151 PIPE_BIND_RENDER_TARGET
))
154 /* do shadowing back-blits on the cpu for buffers: */
155 if (prsc
->target
== PIPE_BUFFER
)
158 bool whole_level
= util_texrange_covers_whole_level(prsc
, level
,
159 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
161 /* TODO need to be more clever about current level */
162 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && !whole_level
)
165 struct pipe_resource
*pshadow
=
166 pctx
->screen
->resource_create(pctx
->screen
, prsc
);
171 assert(!ctx
->in_shadow
);
172 ctx
->in_shadow
= true;
174 /* get rid of any references that batch-cache might have to us (which
175 * should empty/destroy rsc->batches hashset)
177 fd_bc_invalidate_resource(rsc
, false);
179 mtx_lock(&ctx
->screen
->lock
);
181 /* Swap the backing bo's, so shadow becomes the old buffer,
182 * blit from shadow to new buffer. From here on out, we
185 * Note that we need to do it in this order, otherwise if
186 * we go down cpu blit path, the recursive transfer_map()
187 * sees the wrong status..
189 struct fd_resource
*shadow
= fd_resource(pshadow
);
191 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
192 shadow
, shadow
->base
.reference
.count
);
194 /* TODO valid_buffer_range?? */
195 swap(rsc
->bo
, shadow
->bo
);
196 swap(rsc
->write_batch
, shadow
->write_batch
);
198 /* at this point, the newly created shadow buffer is not referenced
199 * by any batches, but the existing rsc (probably) is. We need to
200 * transfer those references over:
202 debug_assert(shadow
->batch_mask
== 0);
203 struct fd_batch
*batch
;
204 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
205 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
206 _mesa_set_remove(batch
->resources
, entry
);
207 _mesa_set_add(batch
->resources
, shadow
);
209 swap(rsc
->batch_mask
, shadow
->batch_mask
);
211 mtx_unlock(&ctx
->screen
->lock
);
213 struct pipe_blit_info blit
= {0};
214 blit
.dst
.resource
= prsc
;
215 blit
.dst
.format
= prsc
->format
;
216 blit
.src
.resource
= pshadow
;
217 blit
.src
.format
= pshadow
->format
;
218 blit
.mask
= util_format_get_mask(prsc
->format
);
219 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
221 #define set_box(field, val) do { \
222 blit.dst.field = (val); \
223 blit.src.field = (val); \
226 /* blit the other levels in their entirety: */
227 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
231 /* just blit whole level: */
233 set_box(box
.width
, u_minify(prsc
->width0
, l
));
234 set_box(box
.height
, u_minify(prsc
->height0
, l
));
235 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
237 do_blit(ctx
, &blit
, fallback
);
240 /* deal w/ current level specially, since we might need to split
241 * it up into a couple blits:
244 set_box(level
, level
);
246 switch (prsc
->target
) {
248 case PIPE_TEXTURE_1D
:
251 set_box(box
.height
, 1);
252 set_box(box
.depth
, 1);
256 set_box(box
.width
, box
->x
);
258 do_blit(ctx
, &blit
, fallback
);
260 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
261 set_box(box
.x
, box
->x
+ box
->width
);
262 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
264 do_blit(ctx
, &blit
, fallback
);
267 case PIPE_TEXTURE_2D
:
274 ctx
->in_shadow
= false;
276 pipe_resource_reference(&pshadow
, NULL
);
281 static struct fd_resource
*
282 fd_alloc_staging(struct fd_context
*ctx
, struct fd_resource
*rsc
,
283 unsigned level
, const struct pipe_box
*box
)
285 struct pipe_context
*pctx
= &ctx
->base
;
286 struct pipe_resource tmpl
= rsc
->base
;
288 tmpl
.width0
= box
->width
;
289 tmpl
.height0
= box
->height
;
290 tmpl
.depth0
= box
->depth
;
294 struct pipe_resource
*pstaging
=
295 pctx
->screen
->resource_create(pctx
->screen
, &tmpl
);
299 return fd_resource(pstaging
);
303 fd_blit_staging(struct fd_context
*ctx
, struct fd_transfer
*trans
)
305 struct pipe_resource
*dst
= trans
->base
.resource
;
306 struct pipe_blit_info blit
= {0};
308 blit
.dst
.resource
= dst
;
309 blit
.dst
.format
= dst
->format
;
310 blit
.dst
.level
= trans
->base
.level
;
311 blit
.dst
.box
= trans
->base
.box
;
312 blit
.src
.resource
= trans
->staging_prsc
;
313 blit
.src
.format
= trans
->staging_prsc
->format
;
315 blit
.src
.box
= trans
->staging_box
;
316 blit
.mask
= util_format_get_mask(trans
->staging_prsc
->format
);
317 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
319 do_blit(ctx
, &blit
, false);
320 pipe_resource_reference(&trans
->staging_prsc
, NULL
);
324 fd_resource_layer_offset(struct fd_resource
*rsc
,
325 struct fd_resource_slice
*slice
,
328 if (rsc
->layer_first
)
329 return layer
* rsc
->layer_size
;
331 return layer
* slice
->size0
;
334 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
335 struct pipe_transfer
*ptrans
,
336 const struct pipe_box
*box
)
338 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
340 if (ptrans
->resource
->target
== PIPE_BUFFER
)
341 util_range_add(&rsc
->valid_buffer_range
,
342 ptrans
->box
.x
+ box
->x
,
343 ptrans
->box
.x
+ box
->x
+ box
->width
);
347 flush_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
, unsigned usage
)
349 struct fd_batch
*write_batch
= NULL
;
351 fd_batch_reference(&write_batch
, rsc
->write_batch
);
353 if (usage
& PIPE_TRANSFER_WRITE
) {
354 struct fd_batch
*batch
, *batches
[32] = {0};
357 /* This is a bit awkward, probably a fd_batch_flush_locked()
358 * would make things simpler.. but we need to hold the lock
359 * to iterate the batches which reference this resource. So
360 * we must first grab references under a lock, then flush.
362 mtx_lock(&ctx
->screen
->lock
);
363 batch_mask
= rsc
->batch_mask
;
364 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
365 fd_batch_reference(&batches
[batch
->idx
], batch
);
366 mtx_unlock(&ctx
->screen
->lock
);
368 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
369 fd_batch_flush(batch
, false, false);
371 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
372 fd_batch_sync(batch
);
373 fd_batch_reference(&batches
[batch
->idx
], NULL
);
375 assert(rsc
->batch_mask
== 0);
376 } else if (write_batch
) {
377 fd_batch_flush(write_batch
, true, false);
380 fd_batch_reference(&write_batch
, NULL
);
382 assert(!rsc
->write_batch
);
386 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
388 flush_resource(fd_context(pctx
), fd_resource(prsc
), PIPE_TRANSFER_READ
);
392 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
393 struct pipe_transfer
*ptrans
)
395 struct fd_context
*ctx
= fd_context(pctx
);
396 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
397 struct fd_transfer
*trans
= fd_transfer(ptrans
);
399 if (trans
->staging_prsc
)
400 fd_blit_staging(ctx
, trans
);
402 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
403 fd_bo_cpu_fini(rsc
->bo
);
406 util_range_add(&rsc
->valid_buffer_range
,
408 ptrans
->box
.x
+ ptrans
->box
.width
);
410 pipe_resource_reference(&ptrans
->resource
, NULL
);
411 slab_free(&ctx
->transfer_pool
, ptrans
);
415 fd_resource_transfer_map(struct pipe_context
*pctx
,
416 struct pipe_resource
*prsc
,
417 unsigned level
, unsigned usage
,
418 const struct pipe_box
*box
,
419 struct pipe_transfer
**pptrans
)
421 struct fd_context
*ctx
= fd_context(pctx
);
422 struct fd_resource
*rsc
= fd_resource(prsc
);
423 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
424 struct fd_transfer
*trans
;
425 struct pipe_transfer
*ptrans
;
426 enum pipe_format format
= prsc
->format
;
432 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
433 box
->width
, box
->height
, box
->x
, box
->y
);
435 ptrans
= slab_alloc(&ctx
->transfer_pool
);
439 /* slab_alloc_st() doesn't zero: */
440 trans
= fd_transfer(ptrans
);
441 memset(trans
, 0, sizeof(*trans
));
443 pipe_resource_reference(&ptrans
->resource
, prsc
);
444 ptrans
->level
= level
;
445 ptrans
->usage
= usage
;
447 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->cpp
;
448 ptrans
->layer_stride
= rsc
->layer_first
? rsc
->layer_size
: slice
->size0
;
450 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
451 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
453 if (usage
& PIPE_TRANSFER_READ
)
454 op
|= DRM_FREEDRENO_PREP_READ
;
456 if (usage
& PIPE_TRANSFER_WRITE
)
457 op
|= DRM_FREEDRENO_PREP_WRITE
;
459 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
460 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
461 rebind_resource(ctx
, prsc
);
462 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
463 prsc
->target
== PIPE_BUFFER
&&
464 !util_ranges_intersect(&rsc
->valid_buffer_range
,
465 box
->x
, box
->x
+ box
->width
)) {
466 /* We are trying to write to a previously uninitialized range. No need
469 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
470 struct fd_batch
*write_batch
= NULL
;
472 /* hold a reference, so it doesn't disappear under us: */
473 fd_batch_reference(&write_batch
, rsc
->write_batch
);
475 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
476 write_batch
->back_blit
) {
477 /* if only thing pending is a back-blit, we can discard it: */
478 fd_batch_reset(write_batch
);
481 /* If the GPU is writing to the resource, or if it is reading from the
482 * resource and we're trying to write to it, flush the renders.
484 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
485 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
486 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
488 /* if we need to flush/stall, see if we can make a shadow buffer
491 * TODO we could go down this path !reorder && !busy_for_read
492 * ie. we only *don't* want to go down this path if the blit
493 * will trigger a flush!
495 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
496 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
497 /* try shadowing only if it avoids a flush, otherwise staging would
500 if (needs_flush
&& fd_try_shadow_resource(ctx
, rsc
, level
, box
)) {
501 needs_flush
= busy
= false;
502 rebind_resource(ctx
, prsc
);
503 ctx
->stats
.shadow_uploads
++;
505 struct fd_resource
*staging_rsc
;
508 flush_resource(ctx
, rsc
, usage
);
512 /* in this case, we don't need to shadow the whole resource,
513 * since any draw that references the previous contents has
514 * already had rendering flushed for all tiles. So we can
515 * use a staging buffer to do the upload.
517 staging_rsc
= fd_alloc_staging(ctx
, rsc
, level
, box
);
519 trans
->staging_prsc
= &staging_rsc
->base
;
520 trans
->base
.stride
= util_format_get_nblocksx(format
,
521 staging_rsc
->slices
[0].pitch
) * staging_rsc
->cpp
;
522 trans
->base
.layer_stride
= staging_rsc
->layer_first
?
523 staging_rsc
->layer_size
: staging_rsc
->slices
[0].size0
;
524 trans
->staging_box
= *box
;
525 trans
->staging_box
.x
= 0;
526 trans
->staging_box
.y
= 0;
527 trans
->staging_box
.z
= 0;
528 buf
= fd_bo_map(staging_rsc
->bo
);
533 fd_batch_reference(&write_batch
, NULL
);
535 ctx
->stats
.staging_uploads
++;
543 flush_resource(ctx
, rsc
, usage
);
547 fd_batch_reference(&write_batch
, NULL
);
549 /* The GPU keeps track of how the various bo's are being used, and
550 * will wait if necessary for the proper operation to have
554 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
560 buf
= fd_bo_map(rsc
->bo
);
561 offset
= slice
->offset
+
562 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
563 box
->x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
564 fd_resource_layer_offset(rsc
, slice
, box
->z
);
566 if (usage
& PIPE_TRANSFER_WRITE
)
574 fd_resource_transfer_unmap(pctx
, ptrans
);
579 fd_resource_destroy(struct pipe_screen
*pscreen
,
580 struct pipe_resource
*prsc
)
582 struct fd_resource
*rsc
= fd_resource(prsc
);
583 fd_bc_invalidate_resource(rsc
, true);
586 util_range_destroy(&rsc
->valid_buffer_range
);
591 fd_resource_get_handle(struct pipe_screen
*pscreen
,
592 struct pipe_context
*pctx
,
593 struct pipe_resource
*prsc
,
594 struct winsys_handle
*handle
,
597 struct fd_resource
*rsc
= fd_resource(prsc
);
599 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
,
600 rsc
->slices
[0].pitch
* rsc
->cpp
, handle
);
604 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
606 struct pipe_resource
*prsc
= &rsc
->base
;
607 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
608 enum util_format_layout layout
= util_format_description(format
)->layout
;
609 uint32_t pitchalign
= screen
->gmem_alignw
;
610 uint32_t level
, size
= 0;
611 uint32_t width
= prsc
->width0
;
612 uint32_t height
= prsc
->height0
;
613 uint32_t depth
= prsc
->depth0
;
614 /* in layer_first layout, the level (slice) contains just one
615 * layer (since in fact the layer contains the slices)
617 uint32_t layers_in_level
= rsc
->layer_first
? 1 : prsc
->array_size
;
619 if (is_a5xx(screen
) && (rsc
->base
.target
>= PIPE_TEXTURE_2D
))
620 height
= align(height
, screen
->gmem_alignh
);
622 for (level
= 0; level
<= prsc
->last_level
; level
++) {
623 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
626 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
627 slice
->pitch
= width
=
628 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
630 slice
->pitch
= width
= align(width
, pitchalign
);
631 slice
->offset
= size
;
632 blocks
= util_format_get_nblocks(format
, width
, height
);
633 /* 1d array and 2d array textures must all have the same layer size
634 * for each miplevel on a3xx. 3d textures can have different layer
635 * sizes for high levels, but the hw auto-sizer is buggy (or at least
636 * different than what this code does), so as soon as the layer size
637 * range gets into range, we stop reducing it.
639 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
641 (level
> 1 && rsc
->slices
[level
- 1].size0
> 0xf000)))
642 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
643 else if (level
== 0 || rsc
->layer_first
|| alignment
== 1)
644 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
646 slice
->size0
= rsc
->slices
[level
- 1].size0
;
648 size
+= slice
->size0
* depth
* layers_in_level
;
650 width
= u_minify(width
, 1);
651 height
= u_minify(height
, 1);
652 depth
= u_minify(depth
, 1);
659 slice_alignment(struct pipe_screen
*pscreen
, const struct pipe_resource
*tmpl
)
661 /* on a3xx, 2d array and 3d textures seem to want their
662 * layers aligned to page boundaries:
664 switch (tmpl
->target
) {
665 case PIPE_TEXTURE_3D
:
666 case PIPE_TEXTURE_1D_ARRAY
:
667 case PIPE_TEXTURE_2D_ARRAY
:
674 /* special case to resize query buf after allocated.. */
676 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
678 struct fd_resource
*rsc
= fd_resource(prsc
);
680 debug_assert(prsc
->width0
== 0);
681 debug_assert(prsc
->target
== PIPE_BUFFER
);
682 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
685 realloc_bo(rsc
, setup_slices(rsc
, 1, prsc
->format
));
688 // TODO common helper?
690 has_depth(enum pipe_format format
)
693 case PIPE_FORMAT_Z16_UNORM
:
694 case PIPE_FORMAT_Z32_UNORM
:
695 case PIPE_FORMAT_Z32_FLOAT
:
696 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
697 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
698 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
699 case PIPE_FORMAT_Z24X8_UNORM
:
700 case PIPE_FORMAT_X8Z24_UNORM
:
708 * Create a new texture object, using the given template info.
710 static struct pipe_resource
*
711 fd_resource_create(struct pipe_screen
*pscreen
,
712 const struct pipe_resource
*tmpl
)
714 struct fd_screen
*screen
= fd_screen(pscreen
);
715 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
716 struct pipe_resource
*prsc
= &rsc
->base
;
717 enum pipe_format format
= tmpl
->format
;
718 uint32_t size
, alignment
;
720 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
721 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
722 tmpl
->target
, util_format_name(format
),
723 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
724 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
725 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
732 pipe_reference_init(&prsc
->reference
, 1);
734 prsc
->screen
= pscreen
;
736 util_range_init(&rsc
->valid_buffer_range
);
738 rsc
->internal_format
= format
;
739 rsc
->cpp
= util_format_get_blocksize(format
);
743 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
744 if (is_a5xx(screen
) && (fd_mesa_debug
& FD_DBG_LRZ
) && has_depth(format
)) {
745 const uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
746 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
747 unsigned lrz_pitch
= align(DIV_ROUND_UP(tmpl
->width0
, 8), 32);
748 unsigned lrz_height
= DIV_ROUND_UP(tmpl
->height0
, 8);
749 unsigned size
= lrz_pitch
* lrz_height
* 2;
751 size
+= 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
753 rsc
->lrz_height
= lrz_height
;
754 rsc
->lrz_width
= lrz_pitch
;
755 rsc
->lrz_pitch
= lrz_pitch
;
756 rsc
->lrz
= fd_bo_new(screen
->dev
, size
, flags
);
759 alignment
= slice_alignment(pscreen
, tmpl
);
760 if (is_a4xx(screen
) || is_a5xx(screen
)) {
761 switch (tmpl
->target
) {
762 case PIPE_TEXTURE_3D
:
763 rsc
->layer_first
= false;
766 rsc
->layer_first
= true;
772 size
= setup_slices(rsc
, alignment
, format
);
774 /* special case for hw-query buffer, which we need to allocate before we
778 /* note, semi-intention == instead of & */
779 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
783 if (rsc
->layer_first
) {
784 rsc
->layer_size
= align(size
, 4096);
785 size
= rsc
->layer_size
* prsc
->array_size
;
788 realloc_bo(rsc
, size
);
794 fd_resource_destroy(pscreen
, prsc
);
799 * Create a texture from a winsys_handle. The handle is often created in
800 * another process by first creating a pipe texture and then calling
801 * resource_get_handle.
803 static struct pipe_resource
*
804 fd_resource_from_handle(struct pipe_screen
*pscreen
,
805 const struct pipe_resource
*tmpl
,
806 struct winsys_handle
*handle
, unsigned usage
)
808 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
809 struct fd_resource_slice
*slice
= &rsc
->slices
[0];
810 struct pipe_resource
*prsc
= &rsc
->base
;
811 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
813 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
814 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
815 tmpl
->target
, util_format_name(tmpl
->format
),
816 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
817 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
818 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
825 pipe_reference_init(&prsc
->reference
, 1);
827 prsc
->screen
= pscreen
;
829 util_range_init(&rsc
->valid_buffer_range
);
831 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
835 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
836 slice
->pitch
= handle
->stride
/ rsc
->cpp
;
837 slice
->offset
= handle
->offset
;
838 slice
->size0
= handle
->stride
* prsc
->height0
;
840 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
841 (slice
->pitch
& (pitchalign
- 1)))
849 fd_resource_destroy(pscreen
, prsc
);
854 * _copy_region using pipe (3d engine)
857 fd_blitter_pipe_copy_region(struct fd_context
*ctx
,
858 struct pipe_resource
*dst
,
860 unsigned dstx
, unsigned dsty
, unsigned dstz
,
861 struct pipe_resource
*src
,
863 const struct pipe_box
*src_box
)
865 /* not until we allow rendertargets to be buffers */
866 if (dst
->target
== PIPE_BUFFER
|| src
->target
== PIPE_BUFFER
)
869 if (!util_blitter_is_copy_supported(ctx
->blitter
, dst
, src
))
872 /* TODO we could discard if dst box covers dst level fully.. */
873 fd_blitter_pipe_begin(ctx
, false, false, FD_STAGE_BLIT
);
874 util_blitter_copy_texture(ctx
->blitter
,
875 dst
, dst_level
, dstx
, dsty
, dstz
,
876 src
, src_level
, src_box
);
877 fd_blitter_pipe_end(ctx
);
883 * Copy a block of pixels from one resource to another.
884 * The resource must be of the same format.
885 * Resources with nr_samples > 1 are not allowed.
888 fd_resource_copy_region(struct pipe_context
*pctx
,
889 struct pipe_resource
*dst
,
891 unsigned dstx
, unsigned dsty
, unsigned dstz
,
892 struct pipe_resource
*src
,
894 const struct pipe_box
*src_box
)
896 struct fd_context
*ctx
= fd_context(pctx
);
898 /* TODO if we have 2d core, or other DMA engine that could be used
899 * for simple copies and reasonably easily synchronized with the 3d
900 * core, this is where we'd plug it in..
903 /* try blit on 3d pipe: */
904 if (fd_blitter_pipe_copy_region(ctx
,
905 dst
, dst_level
, dstx
, dsty
, dstz
,
906 src
, src_level
, src_box
))
909 /* else fallback to pure sw: */
910 util_resource_copy_region(pctx
,
911 dst
, dst_level
, dstx
, dsty
, dstz
,
912 src
, src_level
, src_box
);
916 fd_render_condition_check(struct pipe_context
*pctx
)
918 struct fd_context
*ctx
= fd_context(pctx
);
920 if (!ctx
->cond_query
)
923 union pipe_query_result res
= { 0 };
925 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
926 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
928 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
929 return (bool)res
.u64
!= ctx
->cond_cond
;
935 * Optimal hardware path for blitting pixels.
936 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
939 fd_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
941 struct fd_context
*ctx
= fd_context(pctx
);
942 struct pipe_blit_info info
= *blit_info
;
943 bool discard
= false;
945 if (info
.src
.resource
->nr_samples
> 1 &&
946 info
.dst
.resource
->nr_samples
<= 1 &&
947 !util_format_is_depth_or_stencil(info
.src
.resource
->format
) &&
948 !util_format_is_pure_integer(info
.src
.resource
->format
)) {
949 DBG("color resolve unimplemented");
953 if (info
.render_condition_enable
&& !fd_render_condition_check(pctx
))
956 if (!info
.scissor_enable
&& !info
.alpha_blend
) {
957 discard
= util_texrange_covers_whole_level(info
.dst
.resource
,
958 info
.dst
.level
, info
.dst
.box
.x
, info
.dst
.box
.y
,
959 info
.dst
.box
.z
, info
.dst
.box
.width
,
960 info
.dst
.box
.height
, info
.dst
.box
.depth
);
963 if (util_try_blit_via_copy_region(pctx
, &info
)) {
967 if (info
.mask
& PIPE_MASK_S
) {
968 DBG("cannot blit stencil, skipping");
969 info
.mask
&= ~PIPE_MASK_S
;
972 if (!util_blitter_is_blit_supported(ctx
->blitter
, &info
)) {
973 DBG("blit unsupported %s -> %s",
974 util_format_short_name(info
.src
.resource
->format
),
975 util_format_short_name(info
.dst
.resource
->format
));
979 fd_blitter_pipe_begin(ctx
, info
.render_condition_enable
, discard
, FD_STAGE_BLIT
);
980 ctx
->blit(ctx
, &info
);
981 fd_blitter_pipe_end(ctx
);
985 fd_blitter_pipe_begin(struct fd_context
*ctx
, bool render_cond
, bool discard
,
986 enum fd_render_stage stage
)
988 util_blitter_save_fragment_constant_buffer_slot(ctx
->blitter
,
989 ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
);
990 util_blitter_save_vertex_buffer_slot(ctx
->blitter
, ctx
->vtx
.vertexbuf
.vb
);
991 util_blitter_save_vertex_elements(ctx
->blitter
, ctx
->vtx
.vtx
);
992 util_blitter_save_vertex_shader(ctx
->blitter
, ctx
->prog
.vp
);
993 util_blitter_save_so_targets(ctx
->blitter
, ctx
->streamout
.num_targets
,
994 ctx
->streamout
.targets
);
995 util_blitter_save_rasterizer(ctx
->blitter
, ctx
->rasterizer
);
996 util_blitter_save_viewport(ctx
->blitter
, &ctx
->viewport
);
997 util_blitter_save_scissor(ctx
->blitter
, &ctx
->scissor
);
998 util_blitter_save_fragment_shader(ctx
->blitter
, ctx
->prog
.fp
);
999 util_blitter_save_blend(ctx
->blitter
, ctx
->blend
);
1000 util_blitter_save_depth_stencil_alpha(ctx
->blitter
, ctx
->zsa
);
1001 util_blitter_save_stencil_ref(ctx
->blitter
, &ctx
->stencil_ref
);
1002 util_blitter_save_sample_mask(ctx
->blitter
, ctx
->sample_mask
);
1003 util_blitter_save_framebuffer(ctx
->blitter
,
1004 ctx
->batch
? &ctx
->batch
->framebuffer
: NULL
);
1005 util_blitter_save_fragment_sampler_states(ctx
->blitter
,
1006 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_samplers
,
1007 (void **)ctx
->tex
[PIPE_SHADER_FRAGMENT
].samplers
);
1008 util_blitter_save_fragment_sampler_views(ctx
->blitter
,
1009 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_textures
,
1010 ctx
->tex
[PIPE_SHADER_FRAGMENT
].textures
);
1012 util_blitter_save_render_condition(ctx
->blitter
,
1013 ctx
->cond_query
, ctx
->cond_cond
, ctx
->cond_mode
);
1016 fd_batch_set_stage(ctx
->batch
, stage
);
1018 ctx
->in_blit
= discard
;
1022 fd_blitter_pipe_end(struct fd_context
*ctx
)
1025 fd_batch_set_stage(ctx
->batch
, FD_STAGE_NULL
);
1026 ctx
->in_blit
= false;
1030 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
1032 struct fd_resource
*rsc
= fd_resource(prsc
);
1035 * TODO I guess we could track that the resource is invalidated and
1036 * use that as a hint to realloc rather than stall in _transfer_map(),
1037 * even in the non-DISCARD_WHOLE_RESOURCE case?
1040 if (rsc
->write_batch
) {
1041 struct fd_batch
*batch
= rsc
->write_batch
;
1042 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
1044 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
)
1045 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
1047 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
1048 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
1049 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
1057 static enum pipe_format
1058 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
1060 return fd_resource(prsc
)->internal_format
;
1064 fd_resource_set_stencil(struct pipe_resource
*prsc
,
1065 struct pipe_resource
*stencil
)
1067 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
1070 static struct pipe_resource
*
1071 fd_resource_get_stencil(struct pipe_resource
*prsc
)
1073 struct fd_resource
*rsc
= fd_resource(prsc
);
1075 return &rsc
->stencil
->base
;
1079 static const struct u_transfer_vtbl transfer_vtbl
= {
1080 .resource_create
= fd_resource_create
,
1081 .resource_destroy
= fd_resource_destroy
,
1082 .transfer_map
= fd_resource_transfer_map
,
1083 .transfer_flush_region
= fd_resource_transfer_flush_region
,
1084 .transfer_unmap
= fd_resource_transfer_unmap
,
1085 .get_internal_format
= fd_resource_get_internal_format
,
1086 .set_stencil
= fd_resource_set_stencil
,
1087 .get_stencil
= fd_resource_get_stencil
,
1091 fd_resource_screen_init(struct pipe_screen
*pscreen
)
1093 bool fake_rgtc
= fd_screen(pscreen
)->gpu_id
< 400;
1095 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1096 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1097 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1098 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1100 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1101 true, fake_rgtc
, true);
1105 fd_resource_context_init(struct pipe_context
*pctx
)
1107 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1108 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1109 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1110 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1111 pctx
->texture_subdata
= u_default_texture_subdata
;
1112 pctx
->create_surface
= fd_create_surface
;
1113 pctx
->surface_destroy
= fd_surface_destroy
;
1114 pctx
->resource_copy_region
= fd_resource_copy_region
;
1115 pctx
->blit
= fd_blit
;
1116 pctx
->flush_resource
= fd_flush_resource
;
1117 pctx
->invalidate_resource
= fd_invalidate_resource
;