1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
29 #include "util/u_format.h"
30 #include "util/u_format_rgtc.h"
31 #include "util/u_format_zs.h"
32 #include "util/u_inlines.h"
33 #include "util/u_transfer.h"
34 #include "util/u_string.h"
35 #include "util/u_surface.h"
38 #include "freedreno_resource.h"
39 #include "freedreno_batch_cache.h"
40 #include "freedreno_screen.h"
41 #include "freedreno_surface.h"
42 #include "freedreno_context.h"
43 #include "freedreno_query_hw.h"
44 #include "freedreno_util.h"
48 /* XXX this should go away, needed for 'struct winsys_handle' */
49 #include "state_tracker/drm_driver.h"
52 * Go through the entire state and see if the resource is bound
53 * anywhere. If it is, mark the relevant state as dirty. This is
54 * called on realloc_bo to ensure the neccessary state is re-
55 * emitted so the GPU looks at the new backing bo.
58 rebind_resource(struct fd_context
*ctx
, struct pipe_resource
*prsc
)
61 for (unsigned i
= 0; i
< ctx
->vtx
.vertexbuf
.count
&& !(ctx
->dirty
& FD_DIRTY_VTXBUF
); i
++) {
62 if (ctx
->vtx
.vertexbuf
.vb
[i
].buffer
.resource
== prsc
)
63 ctx
->dirty
|= FD_DIRTY_VTXBUF
;
66 /* per-shader-stage resources: */
67 for (unsigned stage
= 0; stage
< PIPE_SHADER_TYPES
; stage
++) {
68 /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
69 * cmdstream rather than by pointer..
71 const unsigned num_ubos
= util_last_bit(ctx
->constbuf
[stage
].enabled_mask
);
72 for (unsigned i
= 1; i
< num_ubos
; i
++) {
73 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_CONST
)
75 if (ctx
->constbuf
[stage
].cb
[i
].buffer
== prsc
)
76 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_CONST
;
80 for (unsigned i
= 0; i
< ctx
->tex
[stage
].num_textures
; i
++) {
81 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_TEX
)
83 if (ctx
->tex
[stage
].textures
[i
] && (ctx
->tex
[stage
].textures
[i
]->texture
== prsc
))
84 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_TEX
;
88 const unsigned num_ssbos
= util_last_bit(ctx
->shaderbuf
[stage
].enabled_mask
);
89 for (unsigned i
= 0; i
< num_ssbos
; i
++) {
90 if (ctx
->dirty_shader
[stage
] & FD_DIRTY_SHADER_SSBO
)
92 if (ctx
->shaderbuf
[stage
].sb
[i
].buffer
== prsc
)
93 ctx
->dirty_shader
[stage
] |= FD_DIRTY_SHADER_SSBO
;
99 realloc_bo(struct fd_resource
*rsc
, uint32_t size
)
101 struct fd_screen
*screen
= fd_screen(rsc
->base
.screen
);
102 uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
103 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
105 /* if we start using things other than write-combine,
106 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
112 rsc
->bo
= fd_bo_new(screen
->dev
, size
, flags
);
113 util_range_set_empty(&rsc
->valid_buffer_range
);
114 fd_bc_invalidate_resource(rsc
, true);
118 do_blit(struct fd_context
*ctx
, const struct pipe_blit_info
*blit
, bool fallback
)
120 /* TODO size threshold too?? */
122 /* do blit on gpu: */
123 fd_blitter_pipe_begin(ctx
, false, true, FD_STAGE_BLIT
);
124 util_blitter_blit(ctx
->blitter
, blit
);
125 fd_blitter_pipe_end(ctx
);
127 /* do blit on cpu: */
128 util_resource_copy_region(&ctx
->base
,
129 blit
->dst
.resource
, blit
->dst
.level
, blit
->dst
.box
.x
,
130 blit
->dst
.box
.y
, blit
->dst
.box
.z
,
131 blit
->src
.resource
, blit
->src
.level
, &blit
->src
.box
);
136 fd_try_shadow_resource(struct fd_context
*ctx
, struct fd_resource
*rsc
,
137 unsigned level
, const struct pipe_box
*box
)
139 struct pipe_context
*pctx
= &ctx
->base
;
140 struct pipe_resource
*prsc
= &rsc
->base
;
141 bool fallback
= false;
146 /* TODO: somehow munge dimensions and format to copy unsupported
147 * render target format to something that is supported?
149 if (!pctx
->screen
->is_format_supported(pctx
->screen
,
150 prsc
->format
, prsc
->target
, prsc
->nr_samples
,
151 PIPE_BIND_RENDER_TARGET
))
154 /* do shadowing back-blits on the cpu for buffers: */
155 if (prsc
->target
== PIPE_BUFFER
)
158 bool whole_level
= util_texrange_covers_whole_level(prsc
, level
,
159 box
->x
, box
->y
, box
->z
, box
->width
, box
->height
, box
->depth
);
161 /* TODO need to be more clever about current level */
162 if ((prsc
->target
>= PIPE_TEXTURE_2D
) && !whole_level
)
165 struct pipe_resource
*pshadow
=
166 pctx
->screen
->resource_create(pctx
->screen
, prsc
);
171 assert(!ctx
->in_shadow
);
172 ctx
->in_shadow
= true;
174 /* get rid of any references that batch-cache might have to us (which
175 * should empty/destroy rsc->batches hashset)
177 fd_bc_invalidate_resource(rsc
, false);
179 mtx_lock(&ctx
->screen
->lock
);
181 /* Swap the backing bo's, so shadow becomes the old buffer,
182 * blit from shadow to new buffer. From here on out, we
185 * Note that we need to do it in this order, otherwise if
186 * we go down cpu blit path, the recursive transfer_map()
187 * sees the wrong status..
189 struct fd_resource
*shadow
= fd_resource(pshadow
);
191 DBG("shadow: %p (%d) -> %p (%d)\n", rsc
, rsc
->base
.reference
.count
,
192 shadow
, shadow
->base
.reference
.count
);
194 /* TODO valid_buffer_range?? */
195 swap(rsc
->bo
, shadow
->bo
);
196 swap(rsc
->write_batch
, shadow
->write_batch
);
198 /* at this point, the newly created shadow buffer is not referenced
199 * by any batches, but the existing rsc (probably) is. We need to
200 * transfer those references over:
202 debug_assert(shadow
->batch_mask
== 0);
203 struct fd_batch
*batch
;
204 foreach_batch(batch
, &ctx
->screen
->batch_cache
, rsc
->batch_mask
) {
205 struct set_entry
*entry
= _mesa_set_search(batch
->resources
, rsc
);
206 _mesa_set_remove(batch
->resources
, entry
);
207 _mesa_set_add(batch
->resources
, shadow
);
209 swap(rsc
->batch_mask
, shadow
->batch_mask
);
211 mtx_unlock(&ctx
->screen
->lock
);
213 struct pipe_blit_info blit
= {0};
214 blit
.dst
.resource
= prsc
;
215 blit
.dst
.format
= prsc
->format
;
216 blit
.src
.resource
= pshadow
;
217 blit
.src
.format
= pshadow
->format
;
218 blit
.mask
= util_format_get_mask(prsc
->format
);
219 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
221 #define set_box(field, val) do { \
222 blit.dst.field = (val); \
223 blit.src.field = (val); \
226 /* blit the other levels in their entirety: */
227 for (unsigned l
= 0; l
<= prsc
->last_level
; l
++) {
231 /* just blit whole level: */
233 set_box(box
.width
, u_minify(prsc
->width0
, l
));
234 set_box(box
.height
, u_minify(prsc
->height0
, l
));
235 set_box(box
.depth
, u_minify(prsc
->depth0
, l
));
237 do_blit(ctx
, &blit
, fallback
);
240 /* deal w/ current level specially, since we might need to split
241 * it up into a couple blits:
244 set_box(level
, level
);
246 switch (prsc
->target
) {
248 case PIPE_TEXTURE_1D
:
251 set_box(box
.height
, 1);
252 set_box(box
.depth
, 1);
256 set_box(box
.width
, box
->x
);
258 do_blit(ctx
, &blit
, fallback
);
260 if ((box
->x
+ box
->width
) < u_minify(prsc
->width0
, level
)) {
261 set_box(box
.x
, box
->x
+ box
->width
);
262 set_box(box
.width
, u_minify(prsc
->width0
, level
) - (box
->x
+ box
->width
));
264 do_blit(ctx
, &blit
, fallback
);
267 case PIPE_TEXTURE_2D
:
274 ctx
->in_shadow
= false;
276 pipe_resource_reference(&pshadow
, NULL
);
282 fd_resource_layer_offset(struct fd_resource
*rsc
,
283 struct fd_resource_slice
*slice
,
286 if (rsc
->layer_first
)
287 return layer
* rsc
->layer_size
;
289 return layer
* slice
->size0
;
292 static void fd_resource_transfer_flush_region(struct pipe_context
*pctx
,
293 struct pipe_transfer
*ptrans
,
294 const struct pipe_box
*box
)
296 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
298 if (ptrans
->resource
->target
== PIPE_BUFFER
)
299 util_range_add(&rsc
->valid_buffer_range
,
300 ptrans
->box
.x
+ box
->x
,
301 ptrans
->box
.x
+ box
->x
+ box
->width
);
305 fd_resource_transfer_unmap(struct pipe_context
*pctx
,
306 struct pipe_transfer
*ptrans
)
308 struct fd_context
*ctx
= fd_context(pctx
);
309 struct fd_resource
*rsc
= fd_resource(ptrans
->resource
);
311 if (!(ptrans
->usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
312 fd_bo_cpu_fini(rsc
->bo
);
315 util_range_add(&rsc
->valid_buffer_range
,
317 ptrans
->box
.x
+ ptrans
->box
.width
);
319 pipe_resource_reference(&ptrans
->resource
, NULL
);
320 slab_free(&ctx
->transfer_pool
, ptrans
);
324 fd_resource_transfer_map(struct pipe_context
*pctx
,
325 struct pipe_resource
*prsc
,
326 unsigned level
, unsigned usage
,
327 const struct pipe_box
*box
,
328 struct pipe_transfer
**pptrans
)
330 struct fd_context
*ctx
= fd_context(pctx
);
331 struct fd_resource
*rsc
= fd_resource(prsc
);
332 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
333 struct fd_transfer
*trans
;
334 struct pipe_transfer
*ptrans
;
335 enum pipe_format format
= prsc
->format
;
341 DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc
, level
, usage
,
342 box
->width
, box
->height
, box
->x
, box
->y
);
344 ptrans
= slab_alloc(&ctx
->transfer_pool
);
348 /* slab_alloc_st() doesn't zero: */
349 trans
= fd_transfer(ptrans
);
350 memset(trans
, 0, sizeof(*trans
));
352 pipe_resource_reference(&ptrans
->resource
, prsc
);
353 ptrans
->level
= level
;
354 ptrans
->usage
= usage
;
356 ptrans
->stride
= util_format_get_nblocksx(format
, slice
->pitch
) * rsc
->cpp
;
357 ptrans
->layer_stride
= rsc
->layer_first
? rsc
->layer_size
: slice
->size0
;
359 if (ctx
->in_shadow
&& !(usage
& PIPE_TRANSFER_READ
))
360 usage
|= PIPE_TRANSFER_UNSYNCHRONIZED
;
362 if (usage
& PIPE_TRANSFER_READ
)
363 op
|= DRM_FREEDRENO_PREP_READ
;
365 if (usage
& PIPE_TRANSFER_WRITE
)
366 op
|= DRM_FREEDRENO_PREP_WRITE
;
368 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
369 realloc_bo(rsc
, fd_bo_size(rsc
->bo
));
370 rebind_resource(ctx
, prsc
);
371 } else if ((usage
& PIPE_TRANSFER_WRITE
) &&
372 prsc
->target
== PIPE_BUFFER
&&
373 !util_ranges_intersect(&rsc
->valid_buffer_range
,
374 box
->x
, box
->x
+ box
->width
)) {
375 /* We are trying to write to a previously uninitialized range. No need
378 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
379 struct fd_batch
*write_batch
= NULL
;
381 /* hold a reference, so it doesn't disappear under us: */
382 fd_batch_reference(&write_batch
, rsc
->write_batch
);
384 if ((usage
& PIPE_TRANSFER_WRITE
) && write_batch
&&
385 write_batch
->back_blit
) {
386 /* if only thing pending is a back-blit, we can discard it: */
387 fd_batch_reset(write_batch
);
390 /* If the GPU is writing to the resource, or if it is reading from the
391 * resource and we're trying to write to it, flush the renders.
393 bool needs_flush
= pending(rsc
, !!(usage
& PIPE_TRANSFER_WRITE
));
394 bool busy
= needs_flush
|| (0 != fd_bo_cpu_prep(rsc
->bo
,
395 ctx
->pipe
, op
| DRM_FREEDRENO_PREP_NOSYNC
));
397 /* if we need to flush/stall, see if we can make a shadow buffer
400 * TODO we could go down this path !reorder && !busy_for_read
401 * ie. we only *don't* want to go down this path if the blit
402 * will trigger a flush!
404 if (ctx
->screen
->reorder
&& busy
&& !(usage
& PIPE_TRANSFER_READ
) &&
405 (usage
& PIPE_TRANSFER_DISCARD_RANGE
)) {
406 if (fd_try_shadow_resource(ctx
, rsc
, level
, box
)) {
407 needs_flush
= busy
= false;
408 rebind_resource(ctx
, prsc
);
413 if (usage
& PIPE_TRANSFER_WRITE
) {
414 struct fd_batch
*batch
, *batches
[32] = {0};
417 /* This is a bit awkward, probably a fd_batch_flush_locked()
418 * would make things simpler.. but we need to hold the lock
419 * to iterate the batches which reference this resource. So
420 * we must first grab references under a lock, then flush.
422 mtx_lock(&ctx
->screen
->lock
);
423 batch_mask
= rsc
->batch_mask
;
424 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
425 fd_batch_reference(&batches
[batch
->idx
], batch
);
426 mtx_unlock(&ctx
->screen
->lock
);
428 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
)
429 fd_batch_flush(batch
, false, false);
431 foreach_batch(batch
, &ctx
->screen
->batch_cache
, batch_mask
) {
432 fd_batch_sync(batch
);
433 fd_batch_reference(&batches
[batch
->idx
], NULL
);
435 assert(rsc
->batch_mask
== 0);
437 fd_batch_flush(write_batch
, true, false);
439 assert(!rsc
->write_batch
);
442 fd_batch_reference(&write_batch
, NULL
);
444 /* The GPU keeps track of how the various bo's are being used, and
445 * will wait if necessary for the proper operation to have
449 ret
= fd_bo_cpu_prep(rsc
->bo
, ctx
->pipe
, op
);
455 buf
= fd_bo_map(rsc
->bo
);
459 offset
= slice
->offset
+
460 box
->y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
461 box
->x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
462 fd_resource_layer_offset(rsc
, slice
, box
->z
);
469 fd_resource_transfer_unmap(pctx
, ptrans
);
474 fd_resource_destroy(struct pipe_screen
*pscreen
,
475 struct pipe_resource
*prsc
)
477 struct fd_resource
*rsc
= fd_resource(prsc
);
478 fd_bc_invalidate_resource(rsc
, true);
481 util_range_destroy(&rsc
->valid_buffer_range
);
486 fd_resource_get_handle(struct pipe_screen
*pscreen
,
487 struct pipe_context
*pctx
,
488 struct pipe_resource
*prsc
,
489 struct winsys_handle
*handle
,
492 struct fd_resource
*rsc
= fd_resource(prsc
);
494 return fd_screen_bo_get_handle(pscreen
, rsc
->bo
,
495 rsc
->slices
[0].pitch
* rsc
->cpp
, handle
);
499 setup_slices(struct fd_resource
*rsc
, uint32_t alignment
, enum pipe_format format
)
501 struct pipe_resource
*prsc
= &rsc
->base
;
502 struct fd_screen
*screen
= fd_screen(prsc
->screen
);
503 enum util_format_layout layout
= util_format_description(format
)->layout
;
504 uint32_t pitchalign
= screen
->gmem_alignw
;
505 uint32_t level
, size
= 0;
506 uint32_t width
= prsc
->width0
;
507 uint32_t height
= prsc
->height0
;
508 uint32_t depth
= prsc
->depth0
;
509 /* in layer_first layout, the level (slice) contains just one
510 * layer (since in fact the layer contains the slices)
512 uint32_t layers_in_level
= rsc
->layer_first
? 1 : prsc
->array_size
;
514 if (is_a5xx(screen
) && (rsc
->base
.target
>= PIPE_TEXTURE_2D
))
515 height
= align(height
, screen
->gmem_alignh
);
517 for (level
= 0; level
<= prsc
->last_level
; level
++) {
518 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
521 if (layout
== UTIL_FORMAT_LAYOUT_ASTC
)
522 slice
->pitch
= width
=
523 util_align_npot(width
, pitchalign
* util_format_get_blockwidth(format
));
525 slice
->pitch
= width
= align(width
, pitchalign
);
526 slice
->offset
= size
;
527 blocks
= util_format_get_nblocks(format
, width
, height
);
528 /* 1d array and 2d array textures must all have the same layer size
529 * for each miplevel on a3xx. 3d textures can have different layer
530 * sizes for high levels, but the hw auto-sizer is buggy (or at least
531 * different than what this code does), so as soon as the layer size
532 * range gets into range, we stop reducing it.
534 if (prsc
->target
== PIPE_TEXTURE_3D
&& (
536 (level
> 1 && rsc
->slices
[level
- 1].size0
> 0xf000)))
537 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
538 else if (level
== 0 || rsc
->layer_first
|| alignment
== 1)
539 slice
->size0
= align(blocks
* rsc
->cpp
, alignment
);
541 slice
->size0
= rsc
->slices
[level
- 1].size0
;
543 size
+= slice
->size0
* depth
* layers_in_level
;
545 width
= u_minify(width
, 1);
546 height
= u_minify(height
, 1);
547 depth
= u_minify(depth
, 1);
554 slice_alignment(struct pipe_screen
*pscreen
, const struct pipe_resource
*tmpl
)
556 /* on a3xx, 2d array and 3d textures seem to want their
557 * layers aligned to page boundaries:
559 switch (tmpl
->target
) {
560 case PIPE_TEXTURE_3D
:
561 case PIPE_TEXTURE_1D_ARRAY
:
562 case PIPE_TEXTURE_2D_ARRAY
:
569 /* special case to resize query buf after allocated.. */
571 fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
)
573 struct fd_resource
*rsc
= fd_resource(prsc
);
575 debug_assert(prsc
->width0
== 0);
576 debug_assert(prsc
->target
== PIPE_BUFFER
);
577 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
580 realloc_bo(rsc
, setup_slices(rsc
, 1, prsc
->format
));
583 // TODO common helper?
585 has_depth(enum pipe_format format
)
588 case PIPE_FORMAT_Z16_UNORM
:
589 case PIPE_FORMAT_Z32_UNORM
:
590 case PIPE_FORMAT_Z32_FLOAT
:
591 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
:
592 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
593 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
594 case PIPE_FORMAT_Z24X8_UNORM
:
595 case PIPE_FORMAT_X8Z24_UNORM
:
603 * Create a new texture object, using the given template info.
605 static struct pipe_resource
*
606 fd_resource_create(struct pipe_screen
*pscreen
,
607 const struct pipe_resource
*tmpl
)
609 struct fd_screen
*screen
= fd_screen(pscreen
);
610 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
611 struct pipe_resource
*prsc
= &rsc
->base
;
612 enum pipe_format format
= tmpl
->format
;
613 uint32_t size
, alignment
;
615 DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
616 "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc
,
617 tmpl
->target
, util_format_name(format
),
618 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
619 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
620 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
627 pipe_reference_init(&prsc
->reference
, 1);
629 prsc
->screen
= pscreen
;
631 util_range_init(&rsc
->valid_buffer_range
);
633 rsc
->internal_format
= format
;
634 rsc
->cpp
= util_format_get_blocksize(format
);
638 // XXX probably need some extra work if we hit rsc shadowing path w/ lrz..
639 if (is_a5xx(screen
) && (fd_mesa_debug
& FD_DBG_LRZ
) && has_depth(format
)) {
640 const uint32_t flags
= DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
641 DRM_FREEDRENO_GEM_TYPE_KMEM
; /* TODO */
642 unsigned lrz_pitch
= align(DIV_ROUND_UP(tmpl
->width0
, 8), 32);
643 unsigned lrz_height
= DIV_ROUND_UP(tmpl
->height0
, 8);
644 unsigned size
= lrz_pitch
* lrz_height
* 2;
646 size
+= 0x1000; /* for GRAS_LRZ_FAST_CLEAR_BUFFER */
648 rsc
->lrz_height
= lrz_height
;
649 rsc
->lrz_width
= lrz_pitch
;
650 rsc
->lrz_pitch
= lrz_pitch
;
651 rsc
->lrz
= fd_bo_new(screen
->dev
, size
, flags
);
654 alignment
= slice_alignment(pscreen
, tmpl
);
655 if (is_a4xx(screen
) || is_a5xx(screen
)) {
656 switch (tmpl
->target
) {
657 case PIPE_TEXTURE_3D
:
658 rsc
->layer_first
= false;
661 rsc
->layer_first
= true;
667 size
= setup_slices(rsc
, alignment
, format
);
669 /* special case for hw-query buffer, which we need to allocate before we
673 /* note, semi-intention == instead of & */
674 debug_assert(prsc
->bind
== PIPE_BIND_QUERY_BUFFER
);
678 if (rsc
->layer_first
) {
679 rsc
->layer_size
= align(size
, 4096);
680 size
= rsc
->layer_size
* prsc
->array_size
;
683 realloc_bo(rsc
, size
);
689 fd_resource_destroy(pscreen
, prsc
);
694 * Create a texture from a winsys_handle. The handle is often created in
695 * another process by first creating a pipe texture and then calling
696 * resource_get_handle.
698 static struct pipe_resource
*
699 fd_resource_from_handle(struct pipe_screen
*pscreen
,
700 const struct pipe_resource
*tmpl
,
701 struct winsys_handle
*handle
, unsigned usage
)
703 struct fd_resource
*rsc
= CALLOC_STRUCT(fd_resource
);
704 struct fd_resource_slice
*slice
= &rsc
->slices
[0];
705 struct pipe_resource
*prsc
= &rsc
->base
;
706 uint32_t pitchalign
= fd_screen(pscreen
)->gmem_alignw
;
708 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
709 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
710 tmpl
->target
, util_format_name(tmpl
->format
),
711 tmpl
->width0
, tmpl
->height0
, tmpl
->depth0
,
712 tmpl
->array_size
, tmpl
->last_level
, tmpl
->nr_samples
,
713 tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
720 pipe_reference_init(&prsc
->reference
, 1);
722 prsc
->screen
= pscreen
;
724 util_range_init(&rsc
->valid_buffer_range
);
726 rsc
->bo
= fd_screen_bo_from_handle(pscreen
, handle
);
730 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
731 slice
->pitch
= handle
->stride
/ rsc
->cpp
;
732 slice
->offset
= handle
->offset
;
733 slice
->size0
= handle
->stride
* prsc
->height0
;
735 if ((slice
->pitch
< align(prsc
->width0
, pitchalign
)) ||
736 (slice
->pitch
& (pitchalign
- 1)))
744 fd_resource_destroy(pscreen
, prsc
);
749 * _copy_region using pipe (3d engine)
752 fd_blitter_pipe_copy_region(struct fd_context
*ctx
,
753 struct pipe_resource
*dst
,
755 unsigned dstx
, unsigned dsty
, unsigned dstz
,
756 struct pipe_resource
*src
,
758 const struct pipe_box
*src_box
)
760 /* not until we allow rendertargets to be buffers */
761 if (dst
->target
== PIPE_BUFFER
|| src
->target
== PIPE_BUFFER
)
764 if (!util_blitter_is_copy_supported(ctx
->blitter
, dst
, src
))
767 /* TODO we could discard if dst box covers dst level fully.. */
768 fd_blitter_pipe_begin(ctx
, false, false, FD_STAGE_BLIT
);
769 util_blitter_copy_texture(ctx
->blitter
,
770 dst
, dst_level
, dstx
, dsty
, dstz
,
771 src
, src_level
, src_box
);
772 fd_blitter_pipe_end(ctx
);
778 * Copy a block of pixels from one resource to another.
779 * The resource must be of the same format.
780 * Resources with nr_samples > 1 are not allowed.
783 fd_resource_copy_region(struct pipe_context
*pctx
,
784 struct pipe_resource
*dst
,
786 unsigned dstx
, unsigned dsty
, unsigned dstz
,
787 struct pipe_resource
*src
,
789 const struct pipe_box
*src_box
)
791 struct fd_context
*ctx
= fd_context(pctx
);
793 /* TODO if we have 2d core, or other DMA engine that could be used
794 * for simple copies and reasonably easily synchronized with the 3d
795 * core, this is where we'd plug it in..
798 /* try blit on 3d pipe: */
799 if (fd_blitter_pipe_copy_region(ctx
,
800 dst
, dst_level
, dstx
, dsty
, dstz
,
801 src
, src_level
, src_box
))
804 /* else fallback to pure sw: */
805 util_resource_copy_region(pctx
,
806 dst
, dst_level
, dstx
, dsty
, dstz
,
807 src
, src_level
, src_box
);
811 fd_render_condition_check(struct pipe_context
*pctx
)
813 struct fd_context
*ctx
= fd_context(pctx
);
815 if (!ctx
->cond_query
)
818 union pipe_query_result res
= { 0 };
820 ctx
->cond_mode
!= PIPE_RENDER_COND_NO_WAIT
&&
821 ctx
->cond_mode
!= PIPE_RENDER_COND_BY_REGION_NO_WAIT
;
823 if (pctx
->get_query_result(pctx
, ctx
->cond_query
, wait
, &res
))
824 return (bool)res
.u64
!= ctx
->cond_cond
;
830 * Optimal hardware path for blitting pixels.
831 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
834 fd_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
836 struct fd_context
*ctx
= fd_context(pctx
);
837 struct pipe_blit_info info
= *blit_info
;
838 bool discard
= false;
840 if (info
.src
.resource
->nr_samples
> 1 &&
841 info
.dst
.resource
->nr_samples
<= 1 &&
842 !util_format_is_depth_or_stencil(info
.src
.resource
->format
) &&
843 !util_format_is_pure_integer(info
.src
.resource
->format
)) {
844 DBG("color resolve unimplemented");
848 if (info
.render_condition_enable
&& !fd_render_condition_check(pctx
))
851 if (!info
.scissor_enable
&& !info
.alpha_blend
) {
852 discard
= util_texrange_covers_whole_level(info
.dst
.resource
,
853 info
.dst
.level
, info
.dst
.box
.x
, info
.dst
.box
.y
,
854 info
.dst
.box
.z
, info
.dst
.box
.width
,
855 info
.dst
.box
.height
, info
.dst
.box
.depth
);
858 if (util_try_blit_via_copy_region(pctx
, &info
)) {
862 if (info
.mask
& PIPE_MASK_S
) {
863 DBG("cannot blit stencil, skipping");
864 info
.mask
&= ~PIPE_MASK_S
;
867 if (!util_blitter_is_blit_supported(ctx
->blitter
, &info
)) {
868 DBG("blit unsupported %s -> %s",
869 util_format_short_name(info
.src
.resource
->format
),
870 util_format_short_name(info
.dst
.resource
->format
));
874 fd_blitter_pipe_begin(ctx
, info
.render_condition_enable
, discard
, FD_STAGE_BLIT
);
875 util_blitter_blit(ctx
->blitter
, &info
);
876 fd_blitter_pipe_end(ctx
);
880 fd_blitter_pipe_begin(struct fd_context
*ctx
, bool render_cond
, bool discard
,
881 enum fd_render_stage stage
)
883 util_blitter_save_fragment_constant_buffer_slot(ctx
->blitter
,
884 ctx
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
);
885 util_blitter_save_vertex_buffer_slot(ctx
->blitter
, ctx
->vtx
.vertexbuf
.vb
);
886 util_blitter_save_vertex_elements(ctx
->blitter
, ctx
->vtx
.vtx
);
887 util_blitter_save_vertex_shader(ctx
->blitter
, ctx
->prog
.vp
);
888 util_blitter_save_so_targets(ctx
->blitter
, ctx
->streamout
.num_targets
,
889 ctx
->streamout
.targets
);
890 util_blitter_save_rasterizer(ctx
->blitter
, ctx
->rasterizer
);
891 util_blitter_save_viewport(ctx
->blitter
, &ctx
->viewport
);
892 util_blitter_save_scissor(ctx
->blitter
, &ctx
->scissor
);
893 util_blitter_save_fragment_shader(ctx
->blitter
, ctx
->prog
.fp
);
894 util_blitter_save_blend(ctx
->blitter
, ctx
->blend
);
895 util_blitter_save_depth_stencil_alpha(ctx
->blitter
, ctx
->zsa
);
896 util_blitter_save_stencil_ref(ctx
->blitter
, &ctx
->stencil_ref
);
897 util_blitter_save_sample_mask(ctx
->blitter
, ctx
->sample_mask
);
898 util_blitter_save_framebuffer(ctx
->blitter
,
899 ctx
->batch
? &ctx
->batch
->framebuffer
: NULL
);
900 util_blitter_save_fragment_sampler_states(ctx
->blitter
,
901 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_samplers
,
902 (void **)ctx
->tex
[PIPE_SHADER_FRAGMENT
].samplers
);
903 util_blitter_save_fragment_sampler_views(ctx
->blitter
,
904 ctx
->tex
[PIPE_SHADER_FRAGMENT
].num_textures
,
905 ctx
->tex
[PIPE_SHADER_FRAGMENT
].textures
);
907 util_blitter_save_render_condition(ctx
->blitter
,
908 ctx
->cond_query
, ctx
->cond_cond
, ctx
->cond_mode
);
911 fd_batch_set_stage(ctx
->batch
, stage
);
913 ctx
->in_blit
= discard
;
917 fd_blitter_pipe_end(struct fd_context
*ctx
)
920 fd_batch_set_stage(ctx
->batch
, FD_STAGE_NULL
);
921 ctx
->in_blit
= false;
925 fd_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
927 struct fd_resource
*rsc
= fd_resource(prsc
);
929 if (rsc
->write_batch
)
930 fd_batch_flush(rsc
->write_batch
, true, false);
932 assert(!rsc
->write_batch
);
936 fd_invalidate_resource(struct pipe_context
*pctx
, struct pipe_resource
*prsc
)
938 struct fd_resource
*rsc
= fd_resource(prsc
);
941 * TODO I guess we could track that the resource is invalidated and
942 * use that as a hint to realloc rather than stall in _transfer_map(),
943 * even in the non-DISCARD_WHOLE_RESOURCE case?
946 if (rsc
->write_batch
) {
947 struct fd_batch
*batch
= rsc
->write_batch
;
948 struct pipe_framebuffer_state
*pfb
= &batch
->framebuffer
;
950 if (pfb
->zsbuf
&& pfb
->zsbuf
->texture
== prsc
)
951 batch
->resolve
&= ~(FD_BUFFER_DEPTH
| FD_BUFFER_STENCIL
);
953 for (unsigned i
= 0; i
< pfb
->nr_cbufs
; i
++) {
954 if (pfb
->cbufs
[i
] && pfb
->cbufs
[i
]->texture
== prsc
) {
955 batch
->resolve
&= ~(PIPE_CLEAR_COLOR0
<< i
);
963 static enum pipe_format
964 fd_resource_get_internal_format(struct pipe_resource
*prsc
)
966 return fd_resource(prsc
)->internal_format
;
970 fd_resource_set_stencil(struct pipe_resource
*prsc
,
971 struct pipe_resource
*stencil
)
973 fd_resource(prsc
)->stencil
= fd_resource(stencil
);
976 static struct pipe_resource
*
977 fd_resource_get_stencil(struct pipe_resource
*prsc
)
979 struct fd_resource
*rsc
= fd_resource(prsc
);
981 return &rsc
->stencil
->base
;
985 static const struct u_transfer_vtbl transfer_vtbl
= {
986 .resource_create
= fd_resource_create
,
987 .resource_destroy
= fd_resource_destroy
,
988 .transfer_map
= fd_resource_transfer_map
,
989 .transfer_flush_region
= fd_resource_transfer_flush_region
,
990 .transfer_unmap
= fd_resource_transfer_unmap
,
991 .get_internal_format
= fd_resource_get_internal_format
,
992 .set_stencil
= fd_resource_set_stencil
,
993 .get_stencil
= fd_resource_get_stencil
,
997 fd_resource_screen_init(struct pipe_screen
*pscreen
)
999 bool fake_rgtc
= fd_screen(pscreen
)->gpu_id
< 400;
1001 pscreen
->resource_create
= u_transfer_helper_resource_create
;
1002 pscreen
->resource_from_handle
= fd_resource_from_handle
;
1003 pscreen
->resource_get_handle
= fd_resource_get_handle
;
1004 pscreen
->resource_destroy
= u_transfer_helper_resource_destroy
;
1006 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1007 true, fake_rgtc
, true);
1011 fd_resource_context_init(struct pipe_context
*pctx
)
1013 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1014 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1015 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1016 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1017 pctx
->texture_subdata
= u_default_texture_subdata
;
1018 pctx
->create_surface
= fd_create_surface
;
1019 pctx
->surface_destroy
= fd_surface_destroy
;
1020 pctx
->resource_copy_region
= fd_resource_copy_region
;
1021 pctx
->blit
= fd_blit
;
1022 pctx
->flush_resource
= fd_flush_resource
;
1023 pctx
->invalidate_resource
= fd_invalidate_resource
;