freedreno: mark resources as being read so that writes flush the queue
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "util/u_format.h"
30 #include "util/u_inlines.h"
31 #include "util/u_transfer.h"
32 #include "util/u_string.h"
33 #include "util/u_surface.h"
34
35 #include "freedreno_resource.h"
36 #include "freedreno_screen.h"
37 #include "freedreno_surface.h"
38 #include "freedreno_context.h"
39 #include "freedreno_query_hw.h"
40 #include "freedreno_util.h"
41
42 #include <errno.h>
43
44 static void
45 realloc_bo(struct fd_resource *rsc, uint32_t size)
46 {
47 struct fd_screen *screen = fd_screen(rsc->base.b.screen);
48 uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
49 DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
50
51 /* if we start using things other than write-combine,
52 * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
53 */
54
55 if (rsc->bo)
56 fd_bo_del(rsc->bo);
57
58 rsc->bo = fd_bo_new(screen->dev, size, flags);
59 rsc->timestamp = 0;
60 rsc->dirty = rsc->reading = false;
61 list_delinit(&rsc->list);
62 }
63
64 static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
65 struct pipe_transfer *ptrans,
66 const struct pipe_box *box)
67 {
68 }
69
70 static void
71 fd_resource_transfer_unmap(struct pipe_context *pctx,
72 struct pipe_transfer *ptrans)
73 {
74 struct fd_context *ctx = fd_context(pctx);
75 struct fd_resource *rsc = fd_resource(ptrans->resource);
76 if (!(ptrans->usage & PIPE_TRANSFER_UNSYNCHRONIZED))
77 fd_bo_cpu_fini(rsc->bo);
78 pipe_resource_reference(&ptrans->resource, NULL);
79 util_slab_free(&ctx->transfer_pool, ptrans);
80 }
81
82 static void *
83 fd_resource_transfer_map(struct pipe_context *pctx,
84 struct pipe_resource *prsc,
85 unsigned level, unsigned usage,
86 const struct pipe_box *box,
87 struct pipe_transfer **pptrans)
88 {
89 struct fd_context *ctx = fd_context(pctx);
90 struct fd_resource *rsc = fd_resource(prsc);
91 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
92 struct pipe_transfer *ptrans;
93 enum pipe_format format = prsc->format;
94 uint32_t op = 0;
95 uint32_t offset;
96 char *buf;
97 int ret = 0;
98
99 DBG("prsc=%p, level=%u, usage=%x", prsc, level, usage);
100
101 ptrans = util_slab_alloc(&ctx->transfer_pool);
102 if (!ptrans)
103 return NULL;
104
105 /* util_slab_alloc() doesn't zero: */
106 memset(ptrans, 0, sizeof(*ptrans));
107
108 pipe_resource_reference(&ptrans->resource, prsc);
109 ptrans->level = level;
110 ptrans->usage = usage;
111 ptrans->box = *box;
112 ptrans->stride = slice->pitch * rsc->cpp;
113 ptrans->layer_stride = slice->size0;
114
115 if (usage & PIPE_TRANSFER_READ)
116 op |= DRM_FREEDRENO_PREP_READ;
117
118 if (usage & PIPE_TRANSFER_WRITE)
119 op |= DRM_FREEDRENO_PREP_WRITE;
120
121 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
122 realloc_bo(rsc, fd_bo_size(rsc->bo));
123 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
124 /* If the GPU is writing to the resource, or if it is reading from the
125 * resource and we're trying to write to it, flush the renders.
126 */
127 if (rsc->dirty ||
128 ((ptrans->usage & PIPE_TRANSFER_WRITE) && rsc->reading))
129 fd_context_render(pctx);
130
131 /* The GPU keeps track of how the various bo's are being used, and
132 * will wait if necessary for the proper operation to have
133 * completed.
134 */
135 ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op);
136 if (ret)
137 goto fail;
138 }
139
140 buf = fd_bo_map(rsc->bo);
141 if (!buf) {
142 fd_resource_transfer_unmap(pctx, ptrans);
143 return NULL;
144 }
145
146 *pptrans = ptrans;
147
148 if (rsc->layer_first) {
149 offset = slice->offset +
150 box->y / util_format_get_blockheight(format) * ptrans->stride +
151 box->x / util_format_get_blockwidth(format) * rsc->cpp +
152 box->z * rsc->layer_size;
153 } else {
154 offset = slice->offset +
155 box->y / util_format_get_blockheight(format) * ptrans->stride +
156 box->x / util_format_get_blockwidth(format) * rsc->cpp +
157 box->z * slice->size0;
158 }
159
160 return buf + offset;
161
162 fail:
163 fd_resource_transfer_unmap(pctx, ptrans);
164 return NULL;
165 }
166
167 static void
168 fd_resource_destroy(struct pipe_screen *pscreen,
169 struct pipe_resource *prsc)
170 {
171 struct fd_resource *rsc = fd_resource(prsc);
172 if (rsc->bo)
173 fd_bo_del(rsc->bo);
174 list_delinit(&rsc->list);
175 FREE(rsc);
176 }
177
178 static boolean
179 fd_resource_get_handle(struct pipe_screen *pscreen,
180 struct pipe_resource *prsc,
181 struct winsys_handle *handle)
182 {
183 struct fd_resource *rsc = fd_resource(prsc);
184
185 return fd_screen_bo_get_handle(pscreen, rsc->bo,
186 rsc->slices[0].pitch * rsc->cpp, handle);
187 }
188
189
190 static const struct u_resource_vtbl fd_resource_vtbl = {
191 .resource_get_handle = fd_resource_get_handle,
192 .resource_destroy = fd_resource_destroy,
193 .transfer_map = fd_resource_transfer_map,
194 .transfer_flush_region = fd_resource_transfer_flush_region,
195 .transfer_unmap = fd_resource_transfer_unmap,
196 .transfer_inline_write = u_default_transfer_inline_write,
197 };
198
199 static uint32_t
200 setup_slices(struct fd_resource *rsc, uint32_t alignment)
201 {
202 struct pipe_resource *prsc = &rsc->base.b;
203 uint32_t level, size = 0;
204 uint32_t width = prsc->width0;
205 uint32_t height = prsc->height0;
206 uint32_t depth = prsc->depth0;
207 /* in layer_first layout, the level (slice) contains just one
208 * layer (since in fact the layer contains the slices)
209 */
210 uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
211
212 for (level = 0; level <= prsc->last_level; level++) {
213 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
214
215 slice->pitch = width = align(width, 32);
216 slice->offset = size;
217 /* 1d array and 2d array textures must all have the same layer size
218 * for each miplevel on a3xx. 3d textures can have different layer
219 * sizes for high levels, but the hw auto-sizer is buggy (or at least
220 * different than what this code does), so as soon as the layer size
221 * range gets into range, we stop reducing it.
222 */
223 if (prsc->target == PIPE_TEXTURE_3D && (
224 level == 1 ||
225 (level > 1 && rsc->slices[level - 1].size0 > 0xf000)))
226 slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
227 else if (level == 0 || rsc->layer_first || alignment == 1)
228 slice->size0 = align(slice->pitch * height * rsc->cpp, alignment);
229 else
230 slice->size0 = rsc->slices[level - 1].size0;
231
232 size += slice->size0 * depth * layers_in_level;
233
234 width = u_minify(width, 1);
235 height = u_minify(height, 1);
236 depth = u_minify(depth, 1);
237 }
238
239 return size;
240 }
241
242 static uint32_t
243 slice_alignment(struct pipe_screen *pscreen, const struct pipe_resource *tmpl)
244 {
245 /* on a3xx, 2d array and 3d textures seem to want their
246 * layers aligned to page boundaries:
247 */
248 switch (tmpl->target) {
249 case PIPE_TEXTURE_3D:
250 case PIPE_TEXTURE_1D_ARRAY:
251 case PIPE_TEXTURE_2D_ARRAY:
252 return 4096;
253 default:
254 return 1;
255 }
256 }
257
258 /**
259 * Create a new texture object, using the given template info.
260 */
261 static struct pipe_resource *
262 fd_resource_create(struct pipe_screen *pscreen,
263 const struct pipe_resource *tmpl)
264 {
265 struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
266 struct pipe_resource *prsc = &rsc->base.b;
267 uint32_t size;
268
269 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
270 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
271 tmpl->target, util_format_name(tmpl->format),
272 tmpl->width0, tmpl->height0, tmpl->depth0,
273 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
274 tmpl->usage, tmpl->bind, tmpl->flags);
275
276 if (!rsc)
277 return NULL;
278
279 *prsc = *tmpl;
280
281 pipe_reference_init(&prsc->reference, 1);
282 list_inithead(&rsc->list);
283 prsc->screen = pscreen;
284
285 rsc->base.vtbl = &fd_resource_vtbl;
286 rsc->cpp = util_format_get_blocksize(tmpl->format);
287
288 assert(rsc->cpp);
289
290 if (is_a4xx(fd_screen(pscreen))) {
291 switch (tmpl->target) {
292 case PIPE_TEXTURE_3D:
293 /* TODO 3D_ARRAY? */
294 rsc->layer_first = false;
295 break;
296 default:
297 rsc->layer_first = true;
298 break;
299 }
300 }
301
302 size = setup_slices(rsc, slice_alignment(pscreen, tmpl));
303
304 if (rsc->layer_first) {
305 rsc->layer_size = align(size, 4096);
306 size = rsc->layer_size * prsc->array_size;
307 }
308
309 realloc_bo(rsc, size);
310 if (!rsc->bo)
311 goto fail;
312
313 return prsc;
314 fail:
315 fd_resource_destroy(pscreen, prsc);
316 return NULL;
317 }
318
319 /**
320 * Create a texture from a winsys_handle. The handle is often created in
321 * another process by first creating a pipe texture and then calling
322 * resource_get_handle.
323 */
324 static struct pipe_resource *
325 fd_resource_from_handle(struct pipe_screen *pscreen,
326 const struct pipe_resource *tmpl,
327 struct winsys_handle *handle)
328 {
329 struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
330 struct fd_resource_slice *slice = &rsc->slices[0];
331 struct pipe_resource *prsc = &rsc->base.b;
332
333 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
334 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
335 tmpl->target, util_format_name(tmpl->format),
336 tmpl->width0, tmpl->height0, tmpl->depth0,
337 tmpl->array_size, tmpl->last_level, tmpl->nr_samples,
338 tmpl->usage, tmpl->bind, tmpl->flags);
339
340 if (!rsc)
341 return NULL;
342
343 *prsc = *tmpl;
344
345 pipe_reference_init(&prsc->reference, 1);
346 list_inithead(&rsc->list);
347 prsc->screen = pscreen;
348
349 rsc->bo = fd_screen_bo_from_handle(pscreen, handle, &slice->pitch);
350 if (!rsc->bo)
351 goto fail;
352
353 rsc->base.vtbl = &fd_resource_vtbl;
354 rsc->cpp = util_format_get_blocksize(tmpl->format);
355 slice->pitch /= rsc->cpp;
356
357 assert(rsc->cpp);
358
359 return prsc;
360
361 fail:
362 fd_resource_destroy(pscreen, prsc);
363 return NULL;
364 }
365
366 static void fd_blitter_pipe_begin(struct fd_context *ctx);
367 static void fd_blitter_pipe_end(struct fd_context *ctx);
368
369 /**
370 * _copy_region using pipe (3d engine)
371 */
372 static bool
373 fd_blitter_pipe_copy_region(struct fd_context *ctx,
374 struct pipe_resource *dst,
375 unsigned dst_level,
376 unsigned dstx, unsigned dsty, unsigned dstz,
377 struct pipe_resource *src,
378 unsigned src_level,
379 const struct pipe_box *src_box)
380 {
381 /* not until we allow rendertargets to be buffers */
382 if (dst->target == PIPE_BUFFER || src->target == PIPE_BUFFER)
383 return false;
384
385 if (!util_blitter_is_copy_supported(ctx->blitter, dst, src))
386 return false;
387
388 fd_blitter_pipe_begin(ctx);
389 util_blitter_copy_texture(ctx->blitter,
390 dst, dst_level, dstx, dsty, dstz,
391 src, src_level, src_box);
392 fd_blitter_pipe_end(ctx);
393
394 return true;
395 }
396
397 /**
398 * Copy a block of pixels from one resource to another.
399 * The resource must be of the same format.
400 * Resources with nr_samples > 1 are not allowed.
401 */
402 static void
403 fd_resource_copy_region(struct pipe_context *pctx,
404 struct pipe_resource *dst,
405 unsigned dst_level,
406 unsigned dstx, unsigned dsty, unsigned dstz,
407 struct pipe_resource *src,
408 unsigned src_level,
409 const struct pipe_box *src_box)
410 {
411 struct fd_context *ctx = fd_context(pctx);
412
413 /* TODO if we have 2d core, or other DMA engine that could be used
414 * for simple copies and reasonably easily synchronized with the 3d
415 * core, this is where we'd plug it in..
416 */
417
418 /* try blit on 3d pipe: */
419 if (fd_blitter_pipe_copy_region(ctx,
420 dst, dst_level, dstx, dsty, dstz,
421 src, src_level, src_box))
422 return;
423
424 /* else fallback to pure sw: */
425 util_resource_copy_region(pctx,
426 dst, dst_level, dstx, dsty, dstz,
427 src, src_level, src_box);
428 }
429
430 /**
431 * Optimal hardware path for blitting pixels.
432 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
433 */
434 static void
435 fd_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
436 {
437 struct fd_context *ctx = fd_context(pctx);
438 struct pipe_blit_info info = *blit_info;
439
440 if (info.src.resource->nr_samples > 1 &&
441 info.dst.resource->nr_samples <= 1 &&
442 !util_format_is_depth_or_stencil(info.src.resource->format) &&
443 !util_format_is_pure_integer(info.src.resource->format)) {
444 DBG("color resolve unimplemented");
445 return;
446 }
447
448 if (util_try_blit_via_copy_region(pctx, &info)) {
449 return; /* done */
450 }
451
452 if (info.mask & PIPE_MASK_S) {
453 DBG("cannot blit stencil, skipping");
454 info.mask &= ~PIPE_MASK_S;
455 }
456
457 if (!util_blitter_is_blit_supported(ctx->blitter, &info)) {
458 DBG("blit unsupported %s -> %s",
459 util_format_short_name(info.src.resource->format),
460 util_format_short_name(info.dst.resource->format));
461 return;
462 }
463
464 fd_blitter_pipe_begin(ctx);
465 util_blitter_blit(ctx->blitter, &info);
466 fd_blitter_pipe_end(ctx);
467 }
468
469 static void
470 fd_blitter_pipe_begin(struct fd_context *ctx)
471 {
472 util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vtx.vertexbuf.vb);
473 util_blitter_save_vertex_elements(ctx->blitter, ctx->vtx.vtx);
474 util_blitter_save_vertex_shader(ctx->blitter, ctx->prog.vp);
475 util_blitter_save_rasterizer(ctx->blitter, ctx->rasterizer);
476 util_blitter_save_viewport(ctx->blitter, &ctx->viewport);
477 util_blitter_save_scissor(ctx->blitter, &ctx->scissor);
478 util_blitter_save_fragment_shader(ctx->blitter, ctx->prog.fp);
479 util_blitter_save_blend(ctx->blitter, ctx->blend);
480 util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->zsa);
481 util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
482 util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask);
483 util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
484 util_blitter_save_fragment_sampler_states(ctx->blitter,
485 ctx->fragtex.num_samplers,
486 (void **)ctx->fragtex.samplers);
487 util_blitter_save_fragment_sampler_views(ctx->blitter,
488 ctx->fragtex.num_textures, ctx->fragtex.textures);
489
490 fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_BLIT);
491 }
492
493 static void
494 fd_blitter_pipe_end(struct fd_context *ctx)
495 {
496 fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL);
497 }
498
499 static void
500 fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
501 {
502 struct fd_resource *rsc = fd_resource(prsc);
503
504 if (rsc->dirty)
505 fd_context_render(pctx);
506 }
507
508 void
509 fd_resource_screen_init(struct pipe_screen *pscreen)
510 {
511 pscreen->resource_create = fd_resource_create;
512 pscreen->resource_from_handle = fd_resource_from_handle;
513 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
514 pscreen->resource_destroy = u_resource_destroy_vtbl;
515 }
516
517 void
518 fd_resource_context_init(struct pipe_context *pctx)
519 {
520 pctx->transfer_map = u_transfer_map_vtbl;
521 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
522 pctx->transfer_unmap = u_transfer_unmap_vtbl;
523 pctx->transfer_inline_write = u_transfer_inline_write_vtbl;
524 pctx->create_surface = fd_create_surface;
525 pctx->surface_destroy = fd_surface_destroy;
526 pctx->resource_copy_region = fd_resource_copy_region;
527 pctx->blit = fd_blit;
528 pctx->flush_resource = fd_flush_resource;
529 }