1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
29 #ifndef FREEDRENO_RESOURCE_H_
30 #define FREEDRENO_RESOURCE_H_
32 #include "util/list.h"
33 #include "util/u_range.h"
34 #include "util/u_transfer_helper.h"
36 #include "freedreno_batch.h"
37 #include "freedreno_util.h"
39 /* Texture Layout on a3xx:
41 * Each mipmap-level contains all of it's layers (ie. all cubmap
42 * faces, all 1d/2d array elements, etc). The texture sampler is
43 * programmed with the start address of each mipmap level, and hw
44 * derives the layer offset within the level.
46 * Texture Layout on a4xx:
48 * For cubemap and 2d array, each layer contains all of it's mipmap
49 * levels (layer_first layout).
51 * 3d textures are layed out as on a3xx, but unknown about 3d-array
54 * In either case, the slice represents the per-miplevel information,
55 * but in layer_first layout it only includes the first layer, and
56 * an additional offset of (rsc->layer_size * layer) must be added.
58 struct fd_resource_slice
{
59 uint32_t offset
; /* offset of first layer in slice */
61 uint32_t size0
; /* size of first layer in slice */
67 struct pipe_resource base
;
70 enum pipe_format internal_format
;
71 bool layer_first
; /* see above description */
73 struct fd_resource_slice slices
[MAX_MIP_LEVELS
];
74 /* buffer range that has been initialized */
75 struct util_range valid_buffer_range
;
78 /* reference to the resource holding stencil data for a z32_s8 texture */
79 /* TODO rename to secondary or auxiliary? */
80 struct fd_resource
*stencil
;
82 /* bitmask of in-flight batches which reference this resource. Note
83 * that the batch doesn't hold reference to resources (but instead
84 * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
85 * the resource is destroyed we need to clean up the batch's weak
90 /* reference to batch that writes this resource: */
91 struct fd_batch
*write_batch
;
93 /* Set of batches whose batch-cache key references this resource.
94 * We need to track this to know which batch-cache entries to
95 * invalidate if, for example, the resource is invalidated or
98 uint32_t bc_batch_mask
;
100 unsigned tile_mode
: 2;
101 unsigned preferred_tile_mode
: 2;
107 uint16_t lrz_width
; // for lrz clear, does this differ from lrz_pitch?
113 static inline struct fd_resource
*
114 fd_resource(struct pipe_resource
*ptex
)
116 return (struct fd_resource
*)ptex
;
120 pending(struct fd_resource
*rsc
, bool write
)
122 /* if we have a pending GPU write, we are busy in any case: */
123 if (rsc
->write_batch
)
126 /* if CPU wants to write, but we are pending a GPU read, we are busy: */
127 if (write
&& rsc
->batch_mask
)
130 if (rsc
->stencil
&& pending(rsc
->stencil
, write
))
137 struct pipe_transfer base
;
138 struct pipe_resource
*staging_prsc
;
139 struct pipe_box staging_box
;
142 static inline struct fd_transfer
*
143 fd_transfer(struct pipe_transfer
*ptrans
)
145 return (struct fd_transfer
*)ptrans
;
148 static inline struct fd_resource_slice
*
149 fd_resource_slice(struct fd_resource
*rsc
, unsigned level
)
151 assert(level
<= rsc
->base
.last_level
);
152 return &rsc
->slices
[level
];
155 /* get offset for specified mipmap level and texture/array layer */
156 static inline uint32_t
157 fd_resource_offset(struct fd_resource
*rsc
, unsigned level
, unsigned layer
)
159 struct fd_resource_slice
*slice
= fd_resource_slice(rsc
, level
);
161 if (rsc
->layer_first
) {
162 offset
= slice
->offset
+ (rsc
->layer_size
* layer
);
164 offset
= slice
->offset
+ (slice
->size0
* layer
);
166 debug_assert(offset
< fd_bo_size(rsc
->bo
));
170 /* This might be a5xx specific, but higher mipmap levels are always linear: */
172 fd_resource_level_linear(struct pipe_resource
*prsc
, int level
)
174 unsigned w
= u_minify(prsc
->width0
, level
);
180 void fd_blitter_pipe_begin(struct fd_context
*ctx
, bool render_cond
, bool discard
,
181 enum fd_render_stage stage
);
182 void fd_blitter_pipe_end(struct fd_context
*ctx
);
184 void fd_resource_screen_init(struct pipe_screen
*pscreen
);
185 void fd_resource_context_init(struct pipe_context
*pctx
);
187 uint32_t fd_setup_slices(struct fd_resource
*rsc
);
188 void fd_resource_resize(struct pipe_resource
*prsc
, uint32_t sz
);
190 bool fd_render_condition_check(struct pipe_context
*pctx
);
192 #endif /* FREEDRENO_RESOURCE_H_ */