freedreno/a5xx: add global size compute cap
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.h
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef FREEDRENO_RESOURCE_H_
30 #define FREEDRENO_RESOURCE_H_
31
32 #include "util/list.h"
33 #include "util/u_range.h"
34 #include "util/u_transfer.h"
35
36 #include "freedreno_batch.h"
37 #include "freedreno_util.h"
38
39 /* Texture Layout on a3xx:
40 *
41 * Each mipmap-level contains all of it's layers (ie. all cubmap
42 * faces, all 1d/2d array elements, etc). The texture sampler is
43 * programmed with the start address of each mipmap level, and hw
44 * derives the layer offset within the level.
45 *
46 * Texture Layout on a4xx:
47 *
48 * For cubemap and 2d array, each layer contains all of it's mipmap
49 * levels (layer_first layout).
50 *
51 * 3d textures are layed out as on a3xx, but unknown about 3d-array
52 * textures.
53 *
54 * In either case, the slice represents the per-miplevel information,
55 * but in layer_first layout it only includes the first layer, and
56 * an additional offset of (rsc->layer_size * layer) must be added.
57 */
58 struct fd_resource_slice {
59 uint32_t offset; /* offset of first layer in slice */
60 uint32_t pitch;
61 uint32_t size0; /* size of first layer in slice */
62 };
63
64 struct set;
65
66 struct fd_resource {
67 struct u_resource base;
68 struct fd_bo *bo;
69 uint32_t cpp;
70 enum pipe_format internal_format;
71 bool layer_first; /* see above description */
72 uint32_t layer_size;
73 struct fd_resource_slice slices[MAX_MIP_LEVELS];
74 /* buffer range that has been initialized */
75 struct util_range valid_buffer_range;
76
77 /* reference to the resource holding stencil data for a z32_s8 texture */
78 /* TODO rename to secondary or auxiliary? */
79 struct fd_resource *stencil;
80
81 /* bitmask of in-flight batches which reference this resource. Note
82 * that the batch doesn't hold reference to resources (but instead
83 * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
84 * the resource is destroyed we need to clean up the batch's weak
85 * references to us.
86 */
87 uint32_t batch_mask;
88
89 /* reference to batch that writes this resource: */
90 struct fd_batch *write_batch;
91
92 /* Set of batches whose batch-cache key references this resource.
93 * We need to track this to know which batch-cache entries to
94 * invalidate if, for example, the resource is invalidated or
95 * shadowed.
96 */
97 uint32_t bc_batch_mask;
98
99 /*
100 * LRZ
101 */
102 bool lrz_valid : 1;
103 uint16_t lrz_width; // for lrz clear, does this differ from lrz_pitch?
104 uint16_t lrz_height;
105 uint16_t lrz_pitch;
106 struct fd_bo *lrz;
107 };
108
109 static inline struct fd_resource *
110 fd_resource(struct pipe_resource *ptex)
111 {
112 return (struct fd_resource *)ptex;
113 }
114
115 static inline bool
116 pending(struct fd_resource *rsc, bool write)
117 {
118 /* if we have a pending GPU write, we are busy in any case: */
119 if (rsc->write_batch)
120 return true;
121
122 /* if CPU wants to write, but we are pending a GPU read, we are busy: */
123 if (write && rsc->batch_mask)
124 return true;
125
126 if (rsc->stencil && pending(rsc->stencil, write))
127 return true;
128
129 return false;
130 }
131
132 struct fd_transfer {
133 struct pipe_transfer base;
134 void *staging;
135 };
136
137 static inline struct fd_transfer *
138 fd_transfer(struct pipe_transfer *ptrans)
139 {
140 return (struct fd_transfer *)ptrans;
141 }
142
143 static inline struct fd_resource_slice *
144 fd_resource_slice(struct fd_resource *rsc, unsigned level)
145 {
146 assert(level <= rsc->base.b.last_level);
147 return &rsc->slices[level];
148 }
149
150 /* get offset for specified mipmap level and texture/array layer */
151 static inline uint32_t
152 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
153 {
154 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
155 unsigned offset;
156 if (rsc->layer_first) {
157 offset = slice->offset + (rsc->layer_size * layer);
158 } else {
159 offset = slice->offset + (slice->size0 * layer);
160 }
161 debug_assert(offset < fd_bo_size(rsc->bo));
162 return offset;
163 }
164
165 void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard,
166 enum fd_render_stage stage);
167 void fd_blitter_pipe_end(struct fd_context *ctx);
168
169 void fd_resource_screen_init(struct pipe_screen *pscreen);
170 void fd_resource_context_init(struct pipe_context *pctx);
171
172 void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
173
174 bool fd_render_condition_check(struct pipe_context *pctx);
175
176 #endif /* FREEDRENO_RESOURCE_H_ */