freedreno/a6xx: UBWC support
[mesa.git] / src / gallium / drivers / freedreno / freedreno_resource.h
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_RESOURCE_H_
28 #define FREEDRENO_RESOURCE_H_
29
30 #include "util/list.h"
31 #include "util/u_range.h"
32 #include "util/u_transfer_helper.h"
33
34 #include "freedreno_batch.h"
35 #include "freedreno_util.h"
36
37 /* Texture Layout on a3xx:
38 *
39 * Each mipmap-level contains all of it's layers (ie. all cubmap
40 * faces, all 1d/2d array elements, etc). The texture sampler is
41 * programmed with the start address of each mipmap level, and hw
42 * derives the layer offset within the level.
43 *
44 * Texture Layout on a4xx+:
45 *
46 * For cubemap and 2d array, each layer contains all of it's mipmap
47 * levels (layer_first layout).
48 *
49 * 3d textures are layed out as on a3xx, but unknown about 3d-array
50 * textures.
51 *
52 * In either case, the slice represents the per-miplevel information,
53 * but in layer_first layout it only includes the first layer, and
54 * an additional offset of (rsc->layer_size * layer) must be added.
55 */
56 struct fd_resource_slice {
57 uint32_t offset; /* offset of first layer in slice */
58 uint32_t pitch;
59 uint32_t size0; /* size of first layer in slice */
60 };
61
62 struct set;
63
64 struct fd_resource {
65 struct pipe_resource base;
66 struct fd_bo *bo;
67 uint32_t cpp;
68 enum pipe_format internal_format;
69 bool layer_first; /* see above description */
70 uint32_t layer_size;
71 struct fd_resource_slice slices[MAX_MIP_LEVELS];
72 /* buffer range that has been initialized */
73 struct util_range valid_buffer_range;
74 bool valid;
75 struct renderonly_scanout *scanout;
76
77 /* reference to the resource holding stencil data for a z32_s8 texture */
78 /* TODO rename to secondary or auxiliary? */
79 struct fd_resource *stencil;
80
81 uint32_t offset;
82 uint32_t ubwc_offset;
83 uint32_t ubwc_pitch;
84 uint32_t ubwc_size;
85
86 /* bitmask of in-flight batches which reference this resource. Note
87 * that the batch doesn't hold reference to resources (but instead
88 * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
89 * the resource is destroyed we need to clean up the batch's weak
90 * references to us.
91 */
92 uint32_t batch_mask;
93
94 /* reference to batch that writes this resource: */
95 struct fd_batch *write_batch;
96
97 /* Set of batches whose batch-cache key references this resource.
98 * We need to track this to know which batch-cache entries to
99 * invalidate if, for example, the resource is invalidated or
100 * shadowed.
101 */
102 uint32_t bc_batch_mask;
103
104 /* Sequence # incremented each time bo changes: */
105 uint16_t seqno;
106
107 unsigned tile_mode : 2;
108
109 /*
110 * LRZ
111 */
112 bool lrz_valid : 1;
113 uint16_t lrz_width; // for lrz clear, does this differ from lrz_pitch?
114 uint16_t lrz_height;
115 uint16_t lrz_pitch;
116 struct fd_bo *lrz;
117 };
118
119 static inline struct fd_resource *
120 fd_resource(struct pipe_resource *ptex)
121 {
122 return (struct fd_resource *)ptex;
123 }
124
125 static inline bool
126 pending(struct fd_resource *rsc, bool write)
127 {
128 /* if we have a pending GPU write, we are busy in any case: */
129 if (rsc->write_batch)
130 return true;
131
132 /* if CPU wants to write, but we are pending a GPU read, we are busy: */
133 if (write && rsc->batch_mask)
134 return true;
135
136 if (rsc->stencil && pending(rsc->stencil, write))
137 return true;
138
139 return false;
140 }
141
142 struct fd_transfer {
143 struct pipe_transfer base;
144 struct pipe_resource *staging_prsc;
145 struct pipe_box staging_box;
146 };
147
148 static inline struct fd_transfer *
149 fd_transfer(struct pipe_transfer *ptrans)
150 {
151 return (struct fd_transfer *)ptrans;
152 }
153
154 static inline struct fd_resource_slice *
155 fd_resource_slice(struct fd_resource *rsc, unsigned level)
156 {
157 assert(level <= rsc->base.last_level);
158 return &rsc->slices[level];
159 }
160
161 /* get offset for specified mipmap level and texture/array layer */
162 static inline uint32_t
163 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
164 {
165 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
166 unsigned offset;
167 if (rsc->layer_first) {
168 offset = slice->offset + (rsc->layer_size * layer);
169 } else {
170 offset = slice->offset + (slice->size0 * layer);
171 }
172 debug_assert(offset < fd_bo_size(rsc->bo));
173 return offset;
174 }
175
176 /* This might be a5xx specific, but higher mipmap levels are always linear: */
177 static inline bool
178 fd_resource_level_linear(struct pipe_resource *prsc, int level)
179 {
180 unsigned w = u_minify(prsc->width0, level);
181 if (w < 16)
182 return true;
183 return false;
184 }
185
186 /* access # of samples, with 0 normalized to 1 (which is what we care about
187 * most of the time)
188 */
189 static inline unsigned
190 fd_resource_nr_samples(struct pipe_resource *prsc)
191 {
192 return MAX2(1, prsc->nr_samples);
193 }
194
195 void fd_resource_screen_init(struct pipe_screen *pscreen);
196 void fd_resource_context_init(struct pipe_context *pctx);
197
198 uint32_t fd_setup_slices(struct fd_resource *rsc);
199 void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
200
201 bool fd_render_condition_check(struct pipe_context *pctx);
202
203 #endif /* FREEDRENO_RESOURCE_H_ */