src/gallium/drivers/freedreno/freedreno_resource.h

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #ifndef FREEDRENO_RESOURCE_H_
  28 #define FREEDRENO_RESOURCE_H_
  29
  30 #include "util/list.h"
  31 #include "util/u_range.h"
  32 #include "util/u_transfer_helper.h"
  33 #include "util/simple_mtx.h"
  34
  35 #include "freedreno_batch.h"
  36 #include "freedreno_util.h"
  37 #include "freedreno/fdl/freedreno_layout.h"
  38
  39 struct fd_resource {
  40         struct pipe_resource base;
  41         struct fd_bo *bo;
  42         enum pipe_format internal_format;
  43         struct fdl_layout layout;
  44
  45         /* buffer range that has been initialized */
  46         struct util_range valid_buffer_range;
  47         bool valid;
  48         struct renderonly_scanout *scanout;
  49
  50         /* reference to the resource holding stencil data for a z32_s8 texture */
  51         /* TODO rename to secondary or auxiliary? */
  52         struct fd_resource *stencil;
  53
  54         simple_mtx_t lock;
  55
  56         /* bitmask of in-flight batches which reference this resource.  Note
  57          * that the batch doesn't hold reference to resources (but instead
  58          * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
  59          * the resource is destroyed we need to clean up the batch's weak
  60          * references to us.
  61          */
  62         uint32_t batch_mask;
  63
  64         /* reference to batch that writes this resource: */
  65         struct fd_batch *write_batch;
  66
  67         /* Set of batches whose batch-cache key references this resource.
  68          * We need to track this to know which batch-cache entries to
  69          * invalidate if, for example, the resource is invalidated or
  70          * shadowed.
  71          */
  72         uint32_t bc_batch_mask;
  73
  74         /* Sequence # incremented each time bo changes: */
  75         uint16_t seqno;
  76
  77         /* bitmask of state this resource could potentially dirty when rebound,
  78          * see rebind_resource()
  79          */
  80         enum fd_dirty_3d_state dirty;
  81
  82         /*
  83          * LRZ
  84          *
  85          * TODO lrz width/height/pitch should probably also move to
  86          * fdl_layout
  87          */
  88         bool lrz_valid : 1;
  89         uint16_t lrz_width;  // for lrz clear, does this differ from lrz_pitch?
  90         uint16_t lrz_height;
  91         uint16_t lrz_pitch;
  92         struct fd_bo *lrz;
  93 };
  94
  95 static inline struct fd_resource *
  96 fd_resource(struct pipe_resource *ptex)
  97 {
  98         return (struct fd_resource *)ptex;
  99 }
 100
 101 static inline const struct fd_resource *
 102 fd_resource_const(const struct pipe_resource *ptex)
 103 {
 104         return (const struct fd_resource *)ptex;
 105 }
 106
 107 static inline bool
 108 pending(struct fd_resource *rsc, bool write)
 109 {
 110         /* if we have a pending GPU write, we are busy in any case: */
 111         if (rsc->write_batch)
 112                 return true;
 113
 114         /* if CPU wants to write, but we are pending a GPU read, we are busy: */
 115         if (write && rsc->batch_mask)
 116                 return true;
 117
 118         if (rsc->stencil && pending(rsc->stencil, write))
 119                 return true;
 120
 121         return false;
 122 }
 123
 124 static inline bool
 125 fd_resource_busy(struct fd_resource *rsc, unsigned op)
 126 {
 127         return fd_bo_cpu_prep(rsc->bo, NULL, op | DRM_FREEDRENO_PREP_NOSYNC) != 0;
 128 }
 129
 130 static inline void
 131 fd_resource_lock(struct fd_resource *rsc)
 132 {
 133         simple_mtx_lock(&rsc->lock);
 134 }
 135
 136 static inline void
 137 fd_resource_unlock(struct fd_resource *rsc)
 138 {
 139         simple_mtx_unlock(&rsc->lock);
 140 }
 141
 142 static inline void
 143 fd_resource_set_usage(struct pipe_resource *prsc, enum fd_dirty_3d_state usage)
 144 {
 145         if (!prsc)
 146                 return;
 147         struct fd_resource *rsc = fd_resource(prsc);
 148         /* Bits are only ever ORed in, and we expect many set_usage() per
 149          * resource, so do the quick check outside of the lock.
 150          */
 151         if (likely(rsc->dirty & usage))
 152                 return;
 153         fd_resource_lock(rsc);
 154         rsc->dirty |= usage;
 155         fd_resource_unlock(rsc);
 156 }
 157
 158 static inline bool
 159 has_depth(enum pipe_format format)
 160 {
 161         const struct util_format_description *desc =
 162                         util_format_description(format);
 163         return util_format_has_depth(desc);
 164 }
 165
 166 struct fd_transfer {
 167         struct pipe_transfer base;
 168         struct pipe_resource *staging_prsc;
 169         struct pipe_box staging_box;
 170 };
 171
 172 static inline struct fd_transfer *
 173 fd_transfer(struct pipe_transfer *ptrans)
 174 {
 175         return (struct fd_transfer *)ptrans;
 176 }
 177
 178 static inline struct fdl_slice *
 179 fd_resource_slice(struct fd_resource *rsc, unsigned level)
 180 {
 181         assert(level <= rsc->base.last_level);
 182         return &rsc->layout.slices[level];
 183 }
 184
 185 static inline uint32_t
 186 fd_resource_layer_stride(struct fd_resource *rsc, unsigned level)
 187 {
 188         return fdl_layer_stride(&rsc->layout, level);
 189 }
 190
 191 /* get offset for specified mipmap level and texture/array layer */
 192 static inline uint32_t
 193 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
 194 {
 195         uint32_t offset = fdl_surface_offset(&rsc->layout, level, layer);
 196         debug_assert(offset < fd_bo_size(rsc->bo));
 197         return offset;
 198 }
 199
 200 static inline uint32_t
 201 fd_resource_ubwc_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
 202 {
 203         uint32_t offset = fdl_ubwc_offset(&rsc->layout, level, layer);
 204         debug_assert(offset < fd_bo_size(rsc->bo));
 205         return offset;
 206 }
 207
 208 /* This might be a5xx specific, but higher mipmap levels are always linear: */
 209 static inline bool
 210 fd_resource_level_linear(const struct pipe_resource *prsc, int level)
 211 {
 212         struct fd_screen *screen = fd_screen(prsc->screen);
 213         debug_assert(!is_a3xx(screen));
 214
 215         return fdl_level_linear(&fd_resource_const(prsc)->layout, level);
 216 }
 217
 218 static inline uint32_t
 219 fd_resource_tile_mode(struct pipe_resource *prsc, int level)
 220 {
 221         return fdl_tile_mode(&fd_resource(prsc)->layout, level);
 222 }
 223
 224 static inline bool
 225 fd_resource_ubwc_enabled(struct fd_resource *rsc, int level)
 226 {
 227         return fdl_ubwc_enabled(&rsc->layout, level);
 228 }
 229
 230 /* access # of samples, with 0 normalized to 1 (which is what we care about
 231  * most of the time)
 232  */
 233 static inline unsigned
 234 fd_resource_nr_samples(struct pipe_resource *prsc)
 235 {
 236         return MAX2(1, prsc->nr_samples);
 237 }
 238
 239 void fd_resource_screen_init(struct pipe_screen *pscreen);
 240 void fd_resource_context_init(struct pipe_context *pctx);
 241
 242 uint32_t fd_setup_slices(struct fd_resource *rsc);
 243 void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
 244 void fd_resource_uncompress(struct fd_context *ctx, struct fd_resource *rsc);
 245
 246 bool fd_render_condition_check(struct pipe_context *pctx);
 247
 248 static inline bool
 249 fd_batch_references_resource(struct fd_batch *batch, struct fd_resource *rsc)
 250 {
 251         return rsc->batch_mask & (1 << batch->idx);
 252 }
 253
 254 static inline void
 255 fd_batch_resource_read(struct fd_batch *batch,
 256                 struct fd_resource *rsc)
 257 {
 258         /* Fast path: if we hit this then we know we don't have anyone else
 259          * writing to it (since both _write and _read flush other writers), and
 260          * that we've already recursed for stencil.
 261          */
 262         if (unlikely(!fd_batch_references_resource(batch, rsc)))
 263                 fd_batch_resource_read_slowpath(batch, rsc);
 264 }
 265
 266 #endif /* FREEDRENO_RESOURCE_H_ */